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Article

3 Citations

5,519 Views

14 Pages

A Digital Bang-Bang Clock and Data Recovery Circuit Combined with ADC-Based Wireline Receiver

Youzhi Gu,
Xinjie Feng,
Runze Chi,
Jiangfeng Wu and
Yongzhen Chen

Electronics2022, 11(21), 3489;https://doi.org/10.3390/electronics11213489

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27 October 2022

With the great increases in data transmission rate requirements, analog-to-digital converter (ADC)-based wireline receivers have received more and more attention due to their flexible and powerful equalization capabilities. Considering power consumpt...

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Article

3 Citations

3,194 Views

13 Pages

A Novel Autocorrelation Combined MM-CDR Time-Interleaved ADC Timing Calibration in 28 nm CMOS Technology

Youzhi Gu,
Xinjie Feng,
Runze Chi,
Jiangfeng Wu and
Yongzhen Chen

Electronics2022, 11(19), 3198;https://doi.org/10.3390/electronics11193198

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6 October 2022

With the great improvement in data transmission rate requirements, the analog-to-digital converter (ADC)-based wireline receiver has received more attention due to its flexible and powerful equalization capability. Time-interleaved ADC (TI-ADC) is th...

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Article

3,685 Views

14 Pages

Analysis of Mueller–Muller Clock and Data Recovery Circuits with a Linearized Model

Junkun Chen,
Youzhi Gu,
Xinjie Feng,
Runze Chi,
Jiangfeng Wu and
Yongzhen Chen

Electronics2024, 13(21), 4218;https://doi.org/10.3390/electronics13214218

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27 October 2024

With the development of high-speed analog-to-digital converter (ADC)-based wireline receivers, the Mueller–Muller clock and data recovery (MM-CDR) circuit has garnered increasing attention. But in the design stage, evaluating the loop performan...

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