Search Results (115)

The four-level nested neutral point clamped (4L-NNPC) inverter has recently become a promising solution for renewable energy generation, e.g., wind and photovoltaic power. The NNPC inverter can stabilize the flying capacitor (FC) voltages of each bridge through redundant switch states (RSSs). This paper presents an improved three-layer sequential model predictive control (3LS-MPC) method for 4L-NNPCs. This method eliminates weighting factors and removes the switch states that generate high common-mode voltage (CMV). Before selecting the optimal vector, we disable certain switch states which affect the FC voltages, continuing to deviate from the desired value. Then, adopting a two-stage optimal vector selection method, we select the optimal sector based on six specific vectors and choose the optimal vector from the seven vectors in the optimal sector. The feasibility of this method was verified in Matlab/Simulink and the prototype. The experimental results show that compared with classical FCS-MPC, the proposed 3LS-MPC method reduces the common-mode voltage and has better harmonic quality and more stable FCs voltages. Full article

Monitoring the peak junction hotspot temperature in IGBT modules is critical for ensuring the reliability of high-power industrial multilevel inverters, particularly when operating under extreme thermal conditions, such as in traction applications. This study presents a comprehensive chip-level analytical loss and thermal model for estimation of the peak junction hotspot temperature in a three-level T-type neutral-point-clamped (TNPC) IGBT module. The developed model includes a detailed analytical assessment of conduction and switching losses, along with transient thermal network modeling, based on the actual electrical and thermal characteristics of the IGBT module. Additionally, a hybrid thermal–electrical stress experimental setup, designed to replicate real operating conditions, was implemented for a balanced three-phase inverter circuit utilizing a Semikron three-level IGBT module, with testing currents reaching 100 A and a critical case temperature of 125 °C. The analytically estimated module losses and peak junction hotspot temperatures were validated through direct experimental measurements. Furthermore, thermal simulations were conducted with Semikron’s SemiSel benchmark tool to cross-validate the accuracy of the thermo-electrical model. The outcomes show a relative estimation error of less than 1% when compared to experimental data and approximately 1.15% for the analytical model. These findings confirm the model’s accuracy and enhance the reliability evaluation of TNPC-IGBT modules in extreme thermal environments. Full article

Considering the cost, efficiency, power density, and other issues of the power electronic system, many papers have mixed the wide-bandgap (WBG) power devices, mainly SiC MOSFET and GaN FET/HEMT, with Si IGBT/MOSFET in the three-level active neutral-point clamped (T-ANPC) topology, forming the hybrid T-ANPC (HT-ANPC) topology. This paper reviews these latest HT-ANPC topologies from the perspective of the material types of switching devices and compares the advantages and disadvantages of various topologies. The potential challenges of HT-ANPC inverters in several mainstream applications are reviewed, and their improvements are compared and discussed in detail. Next, a brief topology selection and design process are provided based on analyzing various typical topologies. In addition, some future research trends on this topic are discussed. The paper will help researchers to select appropriate HT-ANPC topologies in different applications and have a better understanding of the critical issues to be considered during system design. Full article

The main purpose of this research is to develop an improved space vector pulse-width modulation (SVPWM) algorithm for three-level (3L) neutral point clamped (NPC) voltage source inverters (VSIs). The results of experiments conducted on the three-level power converter laboratory setup showed that the proposed SVPWM algorithm with a seven-stage switching sequence (SS) can reduce a VSI’s switching frequency by 43.48% compared to the SVPWM algorithm with the base SS. It also improves the neutral point (NP) voltage balance in the VSI DC link by 4.2% by controlling the duty factor of distributed base vectors in each SVPWM period based on phase load currents. It reduced the values of the 5th- and 7th-order harmonics of the VSI output voltage by 19% and 15.7%, respectively. The results show that the usage of the improved SVPWM algorithm helps increase the efficiency of a 3L NPC VSI by 0.6% and reduce the higher harmonics. The obtained results confirm the efficiency of the suggested algorithm and its great potential for power converters in industry. Full article

Numerous voltage vectors exist in a neutral-point-clamped (NPC) three-level inverter. Traditional three-level model predictive control incurs a heavy online computational burden. This paper proposes a model predictive torque control strategy for NPC three-level inverters with permanent magnet synchronous motor systems. First, the relationship among the stator flux linkage vector position, the torque–flux linkage increment, and the stator flux linkage variation is analyzed. Then, the candidate voltage vector sector is determined, and the candidate voltage vectors are selected from it. Meanwhile, the direction of the load current flowing to the neutral point and the voltage difference between the upper and lower capacitors are evaluated. As a result, redundant small vectors are effectively selected, reducing the number of candidate voltage vectors to six and avoiding the computation of all possible vectors. The experimental results from an NPC three-level inverter–permanent magnet synchronous motor system verify that this strategy significantly reduces the computational complexity and provides excellent dynamic and steady-state performance. Full article

In this study, we propose an active junction temperature control method specifically tailored for traction inverters based on active neutral point-clamped (ANPC) three-level topology. This approach not only enables real-time junction temperature equalization across switching devices, but also minimizes switching losses while preserving synchronous modulation. The methodology begins with a detailed formulation of the loss quantification model for ANPC inverters, establishing the relationship between predicted losses and switching vectors. Building on this foundation, we develop a loss equalization modulation control strategy featuring closed-loop loss control. The effectiveness and practicality of the proposed control method are rigorously validated using simulations and low-power experimental testing, demonstrating its potential to enhance both the reliability and efficiency of traction inverters. Full article

This paper proposes an Advanced Hybrid SVPWM (Space Vector Pulse Width Modulation) technique that integrates the benefits of RPS-PWM (Reference Point Saturation-Based PWM) and SVPWM to enhance the performance of three-level ANPC (Active Neutral Point Clamped) inverters. While RPS-PWM effectively reduces switching harmonics, it suffers from lower voltage utilization. In contrast, SVPWM achieves higher voltage utilization but struggles with harmonic suppression. The proposed Advanced Hybrid SVPWM technique addresses these limitations by maintaining the voltage utilization level of RPS-PWM while significantly reducing harmonic distortion and increasing the output $V_{rms}$. To validate the effectiveness of the proposed method, comprehensive PSIM simulations and DSP-based hardware experiments were conducted. Experimental results confirm that the Advanced Hybrid SVPWM achieves superior harmonic suppression compared to conventional RPS-PWM and SVPWM, while also delivering improved output voltage characteristics. These findings highlight the potential of the proposed technique for enhancing the performance of power electronic systems requiring high efficiency and low harmonic distortion. Full article

The three-level simplified neutral point clamped (3L-SNPC) inverter has received increasing attention in recent years due to its potential applications in electrical drives and smart grids with renewable energy integration. However, most existing research has primarily focused on control development, with limited studies investigating modulation strategies or analyzing inverter losses under varying operating conditions. These aspects are critical for practical industrial applications. To address this gap, this paper proposes a novel carrier-based space vector pulse width modulation (CB-SVPWM) strategy for the 3L-SNPC inverter, aimed at simplifying PWM implementation and reducing cost. The proposed modulation strategy is experimentally evaluated by comparing inverter losses and total harmonic distortion with those of the conventional three-level neutral point clamped (3L-NPC) inverter under an equivalent carrier-based modulation scheme. A comprehensive comparative analysis is conducted across the full modulation range to demonstrate the effectiveness of the proposed approach, achieving a 13.2% reduction in total power loss, a 33.6% improvement in execution time, and maintaining a comparable weighted total harmonic distortion (WTHD) with a deviation within 0.04% of the conventional 3L-NPC inverter. Full article

The three-level neutral-point clamped inverter represents a significant advancement in direct torque-control systems for asynchronous motors. A significant achievement of this study lies in the comprehensive analysis of a random frequency-modulation algorithm, which demonstrates its efficacy in substantially reducing the amplitude of harmonic oscillations and minimizing switching losses. This simplifies filter design and minimizes thermal dissipation in power transistors, thereby enhancing the overall reliability and efficiency of the system. Additionally, the implementation of a six-position torque regulator with a fixed sensitivity zone, applied in direct torque control based on the three-level inverter, improves the stability of the stator flux linkage and reduces the switching frequency of transistors. Numerical simulations conducted in the Matlab/Simulink environment indicate that the proposed algorithm reduces switching losses by 15% during transient states and by 2% during steady-state operation while increasing the system’s efficiency by 2% compared to conventional methods. These findings highlight the potential of the proposed solutions for application in energy-efficient drive systems. Full article

The paper presents the practical design and implementation of a three-level neutral point clamped (TNPC) six-phase inverter rated at 100 kVA. The study initiates with prior work review, whereby most research work done earlier was mainly simulation-based. Based on the simulation results, this paper focuses on the practical aspects of inverter design, such as the development of a power board on an Insulated Metal Substrate, a gate driver board, an interconnect board, and the main control board. An inverter physical prototype has been built and tested at 500 V and 20 kW of output power. The SiC semiconductor technology is the base of the inverter, which represents the main merit of the work. Finally, high power density, compact design, and high efficiency are shown, which are major contributions of the paper. Tests performed proved that the designed converter was operating reliably and efficiently. While a simple Sinusoidal Pulse Width Modulation (SPWM) control algorithm has been implemented, the overall performance of the inverter showed great promise for higher-power applications. Compact and high-efficiency TNPC converters are developed for meeting increasing demands of advanced energy, automotive, and industrial applications. Full article

Multi-level inverters have characteristics suitable for high-voltage and high-power applications through various topology configurations. These reduce harmonic distortion and improve the quality of the output waveform by generating a multi-level output voltage waveform. In particular, an active neutral-point-clamped topology is one of the multi-level inverters advantageous for high-power and medium-voltage applications. It has the advantage of controlling the output waveform more precisely by actively clamping the neutral point using an active switch and diode. However, it has a problem, which is that an unwanted zero-crossing current may occur if an inaccurate switching signal is applied at the time when the polarity of the output voltage changes. In this paper, a control strategy to suppress the zero-crossing current of a single-phase half-bridge three-level active neutral-point-clamped inverter is proposed. The operating principle of a single-phase half-bridge three-level active neutral-point-clamped inverter is identified through an operation mode analysis. In addition, how the switching signal is reflected in an actual digital signal processor is analyzed to determine the situation in which the zero-crossing current occurs. Through this, a control strategy capable of suppressing zero-crossing current is designed. The proposed method prevents a zero-crossing current by appropriately modifying the update timing of reference voltages at the point where the polarity of the output changes. The validity of the proposed method is verified through simulation and experiments. Based on the proposed method, the total harmonic distortion of the output current is significantly reduced from 12.15% to 4.59% in a full-load situation. Full article

Multilevel inverters with improved voltage quality are widely used in applications such as motor control and electric vehicles. The four-level active neutral point clamped (4L-ANPC) inverter effectively meets the demands for high power density and low device voltage stress. However, balancing the capacitor voltage and reducing its low-frequency voltage fluctuation are critical challenges that need to be addressed. To address these challenges, this paper proposes a “variable reference + zero-sequence injection” method that requires only three reference voltage signals to determine the injected zero-sequence components. Particularly, the expression of the midpoint current, regarding the modulation index and phase current amplitude, is theoretically derived. This reveals the fundamental connection between the zero-sequence voltage signal and the midpoint current, providing a theoretical foundation for the zero-sequence injection method in four-level inverters. Subsequently, a simulation model and an experimental platform of the 4L-ANPC inverter were developed to compare and analyze the waveforms of the upper and lower capacitor voltages, phase currents, and line voltages under different modulation methods. Additionally, the upper and lower capacitor voltage waveforms were examined for various modulation indices. The results indicate that as the modulation index increases, the low-frequency voltage fluctuation in the upper and lower capacitor voltages also rises. At a modulation index of 0.95, the “variable reference + zero-sequence injection” method effectively suppresses the fluctuation in the upper and lower capacitor voltages to be no more than 1 V. These experimental findings validate the effectiveness of the proposed method. Full article

The three-level neutral-point-clamped (NPC) active power filter (APF) is suitable for harmonic compensation in high voltage and large capacity applications. And, the harmonic compensation effect of APF depends on its dynamic performance and control. This paper propose a repeat proportional integral (PI) decoupling control strategy with linear active disturbance rejection (LADRC) to address the issues of detection in complex harmonic current and power supply current distortion when the nonlinear load varies. To simplify the design of LADRC, this paper adopts inverter current feedback control. Firstly, repeat control is introduced to optimize the traditional PI controller, which improves the compensation accuracy while ensuring the dynamic response capability of the control system. Then, to address the serious coupling of the system model in the d-q coordinate system, a reduced order linear active disturbance rejection (LADRC) control is introduced. The PI and linear extended state observer (LESO) control method is adopted in the outer voltage loop to maintain stable DC voltage and improve the ability to suppress voltage overshoot during grid connection. The effectiveness of this control method has been verified through MATLAB/Simlink. The results show that, compared with the repeat PI method, the control method based on repeat PI–LADRC can achieve better decoupling control, improve robustness and anti-interference ability, enhance the performance of the original system, and can significantly improve the harmonic suppression capability of the APF. Full article

Voltage source inverters are extensively used in the grid connection of renewable energy-sourced generators, and multilevel converters, in particular, have attracted a great deal of attention in recent years. This paper investigates the application of a novel passivity-based sliding mode (PSM) control scheme on three-level grid-tie active Neutral-Point-Clamped (ANPC) inverters that yield fast and stable responses to grid impedance variations. Simulation studies confirm that this control scheme can produce high tracking performance and is also robust against grid load variations. Furthermore, to enhance ANPC efficiency, the loss distribution of switching devices controlled by the proposed strategy is evaluated. An optimal scheme is finally proposed for allocating silicon and Wide-Band-Gap switching devices, resulting in a hybrid ANPC inverter capable of achieving a desirable trade-off between the power losses and the device cost. Full article

The classical four-level nested neutral point-clamped (4L NNPC) inverter-leg is a hybrid of the flying-capacitor and diode-clamped 4L-inverter-leg configurations. Though uniform reduced voltage stress (1/3 of input voltage) on constituting switches is evident in the 4L NNPC inverter-leg, trails of the drawbacks of the diode-clamping concept still exist. With the significantly rated off-the-shelf IGBT switch modules (6.5 kV, 1200 A), chances of deployment of the newly evolved Four-Level Nested T-Type inverter (4L NTTI) in certain applications is high. Compared with the classical 4L NNPC inverter, 4L NTTI involves a smaller number of power switches and low conduction losses. However, in 4L NTTI, two of the six active switches have a blocking voltage rating of 2/3 of the input voltage. Considering this limiting topological feature in 4L NTTI, a six-switch inverter-leg for the four-level active neutral point-clamped (4L ANNPC) inverter is presented in this paper. In the proposed 4L ANNPC inverter-leg, only one switch has a voltage stress of 2/3 of the input voltage. This ameliorated voltage stress translates to low-cost and -loss inverter implementation. The operational characteristics and competitiveness of the 4L ANNPC inverter are analyzed in detail and demonstrated with a prototype. Full article