Special Issue "Selected Papers from the 24th IEEE International Symposium on Asynchronous Circuits and Systems - ASYNC 2018"
A special issue of Journal of Low Power Electronics and Applications (ISSN 2079-9268).
Deadline for manuscript submissions: closed (15 December 2018).
Prof. Milos Krstic
IHP and University of Potsdam, 15236 Frankfurt (Oder), Germany
Interests: GALS; asynchronous circuit design; fault tolerance
Prof. Matthias Függer
CNRS & LSV, ENS Paris-Saclay, Université Paris Saclay, France
Website | E-Mail
Interests: theory of distributed algorithms; VLSI circuits; robust algorithms and circuits; distributed computation in dynamic networks; algorithms implemented in silicon; algorithms implemented in (micro)biological systems (bacterial colonies, viruses)
The International Symposium on Asynchronous Circuits and Systems (ASYNC) is the premier forum for researchers to present their latest findings in asynchronous design. For this Special Issue of JLPEA, we invite the authors of the papers published at the ASYNC 2018 conference to submit extended versions of their papers. However, it is also open for other paper submissions in the research field.
Authors are invited to submit papers on any aspect of asynchronous design, ranging from design, synthesis, and test to asynchronous applications. Topics of interest include the following:
- Asynchronous pipelines, architectures, CPUs, and memories
- Asynchronous, ultra-low power systems, energy harvesting, and mixed-signal/analogue
- Asynchrony in emerging technologies, including bio, neural, nano, and quantum computing
- CAD tools for asynchronous design, synthesis, analysis, and optimization
- Formal methods for verification and performance/power analysis
- Test, security, fault tolerance, and radiation hard design
- Asynchronous variability-tolerant design, resilient design, and design for manufacturing
- Asynchronous design for neural networks and machine learning applications
- Asynchronous circuit designs, case studies, comparisons, and applications
- Mixed-timed circuits, clock domain crossing, GALS systems, Network-on-Chip, and multi-chip interconnects
- Hardware implementations of asynchronous models and algorithms, asynchronous techniques in clocked designs, and elastic and latency-tolerant synchronous design
The papers will receive a peer review by experts in the field of the paper.
This review process will be single-blind, and the authors should include their names and affiliations on their paper.
Prof. Milos Krstic
Dr. Ian W. Jones
Prof. Andreas Steininger
Prof. Matthias Függer
Manuscript Submission Information
Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All papers will be peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.
Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Journal of Low Power Electronics and Applications is an international peer-reviewed open access quarterly journal published by MDPI.
Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 1000 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.
- asynchronous design
- CAD tools
- clock-domain crossing