Special Issue "Cryptographic Hardware for Embedded Systems"

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Computer Science & Engineering".

Deadline for manuscript submissions: closed (31 May 2017).

Special Issue Editors

Guest Editor
Dr. Arnaud Tisserand

CNRS - LabSTICC - Centre Recherche Hugygens, Rue St Maudé, 56321 Lorient, France
Website | E-Mail
Interests: hardware computer arithmetic; circuit design; applied cryptography
Guest Editor
Dr. Karim Bigou

LabSTICC - Univ. Bretagne Occidentale, 20 avenue Le Gorgeu, 29238 Brest Cedex 3, France
E-Mail
Interests: applied cryptography; computer arithmetic; hardware implementation

Special Issue Information

Dear Colleagues,

Secure embedded systems are used in an always increasing number of personal, industrial and government applications, such as smart cards, e-business, mobile communications, transportations, medical/health devices, sensor networks, internet of things, etc. The security of these systems is a major societal and economic issue. High security level is required in those systems and is achieved using strong cryptographic solutions. Then cryptographic hardware is a key for high performances, low energy consumption and high security.

This Special Issue on “Cryptographic Hardware for Embedded Systems” is intended to present new architectures and design methods for ASICs (application specific integrated circuits), FPGAs (field programmable gate arrays) and SoCs (System on Chips) devices applied to all aspects of hardware cryptography.

High quality technical articles will be reviewed by top experts in the field. Authors are invited to submit a manuscript to the Special Issue in the list of relevant topics below (but not limited to). Submitted papers with hardware implementation results and detailed comparisons to state-of-the-art solutions are highly encouraged.

Dr. Arnaud Tisserand
Dr. Karim Bigou
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All papers will be peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 1400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

 

Keywords

  • Hardware architectures and implementations for symmetric, asymmetric and new emerging cryptographic solutions
  • Hardware TRNGs and PRNGs (true/pseudo random number generators) and PUFs (physical unclonable functions). Hardware protections and countermeasures against side channels attacks, fault injection attacks and reverse engineering. Computer aided design methods for hardware circuits protection (physical attacks, anti-counterfeiting, verification, etc.). Reconfigurable hardware for cryptography
  • Special-purpose hardware for cryptanalysis
  • Hardware support for trusted computing platforms

Published Papers (1 paper)

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Research

Open AccessArticle
Design And Implementation of Low Area/Power Elliptic Curve Digital Signature Hardware Core
Electronics 2017, 6(2), 46; https://doi.org/10.3390/electronics6020046
Received: 30 December 2016 / Revised: 2 June 2017 / Accepted: 7 June 2017 / Published: 19 June 2017
Cited by 5 | PDF Full-text (1421 KB) | HTML Full-text | XML Full-text
Abstract
The Elliptic Curve Digital Signature Algorithm(ECDSA) is the analog to the Digital Signature Algorithm(DSA). Based on the elliptic curve, which uses a small key compared to the others public-key algorithms, ECDSA is the most suitable scheme for environments where processor power and storage [...] Read more.
The Elliptic Curve Digital Signature Algorithm(ECDSA) is the analog to the Digital Signature Algorithm(DSA). Based on the elliptic curve, which uses a small key compared to the others public-key algorithms, ECDSA is the most suitable scheme for environments where processor power and storage are limited. This paper focuses on the hardware implementation of the ECDSA over elliptic curveswith the 163-bit key length recommended by the NIST (National Institute of Standards and Technology). It offers two services: signature generation and signature verification. The proposed processor integrates an ECC IP, a Secure Hash Standard 2 IP (SHA-2 Ip) and Random Number Generator IP (RNG IP). Thus, all IPs will be optimized, and different types of RNG will be implemented in order to choose the most appropriate one. A co-simulation was done to verify the ECDSA processor using MATLAB Software. All modules were implemented on a Xilinx Virtex 5 ML 50 FPGA platform; they require respectively 9670 slices, 2530 slices and 18,504 slices. FPGA implementations represent generally the first step for obtaining faster ASIC implementations. Further, the proposed design was also implemented on an ASIC CMOS 45-nm technology; it requires a 0.257 mm2 area cell achieving a maximum frequency of 532 MHz and consumes 63.444 (mW). Furthermore, in this paper, we analyze the security of our proposed ECDSA processor against the no correctness check for input points and restart attacks. Full article
(This article belongs to the Special Issue Cryptographic Hardware for Embedded Systems)
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