Implementation of a Wide Input Voltage Resonant Converter with Voltage Doubler Rectifier Topology

Abstract

A new circuit structure of LLC converter is studied and implemented to achieve wide zero-voltage switching range and wide voltage operation such as consumer power units without power factor correction and long hold up time demand, battery chargers, photovoltaic converters and renewable power electronic converters. The dc converter with the different secondary winding turns is adopted and investigated to achieve the wide input voltage operation (50–400 V). To meet wide voltage operation, the full bridge and half bridge dc/dc converters with different secondary turns can be selected in the presented circuit to have three different voltage gains. According to input voltage range, the variable frequency scheme is employed to have the variable voltage gain to overcome the wide input voltage operation. Therefore, the wide soft switching load variation and wide voltage operation range are achieved in the presented resonant circuit. The prototype circuit is built and tested and the experiments are demonstrated to investigate the circuit performance.

1. Introduction

Power electronics are more and more important for the energy conversion systems such as renewable power conversion, electric vehicle systems, traction vehicles, light rail vehicles, dc nano- or micro-grid systems, battery-based storage systems, personal computer power units and industry power units. Power semiconductors such as insulated gate bipolar transistors (IGBTs), Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), Gallium Nitride (GaN) FET and Silicon Carbide (SiC) devices are widely used power switches in power electronic circuits. However, IGBT devices have low switching frequency problem. GaN and SiC devices have the advantages of low switching loss and high frequency operation. However, the cost of GaN and SiC is much more expensive than the IGBT and MOSFET devices. Compared to IGBT, GaN and SiC devices, MOSFET elements have low cost and medium frequency operation for modern power converters. Pulse-width modulation (PWM) power electronic circuits have been widely studied and developed in power electronics to lessen reduce global warming and air pollution problems. The dc-dc or dc-ac power converters are the most attractive interface circuits between the photovoltaic (PV) cells (or fuel cells) and the utility dc or ac voltage. However, the output voltage of PV cells, fuel cells and dc wind turbine power generators is not constant and related to solar intensity or wind speed. Conventional duty cycle control converters [1,2,3,4] and frequency control converters [5,6,7] cannot be operated well under wide voltage variation condition due to the limit voltage gain of power converters. Multi-stage dc converters with parallel or series structure [8,9,10,11] have been researched to overcome wide voltage variation problem and used for renewable energy conversion and battery charger applications. However, the disadvantages of multi stage dc-dc converters have low reliability and more active and passive power components. Two full bridge circuits structure was presented in [12] to overcome limit voltage range problem of conventional resonant converters. However, sixteen power semiconductors are used in this circuit structure. The conventional LLC converter with two sets of secondary windings was studied in [13] to have wide hold-up time operation for PC power units. The main drawbacks of this circuit structure are four secondary windings and large copper losses. The resonant converter with interleaved duty cycle control was achieved in [14] to overcome wide voltage variation problem and achieve low current ripple input. However, the circuit topology is still the multi stage converter.

The new resonant converter with voltage doubler configuration and two sets of secondary windings is presented in this paper to accomplish soft switching operation and overcome wide voltage input variation (V_in = 50–400 V). According to the input voltage range, the present LLC converter can be operated under full bridge resonant structure or half bridge resonant structure with different secondary turns. Therefore, the proposed converter has much wide range of input voltage operation. When V_in = 50–100 V (low voltage region), the full bridge type LLC circuit with more secondary turns is operated to have high voltage gain. If V_in = 100–200 V (medium voltage input region), the full bridge type LLC circuit with fewer secondary turns is adopted to have less dc voltage gain. If V_in = 200–400 V (high voltage input region), the half bridge structure is used to obtain the lowest voltage gain on the presented circuit. With the proposed control strategy, the wide voltage operation (V_in = 50–400 V) is accomplished in the presented circuit structure. Since the proposed resonant circuit is controlled under the variable switching frequency with input inductive impedance operation, the active switches have soft switching turn-on characteristic. The voltage doubler rectification structure can reduce the voltage rating of diodes compared to the center-tapped rectifier topology. Thus, the diode conduction loss can be reduced. The proposed LLC converter has less circuit components compared to the wide voltage resonant converter presented in [8,9,10,11,12,13,14]. Finally, the experimental verifications are provided to demonstrate the performance of the studied LLC resonant circuit.

2. Circuit Configuration and Principles of Operation

The conventional resonant converters with half bridge or full bridge structure are provided in Figure 1. The fundamental root-mean-square (rms) input voltage of full bridge structure is two times of the fundamental rms input voltage of half bridge structure. Therefore, the full bridge resonant converter has more power capability than the half bridge resonant converter. Owing to the center-tapped rectification structure, the diodes D₁ and D₂ has at least 2V_o voltage stress. The other disadvantage of the center-tapped rectifier is two winding sets are needed on the secondary side of transformer T. For high load current applications, there are more copper losses on the secondary windings.

Figure 1. Structures of the conventional LLC converters: (a) full bridge LLC structure; (b) half bridge LLC structure.

The proposed LLC hybrid converter is provided in Figure 2a to overcome the disadvantage of narrow voltage range in conventional LLC converter. The adopted circuit comprises a full bridge resonant circuit and a voltage double rectifier with variable winding turns to have wide voltage operation capability (50–400 V) and wide soft switching operation. L_r is the series resonant inductance, L_m is the magnetizing inductance and C_r is the series resonant capacitance. According to the switching status of S₁–S₄, the converter can operate as the full bridge circuit structure (Figure 2b,c) or half bridge circuit structure (Figure 2d). The LLC resonant tank with C_r, L_r and L_m is operated with variable frequency to have inductive input impedance and zero-voltage turn-on switching for all devices S₁–S₄. The variable secondary turns are controlled by S_ac to achieve different voltage gains. S_ac is realized with two back-to-back MOSFETs. According to the adopted circuit configuration, the converter has three operation sub-circuits under three different input voltage regions. Figure 2b–d give the equivalent circuits for low, medium and high input voltage conditions respectively. If 50 V < V_in < 100 V (low voltage region V_in,L), then switches S₁–S₄ are controlled by frequency modulation and S_ac is in the on-state. Figure 2b gives the circuit diagram for low input voltage operation. The voltage v_ab has voltage level V_in or −V_in. The 2n_s winding turns and diodes D₁ and D₂ are connected to output load. The voltage gain under low input voltage region is obtained as V_o/V_in,L = G_ac(f_sw)(4n_s)/n_p, where G_ac(f) is the voltage transfer function of resonant tank. From the conduction states of the power semiconductors, the circuit in Figure 2b has six or four states in one switching period under the f_r (series resonant frequency) > or < f_sw (switching frequency). If 100 V < V_in < 200 V (medium voltage region V_in,M), S_ac turns off and Figure 2c gives the equivalent circuit configuration. It is clear to observe that D₂ and D₁ are off. The n_s winding turns and diodes D₃ and D₄ are connected to load.

Figure 2. Proposed converter: (a) circuit diagram; (b) low input voltage region; (c) medium input voltage region; (d) high input voltage region.

The voltage gain in Figure 2c is V_o/V_in,M = G_ac(f_sw)(2n_s)/n_p. If 200 V < V_in < 400 V (high voltage region V_in,H), the active switches S₃ and S_ac are turned off and S₄ is always in the on-state. Figure 2d illustrates the circuit diagram operated at high voltage region. The leg voltage v_ab has voltage level V_in or 0. Only n_s winding turns and diodes D₃ and D₄ are connected to load. The voltage gain in Figure 2d is V_o/V_in,H = G_ac(f_sw)n_s/n_p. From the three voltage gains in previous discussion, it can observe that V_o/V_in,L = G_ac(f_sw)(4n_s)/n_p = 2V_o/V_in,M = 4V_o/V_in,H. Thus, one can conclude that V_in,H = 2V_in,M = 4V_in,L. Therefore, the proposed LLC converter has the highest voltage gain at low voltage region V_in,L and the lowest voltage gain at high voltage region V_in,H.

2.1. Low Voltage Region (V_in,L: 50–100 V)

When S_ac is in the on-state, the LLC converter has less transformer turns-ratio n_p/(2n_s) and large voltage gain. Under this condition, the rectifier diodes D₃ and D₄ are always off. The voltage gain of the converter is obtained as V_o/V_in,L = G_ac(f_sw)(4n_s)/n_p. From the gating signals of S₁–S₄ and the on/off state of D₁ and D₂, six equivalent operating states per switching periods are provided in Figure 3.

Figure 3. LLC converter at low input voltage region: (a) key PWM waveforms; (b) state 1 equivalent circuit; (c) state 2 equivalent circuit; (d) state 3 equivalent circuit; (e) state 4 equivalent circuit; (f) state 5 equivalent circuit; (g) state 6 equivalent circuit.

State 1 [t₀–t₁]: When t = t₀, v_CS1 = v_CS4 = 0 V. Power devices S₄ and S₁ turn on at this moment to realize soft switching operation due to i_Lr(t₀) < 0. Since i_Lr > i_Lm, D₁ conducts in this state. In state 1, v_ab = V_in,L, v_Lm = (V_Co1n_p)/(2n_s) ≈ (V_on_p)/(4n_s) and i_Lm increases. The resonant frequency of the LLC converter in this state is $f_{r,1}=1/[2\pi \sqrt{L_r{C}_r}]$. If f_r,1 > or < f_sw, then the circuit operation will go to state 2 or 3.

State 2 [t₁–t₂]: When i_D1 = 0 at t₁, D₁ is turned off with zero-current switching. The resonant frequency in state 2 is $f_{r,2}=1/[2\pi \sqrt{C_r(L_r+L_m)}]$. It is obvious that f_r,1 > f_r,2. The current variation on L_m approximates $\Delta i_{Lm}\approx \left(n_p{V}_o)/(8n_s{L}_m{f}_{sw}\right)$ and the magnetizing current i_Lm at t₂ is $i_{Lm}(t_2)=\Delta i_{Lm}/2\approx (n_p{V}_o)/(16n_s{L}_m{f}_{sw})$.

State 3 [t₂–t₃]: Power devices S₁ and S₄ are off at time t₂. Since i_Lr(t₂) is positive, v_CS3 and v_CS2 are decreased. Due to i_Lm(t₂) > i_Lr(t₂), D₂ is conducting. To ensure the soft switching turn-on of S₃ and S₂, the current i_Lm(t₂) must be greater than $V_{in,L}\sqrt{C_{oss}/(L_m+L_r)}$ where C_oss = C_S1 = … = C_S4. The other necessary condition for zero-voltage switching is that the dead time t_d between S₂ and S₁ is greater than time interval in state 3. To accomplish this condition, one can obtain $L_{m,\max }=(t_d{V}_o{n}_p)/(32C_{oss}{n}_s{f}_{sw}{V}_{in,L})$.

State 4 [t₃–t₄]: At time t₃, v_CS2 = v_CS3 = 0 V. At this moment, power devices S₃ and S₂ are turned on under zero voltage. Owing to i_Lm(t₃) > i_Lr(t₃), D₂ conducts. In state 2, v_ab = −V_in,L, v_Lm = −(V_Co2n_p)/(2n_s) ≈ −(V_on_p)/(4n_s), i_Lm decreases and C_o1 (C_o2) is discharged (charged). If f_r,1 > or < f_sw, then the circuit operation will go to state 4 or 6.

State 5 [t₄–t₅]: If f_r,1 > f_sw, one obtains i_D2 equals 0 at t₄. Then, D₂ turns off. The resonant frequency in state 4 is $f_{r,2}=1/[2\pi \sqrt{C_r(L_r+L_m)}]$. The magnetizing current i_Lm at t₅ approximates $i_{Lm}(t_5)\approx -(n_p{V}_o)/(16n_s{L}_m{f}_{sw})$.

State 6 [t₅–T_sw + t₀]: S₃ and S₂ turn off at t₅. C_S1 and C_S4 are discharged owing to i_Lr(t₅) < 0. Since i_Lr(t₅) > i_Lm(t₅), the rectifier diode D₁ conducts. To achieve soft switching turn-on of S₄ and S₁, the magnetizing inductor current i_Lm at t₅ is obtained and expressed as $|i_{Lm}(t_5)|\ge V_{in,L}\sqrt{C_{oss}/(L_m+L_r)}$.

2.2. Medium Voltage Region (V_in,M: 100–200 V)

If V_in is in the medium voltage region between 100 V and 200 V, the switch S_ac is tuned off. The converter has low transformer turns-ratio n_p/n_s and less voltage gain. The circuit diagram is shown in Figure 2c. The voltage gain at medium voltage operation is equal to V_o/V_in,M = G_ac(f_sw)(2n_s)/n_p. Figure 4 shows the key PWM waveforms and state circuits for medium voltage operation (100–200 V).

Figure 4. LLC converter at medium input voltage region: (a) key PWM waveforms; (b) state 1 equivalent circuit; (c) state 2 equivalent circuit; (d) state 3 equivalent circuit; (e) state 4 equivalent circuit; (f) state 5 equivalent circuit; (g) state 6 equivalent circuit.

State 1 [t₀–t₁]: The drain-to-source voltages of S₁ and S₄ are decreased and equal to zero at t₀. Due to i_Lr(t₀) < 0, the primary-side current i_Lr flows through the anti-parallel diodes D_S4 and D_S1. Power devices S₄ and S₁ turn on at this moment to accomplish soft switching turn-on. Since i_Lr > i_Lm, D₃ conducts. From Figure 4b, it can obtain that v_ab = V_in, v_Lm ≈ (V_on_p)/(2n_s), i_Lm increases and the resonant frequency $f_{r,1}=1/[2\pi \sqrt{L_r{C}_r}]$. In this state, C_o1 is charged and C_o2 is discharged.

State 2 [t₁–t₂]: If f_r,1 > f_sw, then i_D3 is decreased to zero ampere at time t₁ and D₃ turns off at zero-current switching. Then, the resonant frequency in state 2 is $f_{r,2}=1/[2\pi \sqrt{C_r(L_r+L_m)}]$. The magnetizing current i_Lm at the end of this state is $i_{Lm}(t_2)\approx (n_p{V}_o)/(8n_s{L}_m{f}_{sw})$.

State 3 [t₂–t₃]: Power devices S₄ and S₁ are turned off in state 3. The positive primary current i_Lr(t₂) will discharge C_S2 and C_S3. Owing to i_Lm(t₂) > i_Lr(t₂), D₄ on the output-side is conducting. The soft switching turn-on condition of S₃ and S₂ is $i_{Lm}(t_2)\ge V_{in,M}\sqrt{C_{oss}/(L_m+L_r)}$. To ensure v_CS2 = v_CS3 = 0 at t₃, the maximum magnetizing inductance L_m,max is obtained as $L_{m,\max }=(t_d{V}_o{n}_p)/(16C_{oss}{n}_s{f}_{sw}{V}_{in,M})$.

State 4 [t₃–t₄]: The v_CS3 and v_CS2 are decreased to zero at t₃. The primary-side current i_Lr(t₃) is positive and flows through the body diodes D_S2 and D_s3. At this moment, power devices S₃ and S₂ turn on to realize zero-voltage switching. Since i_Lm(t₃) > i_Lr(t₃), D₄ conducts. From Figure 4e, it can obtain that v_ab = −V_in, v_Lm ≈ −(V_on_p)/(2n_s) and i_Lm decreases. The output capacitors C_o1 and C_o2 are discharged and charged.

State 5 [t₄–t₅]: i_D4 is decreased and equal to zero at t₄. Then, D₄ turns off. The resonant frequency in state 5 is $f_{r,2}=1/[2\pi \sqrt{C_r(L_r+L_m)}]$. The magnetizing current i_Lm at t₅ approximates $i_{Lm}(t_5)\approx -(n_p{V}_o)/(8n_s{L}_m{f}_{sw})$.

State 6 [t₅–T_sw + t₀]: Power devices S₃ and S₂ turn off in this state. i_Lr(t₅) is negative and discharges C_S1 and C_S4. Since i_Lr(t₅) > i_Lm(t₆), D₃ is conducting. The soft switching turn-on condition of S₄ and S₁ is obtained as $|i_{Lm}(t_5)|\ge V_{in,M}\sqrt{C_{oss}/(L_m+L_r)}$.

2.3. High Voltage Region (V_in,H: 200–400 V)

When V_in is increased from 200 V to 400 V, the presented circuit is controlled under high input voltage region. Power devices S₃ and S_ac turn off and S₄ turns on. Only power semiconductors S₂ and S₁ are controlled with frequency modulation so that the half bridge LLC resonant circuit (S₁, S₂, S₄, L_r, C_r and T) is operated on the input-side. The voltage gain of the converter at high voltage region is V_o/V_in,H = G_ac(f_sw)n_s/n_p. From the on/off state of D₃, D₄, S₁ and S₂, six equivalent operating states per switching periods can be observed in Figure 5 for high input voltage range (200–400 V).

Figure 5. LLC converter at low high voltage region: (a) key PWM waveforms; (b) state 1 equivalent circuit; (c) state 2 equivalent circuit; (d) state 3 equivalent circuit; (e) state 4 equivalent circuit; (f) state 5 equivalent circuit; (g) state 6 equivalent circuit.

State 1 [t₀–t₁]: The capacitor voltage v_CS1 = 0 at time t₀. The primary-side current i_Lr(t₀) is negative so that the body diode D_S1 conducts and the leg voltage v_ab = V_in. Due to i_Lr > i_Lm, D₃ is forward biased. The inductor voltage v_Lm ≈ (V_on_p)/(2n_s). The resonant frequency $f_{r,1}=1/[2\pi \sqrt{L_r{C}_r}]$ and C_o1 is charged in this state.

State 2 [t₁–t₂]: If f_r,1 > f_sw, i_D3 = 0 at time t₁. Then D₃ is turned off at zero-current switching. The resonant frequency in state 2 is expressed as $f_{r,2}=1/[2\pi \sqrt{C_r(L_r+L_m)}]$. At time t₂, $i_{Lm}(t_2)\approx (n_p{V}_o)/(8n_s{L}_m{f}_{sw})$ and S₁ turns off.

State 3 [t₂–t₃]: Power device S₁ is turned off in this state. The primary current i_Lr(t₂) is positive and discharges C_S2. To ensure the soft switching turn-on of S₂, the inductor current i_Lm(t₂) must greater than $V_{in,H}\sqrt{2C_{oss}/(L_m+L_r)}$. The other necessary condition for zero-voltage switching is that the dead time t_d between S₂ and S₁ is greater than time interval in state 3. To achieve this condition, the magnetizing inductance can obtain $L_{m,\max }=(t_d{V}_o{n}_p)/(16C_{oss}{n}_s{f}_{sw}{V}_{in,H})$.

State 4 [t₃–t₄]: The drain-to-source voltage v_CS2 = 0 at t₃. The primary current i_Lr(t₃) > 0 and i_Lr flows through the body diode D_S2. At this moment, S₂ turns on to have zero-voltage switching operation. Since i_Lr(t₃) < i_Lm(t₃), D₄ is conducting. From Figure 5e, it is clear that v_ab = 0, v_Lm ≈ −(V_on_p)/(2n_s) and i_Lm decreases.

State 5 [t₄–t₅]: i_D4 is decreased to zero at time t₄ and D₄ turns off at zero-current switching. The resonant frequency in state 5 is $f_{r,2}=1/[2\pi \sqrt{C_r(L_r+L_m)}]$. S₂ is turned off at the end of this state and i_Lm(t₅) is expressed as $i_{Lm}(t_5)\approx -(n_p{V}_o)/(8n_s{L}_m{f}_{sw})$.

State 6 [t₅–T_sw + t₀]: Owing to i_Lr(t₅) < 0, i_Lr discharge C_S1. The soft switching turn-on of S₁ is $|i_{Lm}(t_5)|\ge V_{in,H}\sqrt{2C_{oss}/(L_m+L_r)}$. The capacitor C_S1 is discharged to zero voltage at time t₀ + T_sw.

3. Circuit Characteristics and Design Example

The proposed LLC resonant converter is operated by variable frequency control. The square voltage waveform is generated on the leg voltage v_ab with voltage values ±V_in in Figure 2b,c or V_in and 0 in Figure 2d. The circuit characteristics of the converter are based on the fundamental frequency analysis. Figure 6 gives the equivalent resonant circuit on the input-side. R_e,ac is the primary-side resistance of transformer T and v_ab,rms is the input fundamental voltage. From the leg voltage v_ab in Figure 2, the fundamental root mean square (rms) voltage v_ab,rms can be expressed in Equation (1).

$$v_{ab,rms}=\left\{\begin{array}{ll}\frac{2\sqrt{2}{V}_{in}}{\pi },& \mathrm{in} \mathrm{low} \mathrm{and} \mathrm{medium} \mathrm{input} \mathrm{voltage} \mathrm{regions}\\ \frac{\sqrt{2}{V}_{in}}{\pi },& \mathrm{in} \mathrm{high} \mathrm{input} \mathrm{voltage} \mathrm{region} \end{array}\right.$$

(1)

Figure 6. The equivalent resonant circuit on the primary-side.

In low input voltage operation, S_ac is always in the on-state. The equivalent turns-ratio of transformer T in Figure 2b is n_p/(2n_s) and the rms value of the magnetizing voltage $v_{Lm,rms}=V_o{n}_p/\left(\sqrt{2}\pi n_s\right)$. In medium and high input voltage ranges (Figure 2c,d), S_ac is always in the off-state. The equivalent turns-ratio of transformer T is n_p/n_s. Thus, the rms value of the magnetizing voltage $v_{Lm,rms}=\sqrt{2}{V}_o{n}_p/\left(\pi n_s\right)$. The primary-side equivalent resistance R_e,ac is obtained as $R_{e,ac}={\left(n_p/n_s\right)}^2{R}_o/\left(2{\pi }^2\right)$ in low input voltage operation or $R_{e,ac}=2{\left(n_p/n_s\right)}^2{R}_o/{\pi }^2$ in medium and high input voltage operation. From the resonant circuit in Figure 6, the output/input transfer function is expressed in Equation (2).

$$\left|G_{ac}\left(f_{sw}\right)\right|=1/\sqrt{\frac{\frac{\frac{L_r}{C_r}}{R_{e,ac}^2}{\left[{\left(\frac{f_{sw}}{f_r}\right)}^2-1\right]}^2}{{\left(\frac{f_{sw}}{f_r}\right)}^2}+{\left[1+\frac{{\left(\frac{f_{sw}}{f_r}\right)}^2-1}{\frac{L_m}{L_r}{\left(\frac{f_{sw}}{f_r}\right)}^2}\right]}^2}=\left\{\begin{array}{ll}\frac{V_o{n}_p}{4V_{in,L}{n}_s},& \mathrm{in} \mathrm{low} \mathrm{voltage} \mathrm{region}\\ \frac{V_o{n}_p}{2V_{in,M}{n}_s},& \mathrm{in} \mathrm{medium} \mathrm{voltage} \mathrm{region}\\ \frac{V_o{n}_p}{V_{in,H}{n}_s},& \mathrm{in} \mathrm{high} \mathrm{voltage} \mathrm{region}\end{array}\right.$$

(2)

The output voltage V_o can be expressed in Equations (3)–(5) for low, medium and high input voltage regions.

$$V_o=4V_{in,L}{n}_s/(n_p\sqrt{\frac{\frac{\frac{L_r}{C_r}}{R_{e,ac}^2}{\left[{\left(\frac{f_{sw}}{f_r}\right)}^2-1\right]}^2}{{\left(\frac{f_{sw}}{f_r}\right)}^2}+{\left[1+\frac{{\left(\frac{f_{sw}}{f_r}\right)}^2-1}{\frac{L_m}{L_r}{\left(\frac{f_{sw}}{f_r}\right)}^2}\right]}^2})$$

(3)

$$V_o=2V_{in,M}{n}_s/(n_p\sqrt{\frac{\frac{\frac{L_r}{C_r}}{R_{e,ac}^2}{\left[{\left(\frac{f_{sw}}{f_r}\right)}^2-1\right]}^2}{{\left(\frac{f_{sw}}{f_r}\right)}^2}+{\left[1+\frac{{\left(\frac{f_{sw}}{f_r}\right)}^2-1}{\frac{L_m}{L_r}{\left(\frac{f_{sw}}{f_r}\right)}^2}\right]}^2})$$

(4)

$$V_o=V_{in,H}{n}_s/(n_p\sqrt{\frac{\frac{\frac{L_r}{C_r}}{R_{e,ac}^2}{\left[{\left(\frac{f_{sw}}{f_r}\right)}^2-1\right]}^2}{{\left(\frac{f_{sw}}{f_r}\right)}^2}+{\left[1+\frac{{\left(\frac{f_{sw}}{f_r}\right)}^2-1}{\frac{L_m}{L_r}{\left(\frac{f_{sw}}{f_r}\right)}^2}\right]}^2})$$

(5)

In the proposed circuit, the electric specifications are V_in = 50–400 V, V_o = 48 V and P_o = 500 W. The design resonant frequency f_r = 100 kHz. The assumed inductance ratio L_m/L_r is 6. Since the resonant tank is identical for the operation in low, medium and high voltage ranges as shown in Figure 6, the following design procedures are based on the high input voltage condition (V_in,H = 200–400 V). The assume voltage gain of resonant converter is 0.95 at V_in = 400 V case. Thus, the primary-secondary turn n_p/n_s can be calculated as.

n_p/n_s = G_ac(f_sw)V_in/V_o = 0.95 × 400/48 = 7.916

(6)

The transformer T is implemented by using the magnetic core TDK EE-55 with primary turns n_p = 16 and secondary turns n_s = 2. Therefore, the actual voltage gains at 200 V and 400 V input cases are rewritten as.

G_ac,max = n_pV_o/n_sV_in = 1.92

(7)

G_ac,min = n_pV_o/n_sV_in = 0.96

(8)

According to the winding turns and the load resistor at full load, R_e,ac is calculated in Equation (9).

$$R_{e,ac}=2{(n_p/n_s)}^{2}R/{\pi }^2\approx 60 \mathsf{\Omega }$$

(9)

It is assumed the quality factor $x=\sqrt{L_r/C_r}/$R_ac = 0.1. Then, L_r can be derived in Equation (10).

$$L_r=x{R}_{e,ac}/(2\pi f_r)\approx 10 \mathsf{\mu }\mathrm{H}$$

(10)

From the given inductance ratio L_m/L_r = 6, L_m is calculated as L_m = 6 × L_r = 60 μH. The series resonant capacitance C_r is expressed in Equation (11).

$$C_r=1/(4{\pi }^2{L}_r{f}_r^2)\approx 254 \mathrm{nF}$$

(11)

The maximum voltage rating of S₁–S₄ equals V_in,max (= 400 V). The voltage rating of D₁–D₄ is equal to V_o (= 48 V). Power switches STF40N60M2 (650 V/22 A) are used for S₁–S₄ and switch IXTP160N075T (75 V/160 A) is used for S_ac in the prototype circuit. Power diodes MBR40100PT (100 V/40 A) are adopted in the prototype for the rectifier diodes D₁–D₄. The selected capacitances C_o1 and C_o2 are 940 μF with 100 V voltage rating. The control block of a laboratory prototype is shown in Figure 7a. Two Schmitt voltage comparators (comp 1 and comp 2) with reference voltages at 100 V and 200 V are used to select three input voltage regions. The control unit of the converter is using the integrated circuit UCC25600. The logic gates such as AND and OR gates are used to generate the control PWM signals of S_ac, S₃ and S₄. The relationship between the PWM signals of power switches and the input voltage is provided. It can observe that S_ac is always ON and S₁–S₄ are active if 50 V < V_in < 100 V. If 200 V > V_in > 100 V, S_ac is always OFF and S₁–S₄ are active. When V_in > 200 V, S_ac and S₃ are always OFF, S₄ is always ON, and S₁ and S₂ are active.

Figure 7. Laboratory prototype: (a) circuit diagram and control block; (b) control signal and input voltage.

4. Experimental Results

The experimental waveforms are provided to confirm the effectiveness of the presented resonant converter. Figure 8, Figure 9 and Figure 10 gives the experimental results of PWM signals of S₁–S₄ for low, medium and high input voltage regions, respectively. For low voltage region operation, S_ac always turns on, the 2n_s secondary turns are connected to load and diodes D₃ and D₄ are the reverse biased. The gating signals v_S1,g–v_S4,g under 50 V and 90 V input conditions are provided in Figure 8a,b. The converter operated at V_in = 50 V condition has the low switching frequency compared to 90 V input condition. Figure 8c,d provide the test waveforms of S₁ at 20% and 100% output power under 50 V input condition. Similarly, the test waveforms of S₁ at 20% and 100% output power under 90 V input condition are provided in Figure 8e,f. One can observe the switch S₁ is tuned on at zero voltage switching for both 50 V and 90 V input conditions from 20% output power. Power switches S₂–S₄ have the similar switching characteristics as switch S₁. Thus, the soft switching turn-on of S₁–S₄ can be achieved under low voltage input region. In the same manner, the measured results of S₁–S₄ for medium and high voltage input regions are shown in Figure 9 and Figure 10, respectively. For high voltage input region, the half bridge LLC resonant converter is activated and controlled. Thus, S₃ and S₄ are always turn-off and turn-on as shown in Figure 10a,b, respectively. Figure 11 gives the test waveforms v_ab, v_Cr and i_Lr at V_in = 50 V, 110 V, 190 V and 400 V conditions. In the same manner, the experimental results of the rectifier diode currents, load voltage and load current at V_in = 50 V, 110 V, 190 V and 400 V conditions are shown in Figure 12. For 50 V input case, the studied converter is controlled at low voltage input region and S_ac is turned on. The turns-ratio of transformer T is n_p/2n_s. Diodes D₃ and D₄ are off. Since the studied circuit has much more voltage gain at V_in = 50 V than V_in = 100 V, the circuit operated at V_in = 50 V has less switching frequency. It can observe that D₁ and D₂ turn off without the reverse recovery current loss shown in Figure 12a. For V_in = 110 V (Figure 12b) and 190 V (Figure 12c) conditions, the circuit is operation in medium input voltage range. S_ac is in the off-state and the transformer turns-ratio is n_p/n_s. Diodes D₁ and D₂ are inactive. The voltage gain of the converter operated at V_in = 110 V is greater than V_in = 190 V condition. Therefore, the switching frequency at 110 V input (Figure 11b is less than 190 V input condition (Figure 11c). Since f_sw (switching frequency) at 110 V input is lower than f_r (resonant frequency), D₃ and D₄ are turned off under zero-current switching shown in Figure 12b. For V_in = 400 V input, the resonant converter is operation at high voltage input region. S₃ and S_ac are always turn-off and switch S₄ is always in the on-state. One can observe there is a dc voltage value (V_in/2 = 200 V) on voltage v_Cr shown in Figure 11d. Owing to f_sw > f_r at 400 V input, D₃ and D₄ are turned off with hard switching shown in Figure 12d. The experimental results of V_in, V_Co1, V_Co2 and I_o for different input voltage conditions are provided in Figure 13. It observes that V_Co1 and V_Co2 are balanced well each other under different input voltage conditions. Figure 14a gives the measured input voltage V_in, the gating voltage v_Sac,g and output voltage V_o between 50 V (low voltage region)–130 V (medium voltage region) input. When V_in is lower or greater than 100 V, S_ac turns on (low input voltage range) or off (medium input voltage range). Figure 14b gives test waveforms of V_in, v_S3,g and v_S4,g between V_in = 0 V and 250 V. If V_in is lower (or greater) than 200 V, S₃ is active (or always turn-off) and S₄ is active (or always turn-on). The test PWM signals of S₃, S₄ and S_ac and input voltage V_in shown in Figure 14 are agreed with the theoretical waveforms shown in Figure 7.

Figure 8. Experimental results of PWM signals for low input voltage region: (a) S₁–S₄ at 50 V input and 100% power; (b) S₁–S₄ at 90 V input and 100% power; (c) S₁ voltage and current at 50 V input and 20% power; (d) S₁ voltage and current at V_in = 50 V input and 100% power; (e) S₁ voltage and current at 90 V input and 20% power; (f) S₁ voltage and current at 90 V input and 100% power.

Figure 9. Experimental results of PWM signals for medium input voltage region: (a) S₁–S₄ at 110 V input and 100% power; (b) S₁–S₄ at 190 V input and 100% power; (c) S₁ voltage and current at 110 V input and 20% power; (d) S₁ voltage and current at V_in = 110 V input and 100% power; (e) S₁ voltage and current at 190 V input and 20% power; (f) S₁ voltage and current at 190 V input and 100% power.

Figure 10. Experimental results of PWM signals for high input voltage region: (a) S₁–S₄ at 210 V input and 100% power; (b) S₁–S₄ at 400 V input and 100% power; (c) S₁ voltage and current at 210 V input and 20% power; (d) S₁ voltage and current at V_in = 210 V input and 100% power; (e) S₁ voltage and current at 400 V input and 20% power; (f) S₁ voltage and current at 400 V input and 100% power.

Figure 11. Measured primary-side voltage and current waveforms at 100% load: (a) 50 V input (low voltage range); (b) 110 V input (medium voltage range); (c) 190 V input (medium voltage range); (d) 400 V input (high voltage range).

Figure 12. Experimental results of the secondary-side currents and load voltage at 100% load; (a) 50 V input (low voltage range); (b) 110 V input (medium voltage range); (c) 190 V input (medium voltage range); (d) 400 V input (high voltage range).

Figure 13. Measured results of V_in, V_Co1, V_Co2 and I_o at 100% load: (a) 50 V input (low voltage range); (b) 110 V input (medium voltage range); (c) 190 V input (medium voltage range); (d) 400 V input (high voltage range).

Figure 14. Measured waveforms: (a) V_in, v_Sac and V_o; (b) V_in, v_S3,g and v_S4,g.

5. Conclusions

The hybrid LLC converter with three equivalent sub-circuit topologies is proposed and discussed to realize wide soft switching turn-on and wide voltage input operation. According to the switching status of power devices, the full bridge and half bridge LLC circuit with variable transformer turn-ratio are operated to accomplish wide voltage operation (V_in = 50–400 V). Owing to the LLC circuit tank, power switches have soft switching characteristic at turn-on instant. The presented resonant converter can be applied to dc-dc converters with wide voltage variation capability such as power units in PV power converters, power servers with large hold-up times and battery chargers and dischargers. The experimental results are demonstrated and provided to confirm the effectiveness of the adopted circuit topology.