Vázquez-Castillo, J.; Castillo-Atoche, A.; Carrasco-Alvarez, R.; Longoria-Gandara, O.; Ortegón-Aguilar, J.
FPGA-Based Hardware Matrix Inversion Architecture Using Hybrid Piecewise Polynomial Approximation Systolic Cells. Electronics 2020, 9, 182.
https://doi.org/10.3390/electronics9010182
AMA Style
Vázquez-Castillo J, Castillo-Atoche A, Carrasco-Alvarez R, Longoria-Gandara O, Ortegón-Aguilar J.
FPGA-Based Hardware Matrix Inversion Architecture Using Hybrid Piecewise Polynomial Approximation Systolic Cells. Electronics. 2020; 9(1):182.
https://doi.org/10.3390/electronics9010182
Chicago/Turabian Style
Vázquez-Castillo, Javier, Alejandro Castillo-Atoche, Roberto Carrasco-Alvarez, Omar Longoria-Gandara, and Jaime Ortegón-Aguilar.
2020. "FPGA-Based Hardware Matrix Inversion Architecture Using Hybrid Piecewise Polynomial Approximation Systolic Cells" Electronics 9, no. 1: 182.
https://doi.org/10.3390/electronics9010182
APA Style
Vázquez-Castillo, J., Castillo-Atoche, A., Carrasco-Alvarez, R., Longoria-Gandara, O., & Ortegón-Aguilar, J.
(2020). FPGA-Based Hardware Matrix Inversion Architecture Using Hybrid Piecewise Polynomial Approximation Systolic Cells. Electronics, 9(1), 182.
https://doi.org/10.3390/electronics9010182