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Electronics 2017, 6(3), 67; https://doi.org/10.3390/electronics6030067

Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things

Department of Electrical and Computer Engineering, University of Central Florida, Orlando, FL 32816, USA
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Received: 1 August 2017 / Revised: 30 August 2017 / Accepted: 5 September 2017 / Published: 8 September 2017

Abstract

In this review article for Internet of Things (IoT) applications, important low-power design techniques for digital and mixed-signal analog–digital converter (ADC) circuits are presented. Emerging low voltage logic devices and non-volatile memories (NVMs) beyond CMOS are illustrated. In addition, energy-constrained hardware security issues are reviewed. Specifically, light-weight encryption-based correlational power analysis, successive approximation register (SAR) ADC security using tunnel field effect transistors (FETs), logic obfuscation using silicon nanowire FETs, and all-spin logic devices are highlighted. Furthermore, a novel ultra-low power design using bio-inspired neuromorphic computing and spiking neural network security are discussed. View Full-Text
Keywords: ADC; DPA; emerging technologies; hardware security; neuromorphic computing; side-channel attack; Trojans; tunnel FET; ultra-low power ADC; DPA; emerging technologies; hardware security; neuromorphic computing; side-channel attack; Trojans; tunnel FET; ultra-low power
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).
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Yuan, J.-S.; Lin, J.; Alasad, Q.; Taheri, S. Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things. Electronics 2017, 6, 67.

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