Cortiula, A.; Menin, D.; Bandiziol, A.; Driussi, F.; Palestri, P.
Modeling of Phase-Interpolator-Based Clock and Data Recovery for High-Speed PAM-4 Serial Interfaces. Electronics 2025, 14, 1979.
https://doi.org/10.3390/electronics14101979
AMA Style
Cortiula A, Menin D, Bandiziol A, Driussi F, Palestri P.
Modeling of Phase-Interpolator-Based Clock and Data Recovery for High-Speed PAM-4 Serial Interfaces. Electronics. 2025; 14(10):1979.
https://doi.org/10.3390/electronics14101979
Chicago/Turabian Style
Cortiula, Alessio, Davide Menin, Andrea Bandiziol, Francesco Driussi, and Pierpaolo Palestri.
2025. "Modeling of Phase-Interpolator-Based Clock and Data Recovery for High-Speed PAM-4 Serial Interfaces" Electronics 14, no. 10: 1979.
https://doi.org/10.3390/electronics14101979
APA Style
Cortiula, A., Menin, D., Bandiziol, A., Driussi, F., & Palestri, P.
(2025). Modeling of Phase-Interpolator-Based Clock and Data Recovery for High-Speed PAM-4 Serial Interfaces. Electronics, 14(10), 1979.
https://doi.org/10.3390/electronics14101979