He, C.; Yan, B.; Xu, S.; Zhang, Y.; Wang, Z.; Wang, M.
Research and Hardware Implementation of a Reduced-Latency Quadruple-Precision Floating-Point Arctangent Algorithm. Electronics 2023, 12, 3472.
https://doi.org/10.3390/electronics12163472
AMA Style
He C, Yan B, Xu S, Zhang Y, Wang Z, Wang M.
Research and Hardware Implementation of a Reduced-Latency Quadruple-Precision Floating-Point Arctangent Algorithm. Electronics. 2023; 12(16):3472.
https://doi.org/10.3390/electronics12163472
Chicago/Turabian Style
He, Changjun, Bosong Yan, Shiyun Xu, Yiwen Zhang, Zhenhua Wang, and Mingjiang Wang.
2023. "Research and Hardware Implementation of a Reduced-Latency Quadruple-Precision Floating-Point Arctangent Algorithm" Electronics 12, no. 16: 3472.
https://doi.org/10.3390/electronics12163472
APA Style
He, C., Yan, B., Xu, S., Zhang, Y., Wang, Z., & Wang, M.
(2023). Research and Hardware Implementation of a Reduced-Latency Quadruple-Precision Floating-Point Arctangent Algorithm. Electronics, 12(16), 3472.
https://doi.org/10.3390/electronics12163472