Realization of an Electronically Tunable Resistor-Less Floating Inductance Simulator Using VCII

Round 1

Reviewer 1 Report

In this manuscript, the authors carried out an interesting investigation on electronically tunable resistorless floating inductance simulator based on second generation voltage conveyor (VCII). According to their studies, the proposed circuits are free of resistors and composed of three VCIIs and a grounded capacitor. By applying a control current, the impedance at the Y terminal can be changed. By implementing series of testing measurements, the authors found few interesting features of the design as the implementation of either positive or negative floating inductor multiplier. For example, the circuits can be operated at low voltage and show reduced errors in comparing to other works. The authors have also performed non-ideal analysis of the system and demonstrated a good performance of the proposed scheme.

After carefully going through the manuscript, I found the work looks interesting and technically sound. I do not observe obvious technical issues in the content. The manuscript is also well written and organized. One can easily follow the presentation without trouble. In addition, the manuscript does report new findings and could be practically useful. Considering these, I would like to recommend it for publication in Electronics.

One minor suggestion:  If the curves in Figure 7 could be plotted in different colors, this would be helpful for reading.

Author Response

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Author Response File: Author Response.pdf

Reviewer 2 Report

1. The font type for the symbols in equations, tables, and context could be unified in italic type as ones in Eq. (1).
2. The value and unit could be separated in Tables and Figures.
3. Figure 6 and Figure 9 could be illustrated in log-log and semi-logx configuration for readability, respectively.
4. The format in the references could be unified.
5. Some errors were highlighted in fluorescent as attached manuscript. The authors could double-check the correctness before re-submission.

Comments for author File: Comments.pdf

Author Response

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Author Response File: Author Response.pdf

Reviewer 3 Report

The manuscript show an electronically tunable resistor-less floating inductance design with VCII.The outstanding feature of the work is that it provides the possibility of on-chip  realization of positive and negative inductors.The characteristics and applications of negative inductance will be more meaningful and if they can be discussed in depth.Another problem is how to determine the working frequency band of the design, which needs to be explained.

Author Response

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Reviewer 4 Report

The article presents "Realization of Electronically Tunable Resistors-Less Floating Inductor Simulator Using VCII" for implementing high value inductor in integrated CMOS circuits. This article can be very useful for the designers and readers of the Journal. However, there are some major points which can make the work more useful for the readers.

1. Make more rigorous analysis of the circuits presented in Fig. 5 in terms of process, voltage and Temperature (PVT) variations. The impact of PVT variations on parameters of table 1 and table 2 should be included in the paper to make the work more useful for the designers.
2. Whenever we attempt to simulate an inductor on chip with circuits like the proposed ones, we need to discuss the CMOS limitations of those circuits to achieve the desired inductor simulation and performance. Please include (if possible) some Pspice simulations to demonstrate the robustness of the proposed circuits, mainly of Fig 5, to random mismatches (monte-Carlo) and PVT variations. At least some discussion about mismatch analysis must be included in section 4.
3. For the Fig. 7, please change the colors of different traces or use different line-dash patterns for different lines to make the figure more readable.
4. Please comment on the crucial points to be considered while laying out these proposed circuits in any CMOS process to get best performance. It looks like that the results are based on Pspice schematic simulations. So, having some discussion about the layout of the proposed circuits will be very useful for the effectiveness of this technique. 
5. Numbering of "Simulation Results" section should be corrected to 5 and for "Conclusion" this should be 6.

Author Response

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Author Response File: Author Response.pdf

Round 2

Reviewer 4 Report

All concerns and observations are addressed properly by the authors. I think the paper is ready to be published.