Review Reports

Round 1

Reviewer 1 Report

The authors investigated the non-linearity compensation techniques for charge storage FET. This work is interesting and meaningful, I have several comments before publication.

1.  What is the influence of the linearity between input voltage and output current in charge storage FET cells on the computation of the neural networks? The author needs to focus on motivation.

2.  Is there any difference whether the unselected  WLs are remained floating or ground during the training operation？

3.  What is the working mechanism of the data line (DL) for the sake of programming efficiency？

Author Response

Please see the attachment.

Author Response File: Author Response.docx

Reviewer 2 Report

The paper is well written and explained by the authors. I recommend this paper for publication in MDPI electronics. However, before publication, a few questions and suggestions need to be addressed. 

1. There is a typo mistake in the first line of the abstract. "awnd"

2. Authors may explain more about in-memory computing in the introduction. 

3. Authors are claiming that linearity can be achieved during inference operation. Does linearity be affected by Program and Erase operation of the memory?

 

Author Response

Please see the attachment.

Author Response File: Author Response.docx