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Physical Simulations of High Speed and Low Power NanoMagnet Logic Circuits

Department of Electronics and Telecommunications, Politecnico di Torino, Corso Duca Degli Abruzzi 24, 10129 Torino, Italy
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J. Low Power Electron. Appl. 2018, 8(4), 37; https://doi.org/10.3390/jlpea8040037
Received: 29 June 2018 / Revised: 1 October 2018 / Accepted: 1 October 2018 / Published: 8 October 2018
(This article belongs to the Special Issue Quantum-Dot Cellular Automata (QCA) and Low Power Application)
Among all “beyond CMOS” solutions currently under investigation, nanomagnetic logic (NML) technology is considered to be one of the most promising. In this technology, nanoscale magnets are rectangularly shaped and are characterized by the intrinsic capability of enabling logic and memory functions in the same device. The design of logic architectures is accomplished by the use of a clocking mechanism that is needed to properly propagate information. Previous works demonstrated that the magneto-elastic effect can be exploited to implement the clocking mechanism by altering the magnetization of magnets. With this paper, we present a novel clocking mechanism enabling the independent control of each single nanodevice exploiting the magneto-elastic effect and enabling high-speed NML circuits. We prove the effectiveness of this approach by performing several micromagnetic simulations. We characterized a chain of nanomagnets in different conditions (e.g., different distance among cells, different electrical fields, and different magnet geometries). This solution improves NML, the reliability of circuits, the fabrication process, and the operating frequency of circuits while keeping the energy consumption at an extremely low level. View Full-Text
Keywords: NML; magneto-elastic effect; high speed; low power NML; magneto-elastic effect; high speed; low power
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Turvani, G.; D’Alessandro, L.; Vacca, M. Physical Simulations of High Speed and Low Power NanoMagnet Logic Circuits. J. Low Power Electron. Appl. 2018, 8, 37.

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