# Silicon-Compatible Memristive Devices Tailored by Laser and Thermal Treatments

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## Abstract

**:**

_{x}- and SiN

_{x}-based memristors fabricated on SOI substrates and subjected to additional laser treatment and thermal treatment. The investigated memristors do not require electroforming and demonstrate a synaptic type of resistive switching. It is found that the parameters of resistive switching of SiO

_{x}- and SiN

_{x}-based memristors on SOI substrates are remarkably improved. In particular, the laser treatment gives rise to a significant increase in the hysteresis loop in I–V curves of SiN

_{x}-based memristors. Moreover, for SiO

_{x}-based memristors, the thermal treatment used after the laser treatment produces a notable decrease in the resistive switching voltage.

## 1. Introduction

_{x}[27,28], TaO

_{x}[29,30], ZrO

_{x}[31,32], TiO

_{x}[33,34], and more complex compounds such as perovskites [35]), as well as SiO

_{x}, and GeO

_{x}, are considered promising insulator materials for memristors. Recently, intensive research has also been carried out on memristive structures based on SiN

_{x}[36,37]. This is of practical interest due to their compatibility with the standard technology for creating modern integrated circuits. The use of SiO

_{x}and SiN

_{x}insulator films involves a number of practical advantages. For example, the authors of [38] carried out a comprehensive comparison of the RS parameters of memristive structures based on HfO

_{x}and SiO

_{x}and showed a lower variability in resistance in different states of SiO

_{x}-based memristors. In turn, the authors of [39] demonstrated the absence of changes in the value of currents in resistive states of SiN

_{x}-based memristors irradiated with As

^{+}during 10

^{5}cycles of RS and the minimum variability of switching voltages. It should be noted that SiO

_{x}- and SiN

_{x}-based memristors have a filamentary resistive switching mechanism [40,41].

_{x}and SiN

_{x}, fabricated under industrial conditions on SOI substrates. This approach is based not only on the use of materials that are standard for the CMOS fabrication process, but also on the use of LT and TT, which are widely used in the microelectronic industry to control the electrical parameters of devices. In addition, the investigation of the frequency dependences of electrical characteristics of memristive structures carried out in this work makes it possible to obtain the necessary detailed information about the processes occurring in the insulator film and about the state of insulator/semiconductor interfaces in different resistive states [53]. Data in this paper are presented in the same order in which they were obtained, so that the reader can unambiguously determine the contribution of LT and TT to the change in resistive switching parameters.

_{x}- and SiN

_{x}-based memristive structures fabricated on SOI substrates, including the influence of LT and TT on their electrical characteristics (RS parameters), has not been carried out previously.

## 2. Materials and Methods

_{x}and SiN

_{x}films (with a nominal thickness of 13 nm each) were deposited on commercial SOI substrates with a device layer thickness of 360 nm by plasma-enhanced chemical vapor deposition under the following conditions:

- SiO
_{x}—using 5% SiH_{4}/N_{2}(160 sccm), N_{2}O (1500 sccm) and N_{2}(240 sccm) at a pressure of 550 mTorr and high frequency (HF) power of 60 W, with a deposition rate of 200 Å/min; - SiN
_{x}—using 5% SiH_{4}/N_{2}(800 sccm), NH_{3}(10 sccm) and N_{2}(1200 sccm) at a pressure of 580 mTorr and HF-power 60 W, with a deposition rate of 100 Å/min.

^{−2}(in this study) and 10

^{−3}cm

^{2}were deposited on the surface of insulators by magnetron sputtering at a temperature of 473 K. A schematic representation of the fabricated structures is shown in Figure 1. The devices were prepared in the form of a metal–insulator–semiconductor sandwich with a common bottom electrode (SOI) and local top (Au with a Zr sublayer) electrodes. Figure 2 is an optical image of a fragment of the device showing two top electrodes of a small area and one of a larger area. The optical image was obtained using a Leica DM 4000 M optical microscope (Wetzlar, Germany).

^{3}–2 × 10

^{6}Hz. The values of parallel capacitance (C

_{p}), parallel conductance loss (G

_{p}/ω), dielectric loss tangent (tgδ), parallel (R

_{p}), and series (R

_{s}) resistances were determined. The parameters of parallel capacitor equivalent circuit are determined by the electronic phenomena in an insulator, while the parameters featuring a serial capacitor equivalent circuit are determined by the resistance of electrodes and that of the transition layer between the electrode and insulator film [54].

_{p}/ω on C

_{p}, which were obtained from corresponding frequency dependences [55]. As shown below, the obtained diagrams were either a circular arc or a semicircle. Thus, in the first case, the spectrum of SS at the insulator/semiconductor interface was continuous, while the second case indicates the presence of a mono-level of SS. An analysis of the Cole–Cole diagrams makes it possible to estimate the effective density of SS at the Fermi level (N

_{ss}). In the case of a continuous spectrum of SS, for such an estimate, one can use the following equation [56]:

_{p}/ω]

_{max}is the maximum value of parallel conductance loss, q is the electron charge, and S is the structure area (i.e., the area of the top electrode). In the case of a mono-level of SS, one can use the following equation [56]:

_{x}-based memristive structures were subjected to TT. For this purpose, memristive structures were placed in a hermetically closed metal thermostat, which was slowly heated at a rate of 13.5 K/min using an electric heater or cooled with liquid nitrogen. Investigations of electrical characteristics were carried out in a temperature range of 77–600 K in an atmosphere dried with silica gel. The temperature was maintained with an accuracy of 1 K.

_{x}and SiN

_{x}films and memristive structures based on them were carried out by X-ray photoelectron spectroscopy (XPS) and transmission electron microscopy (TEM). The profiling of samples using the XPS method implies the use of ion etching. The question arises of the correct determination of the etching rate and the existence of an error in determining the depth. If the rate can be determined using calibration samples, then the error is determined for each sample separately. A large contribution to the error when determining the depth is made by irregularities on the surface of the sample, due to which shading occurs during the etching process [58]. For correct interpretation of the data, information on the roughness obtained by atomic force microscopy (AFM) was used.

## 3. Results and Discussion

#### 3.1. SiO_{x}-Based Memristive Structures on SOI Substrates

_{x}film is 1.8 nm. Figure 3b presents XPS data for SiO

_{x}films before and after annealing at 550 K. The stoichiometry of the SiO

_{x}film barely changes between before and after annealing, and is x ≈ 1.8. One can also notice a transition layer at the SiO

_{x}/SOI interface, the thickness of which is ~15 nm.

_{x}-based memristive structure after LT and TT. According to Figure 4, the SiO

_{x}film has an amorphous structure. At the same time, Si (area 4), ZrO (areas 1 and 3) and ZrO

_{2}(area 2) nanocrystallites were found in the Zr sublayer and at the interface with the insulator. The structure of the observed nanocrystallites was determined by comparing the interplanar spacing in TEM images with the literature data. This means partial oxidation of Zr electrode and silicon oxide reduction in contact with this electrode during treatments.

_{x}-based memristive structures before LT and TT did not require electroforming [59], since initially they had a conductive state (Figure 5a, curve 1). When a voltage of −6 V was applied, the memristive structure switched from LRS to HRS (Figure 5a, curve 2). Subsequent application of voltage of +6 V did not lead to switching of the structure (Figure 5a, curve 3). In the absence of switching (Figure 5a, curves 1 and 3), the values of the current through the device in the forward and reverse directions of the voltage sweep hardly differed.

_{p}shunting the structure (Figure 6, curve 5). After switching into HRS, the losses decreased by three orders of magnitude (Figure 6, curves 7, 8), and the value of R

_{p}, respectively, increased by three orders of magnitude (Figure 6, curve 10).

_{x}films calculated from the value of C

_{p}by the equation for a parallel plate capacitor at a frequency of 1 kHz do not change with RS, while the value of tgδ changes by three orders of magnitude. This behavior of low-signal HF parameters indicates the filamentary mechanism of RS [60]. In this case, the active part of the film impedance changes locally, i.e., on a small (compared to the total electrode area) memristor area, while the resistance and dielectric losses remain almost unchanged for the rest of the film under the electrode.

_{p}and G

_{p}/ω on V (Figure 7) show that the semiconductor corresponds to the n-type, since the capacitance at a frequency of 100 kHz (see inset in Figure 7b) is in the form of a step with an increase towards the voltage V > 0 [56]. The concentration of equilibrium electrons in a silicon electrode can be estimated using the following equation [61]:

_{D}is the donor concentration in the semiconductor, φ

_{0}is the height of the potential barrier at the insulator/semiconductor interface, ε

_{s}is the relative permittivity of the semiconductor, ε

_{0}is the vacuum permittivity, C

_{ox}is the oxide capacity, equal to the maximum value of capacity in Figure 7b in the dark, and C

_{min}is the minimum value of capacity in Figure 7b in the dark. The obtained value varied in the range of ~3 × 10

^{19}–3 × 10

^{20}cm

^{−3}. This variation is associated with strong fluctuations in capacitance due to the nonuniform distribution of impurities over the thickness of the silicon electrode.

_{p}/ω on V (Figure 7a, curve 4 and Figure 7b, curves 3 and 4) in the theory of MIS structures are usually associated with SS at the insulator/semiconductor interface. If one assumes a quasicontinuous SS distribution, the N

_{ss}value can be estimated using Equation (1). The value of N

_{ss}is, under laser radiation, −3.6·10

^{12}cm

^{−2}eV

^{−1}(at a frequency of 10 kHz) and 1.1 × 10

^{12}cm

^{−2}eV

^{−1}(at a frequency of 100 kHz), and in the dark −1 × 10

^{12}cm

^{−2}eV

^{−1}(at a frequency of 100 kHz). Thus, the density of SS on the conductive Si electrode is large and increases with decreasing frequency and under laser radiation. The capture of carriers to these states should decrease the response time of memristors in the same way as a large series resistance.

_{2}/ITO/glass memory devices [62]. The effect can be explained in terms of the change in the active electrode of the structure, which plays the main role in the formation and oxidation of the filament; however, this requires additional investigation. The obtained I–V curves demonstrate a ratio of currents in LRS and HRS of more than 2 orders of magnitude.

_{x}-based memristive structures. This is evidenced by the frequency dependences of the parameters of equivalent circuit shown in Figure 9. Nonstandard behavior of dielectric losses and the value of parallel resistance with an increase in temperature from 77 to 540 K are noteworthy. Namely, usually, with an increase in the temperature, the concentration of free carriers in the insulator increases, so the values of tgδ [63] increase and those of R

_{p}decrease. However, in this case, the values show the opposite tendency. The observed behavior is unusual for insulators and is probably associated with an irreversible change in the properties of the insulator because of TT. The polarity of RS after TT corresponds to the polarity after LT (Figure 5c). It should be noted that the RS voltage decreases after the TT of the structures.

_{p}

_{0}, R

_{p}

_{0}, and tgδ

_{0}(Figure 10a,b, curves 2, 4, 6). When switching into LRS, the time dependences of C

_{p}

_{0}, R

_{p}

_{0}, and tgδ

_{0}are characterized by non-monotonic behavior, which is reflected in significant (by more than two orders of magnitude for R

_{p}

_{0}and tgδ

_{0}) chaotic changes (Figure 10a,b, curves 1, 3, and 5). The last result can be interpreted as follows. The selected mode of switching into HRS allows each time to destroy the active filament, and each switching into LRS leads to the formation of different (in terms of shape and location) filaments. It should be noted that, with multiple switching, regardless of the sign of the switching voltage and the state of the memristive structure, a monotonic decrease in the series resistance R

_{s∞}from ~650 Ω to ~160 Ω was observed (Figure 10b, curve 7). It should be recalled that the value of series resistance is determined by the resistance of the semiconductor electrode. The observed behavior indicates the occurrence of electrochemical reactions on the semiconductor electrode and the accumulation of a positive charge on its surface during the recharging of the memristive structure.

_{RESET}) and SET (switching from HRS to LRS, V

_{SET}) processes have a value in the selected range (Figure 10d).

_{p}/ω of the structures (Figure 11a) can be explained by the fact that there is no shunting of memristor by the value of R

_{p}and the implementation of a series connection of the capacitance C

_{p}and memristor electrodes. In this case, the losses at low frequencies are small, the parallel capacitance is equal to the series capacitance, and the series resistance is determined by the resistance of the semiconductor electrode (~170 Ω).

_{p}, G

_{p}/ω, tgδ, R

_{p}, and R

_{s}, obtained at the frequencies of 1 and 100 kHz (indices 0 and ∞, respectively). Data were obtained for the SiO

_{x}-based memristor in different resistive states before LT and TT, after LT, during TT, and after multiple RS.

_{x}-based memristive structures in HRS. The data were obtained from the frequency dependences of the G

_{p}/ω and C

_{p}of memristive structure before LT and TT (see Figure 6a), after LT (see Figure 8a), and after TT and multiple switching (Figure 11a). It can be seen that all diagrams have a circular arc shape, i.e., the spectrum of SS at insulator/semiconductor interface is continuous in all cases. The values of N

_{ss}were estimated using Equation (1) and are 1.9 × 10

^{12}, 1.8 × 10

^{12}, and 1.5 × 10

^{12}cm

^{−2}eV

^{−1}, respectively.

_{x}/SOI memristive structures is not sufficient for a significant change in the value of the density of SS. Additional use of TT leads to a decrease in this value by a factor of ~1.3. Nevertheless, the combined effect of LT and TT on the Au/Zr/SiO

_{x}/SOI memristive structures results in a decrease in RS voltages of almost 2-fold. The effect is probably associated with the annealing of SS, which, in turn, leads to a decrease in the resistance of the structure. According to the model [64], the appearance of SS is associated with the disordering of silicon subsurface near the interface with the insulator. From this point of view, annealing promotes a decrease in the density of SS due to the relaxation of this disorder. However, one should also consider that annealing can lead to a change in the concentration of electrically active impurities in both the semiconductor and the insulator. As a result, the Fermi level at the insulator/semiconductor interface can shift towards a lower density of states.

_{x}-based memristors. According to the estimates from TEM images, nanocrystallites reach diameters of ~7 nm. Note that TEM studies were carried out after LT and TT. Thus, probably, such treatments led to significant and irreversible oxidation of nanocrystallites and, before treatments, the sizes of nanocrystallites could be comparable to the thickness of the insulator film. The latter could lead to shunting the devices. This explanation is indirectly confirmed by the unusual behavior of dielectric losses and the value of parallel resistance, with an increase in temperature from 77 to 540 K.

#### 3.2. SiN_{x}-Based Memristive Structures on SOI Substrates

_{x}film is 1.9 nm. In Figure 13b, XPS data for SiN

_{x}film before and after annealing at 550 K are reported. It is shown that the stoichiometry of SiN

_{x}film before and after annealing hardly changes and x ≈ 1.25. One can also notice the presence of a transition layer at the SiN

_{x}/SOI interface, the thickness of which is ~18 nm.

_{x}-based memristive structures after LT are shown. According to Figure 14, the SiN

_{x}film has an amorphous structure. At the same time, the presence of ZrN (areas 1, 3, 5–7) and Si (area 4) nanocrystallites is confirmed inside amorphous SiN

_{x}. ZrO

_{2}(area 2), ZrO (area 8), and ZrN (area 9) nanocrystallites are found in the Zr sublayer and at the interface with the insulator. The presence of Si

_{3}N

_{4}nanocrystallites should also be noted (area 10). The structure of the observed nanocrystallites was determined by comparing the interplanar spacing in TEM images with the literature data. Like for the SiO

_{x}-based memristive structures, the SiN

_{x}-based structures considered in this section initially had a conductive state. It should be noted that SiN

_{x}-based memristive structures did not demonstrate RS before LT (Figure 15a, curve 1).

^{2}vs. V indicates acceptors and a negative slope indicates donors [65,66]. The 1/C

^{2}value increases with increasing absolute voltage value (Figure 17), which indicates the n-type conductivity of the semiconductor film. The nonlinearity of this dependence can be a consequence of inhomogeneous doping of the semiconductor film.

_{D}can be estimated using the slope of the straight line, which extrapolates the data in Figure 17, and the following equation [56]:

_{D}value is ~5 × 10

^{18}cm

^{−3}. It should be noted that the obtained value is probably underestimated due to the presence of horizontal areas in the dependence.

_{x}-based memristive structures considered above, the structures based on SiN

_{x}were subjected to LT in air in order to change the charge state of the traps in SiN

_{x}. Figure 15a (curves 2–4) shows I–V curves demonstrating a significant increase in the hysteresis loop (change in the current by ~3 orders of magnitude) after LT of the structures. It should be noted that the structures also demonstrated a synaptic nature of switching (Figure 15b) [67,68]. After LT, memristive structures showed an increased value of the relative permittivity (before LT, it was 4; after, it was −4.85). This value was calculated using the equation for a parallel plate capacitor at a frequency of 1 kHz. This behavior indicates the contribution of the space charge region in the semiconductor electrode to the capacitance of the capacitor before LT.

^{4}Hz, which are characterized for losses due to leakage currents at low frequencies [55]. Also, in the memristive structure in HRS at a low frequency, the parallel resistance increased (up to 2 orders of magnitude), shunting it. In this case, the resistance of the silicon electrode remained almost unchanged.

_{p}, G

_{p}/ω, tgδ, R

_{p}, and R

_{s}obtained at the frequencies of 1 and 100 kHz (indices 0 and ∞, respectively). Data were obtained for the SiN

_{x}-based memristor in different resistive states before and after LT.

_{x}-based memristive structures. The data were obtained from the frequency dependences of the G

_{p}/ω and C

_{p}of memristive structure before LT (see Figure 16a) and after LT (see Figure 18a). Note that the memristive structure did not demonstrate resistive switching before laser treatment; therefore, the diagram for this case was obtained in the initial highly conductive state of memristive structure. At the same time, after LT, the two resistive states of memristive structure became distinguishable; therefore, the diagram for the second case was obtained under the conditions of HRS of the memristive structure.

_{ss}was estimated using Equation (1) and is equal to 1.6 × 10

^{12}cm

^{−2}eV

^{−1}. SS with such a high-density value can reduce response times and contribute to the variability in RS voltage values. The sharp increase in G

_{p}/ω at high values of C

_{p}is due to the presence of conductive channels (see inset in Figure 19). In the second case (after LT), the shape of the diagram is close to a semicircle, which indicates the presence of a mono-level of SS. The value of N

_{ss}, estimated using Equation (2), was 1.5 × 10

^{11}cm

^{−2}, which is an order of magnitude lower than before LT.

_{x}/SOI interface. This is probably due to the more significant, in comparison with SiO

_{x}-based structures, effect of LT on the charge state of traps in SiN

_{x}, which determine the conductivity with the optical activation energy (for SiN

_{x}

_{<4/3}, this value is equal to 2.6 eV [69]). It was reported in [70] that these traps can play a decisive role in the rupture and restoration of filaments during switching in SiN

_{x}-based memristors. Therefore, LT is an effective method for changing RS parameters in metal/SiN

_{x}/semiconductor memristive structures.

_{x}-based memristors. According to the estimates from TEM images, nanocrystallites reach diameters of ~5–10 nm. Note that TEM studies were carried out after LT. Thus, probably, such treatment led to significant and irreversible oxidation of nanocrystallites and, before LT, the sizes of nanocrystallites could be comparable to the thickness of the insulator film. The latter could lead to shunting the devices.

## 4. Conclusions

_{x}and SiN

_{x}—fabricated on SOI substrates and subjected to additional laser and thermal treatments. It was shown that laser treatment leads to a significant increase in the hysteresis loop in I–V curves of the Au/Zr/SiN

_{x}/SOI memristive structures. The effect was explained by the positive charging of traps in the insulator and a decrease in the density of surface states at the insulator/semiconductor interface (by an order of magnitude). Moreover, laser treatment of the Au/Zr/SiO

_{x}/SOI memristive structures was not sufficient to produce a significant change in the value of the density of the surface states. Additional use of thermal treatment led to a decrease in this value by a factor of ~1.3. Furthermore, the combined effect of laser treatment followed by thermal treatment on the Au/Zr/SiO

_{x}/SOI memristive structures led to a near doubling of the resistive switching voltages. The effect was, probably, associated with the annealing of surface states, which, in turn, led to a decrease in the resistance of the structure.

_{x}[71] and is semitransparent, which is important for laser treatment. However, as part of the further optimization of these devices, other combinations of oxidizable and inert metals can be selected and tested.

## Author Contributions

## Funding

## Data Availability Statement

## Conflicts of Interest

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**Figure 1.**Schematic representation of SiO

_{x}- and SiN

_{x}-based memristors and the simplest capacitor equivalent resistor–capacitor circuits.

**Figure 3.**(

**a**) AFM image of SiO

_{x}film surface; (

**b**) distribution of chemical elements over depth of SiO

_{x}film before and after annealing at 550 K. The origin of the coordinates along the abscissa coincides with the SiO

_{x}/SOI interface.

**Figure 4.**High-resolution TEM images of two cross-sectional regions of a SiO

_{x}-based memristive structure after LT and TT. The inset shows scaled images of the nanocrystallites (parts that were used to determine the interplanar spacing are highlighted by yellow rectangles).

**Figure 5.**I–V curves of SiO

_{x}-based memristive structure (

**a**) before LT and TT, (

**b**) after LT, (

**c**) after TT and (

**d**) after multiple RS. In the absence of switching (Figure 5a, curves 1 and 3), the values of the current through the device in the forward and reverse directions of the voltage sweep almost did not differ. The direction of the voltage sweep is shown by arrows.

**Figure 6.**Frequency dependences of (

**a**) C

_{p}(1, 6), G

_{p}/ω (2, 7), tgδ (3, 8) and (

**b**) R

_{s}(4, 9), R

_{p}(5, 10) obtained for memristive structure in IS (1–5) and HRS (6–10).

**Figure 7.**Dependences of C

_{p}(1, 2) and G

_{p}/ω (3, 4) on V measured at a frequency of a small test signal (

**a**) 10 and (

**b**) 100 kHz and in the dark (1, 3) or under laser radiation (2, 4). Voltage sweep from −5 V to +5 V and vice versa.

**Figure 8.**Frequency dependences of (

**a**) C

_{p}(1, 6), G

_{p}/ω (2, 7), tgδ (3, 8) and (

**b**) R

_{s}(4, 9), R

_{p}(5, 10) obtained for memristive structure in LRS (1–5) and HRS (6–10). The data were obtained after LT.

**Figure 9.**Frequency dependences of (

**a**) C

_{p}, G

_{p}/ω, tgδ and (

**b**) R

_{s}, R

_{p}of memristive structure in HRS obtained at a temperature of 77 (dashed line) and 540 K (solid line).

**Figure 10.**(

**a**,

**b**) The parameters of equivalent circuit of memristive structure after TT and switching into LRS (1, 3, 5) and HRS (2, 4, 6) obtained at a frequency of a small test signal of 1 kHz (C

_{p}

_{0}, tgδ

_{0}, R

_{p}

_{0}) and 2 MHz (R

_{s∞}); (

**c**) dependences of the currents (at a reading voltage of +0.5 V) of memristive structure in LRS (red) and HRS (blue) after TT on the number of RS cycles; (

**d**) distribution of voltages of SET (red) and RESET (blue) processes of memristive structure after TT.

**Figure 11.**Frequency dependences of (

**a**) C

_{p}, G

_{p}/ω, tgδ and (

**b**) R

_{s}, R

_{p}of memristive structure in HRS after multiple RS.

**Figure 12.**The Cole–Cole diagrams obtained for SiO

_{x}-based memristive structures in HRS. The data were obtained before LT and TT, after LT, and after TT and multiple RS.

**Figure 13.**(

**a**) AFM image of SiN

_{x}film surface; (

**b**) distribution of chemical elements over depth of SiN

_{x}film before and after annealing at 550 K. The origin of coordinates along the abscissa coincided with the SiN

_{x}/SOI interface.

**Figure 14.**High-resolution TEM images of two cross-sectional regions of SiN

_{x}-based memristive structure after LT. The inset shows scaled images of the nanocrystallites (parts that were used to determine the interplanar spacing are highlighted by yellow rectangles).

**Figure 15.**(

**a**) I–V curves of SiN

_{x}-based memristive structure before (solid line) and after (dotted line) LT in semi-log plot. Curves 3 and 4 in linear plot (

**b**). The direction of the voltage sweep is shown by arrows.

**Figure 16.**Frequency dependences of (

**a**) C

_{p}, G

_{p}/ω, tgδ and (

**b**) R

_{s}, R

_{p}obtained for memristive structure before LT.

**Figure 17.**Dependence of nonequilibrium capacitance on voltage in coordinates 1/C

^{2}–V obtained for memristive structure before LT. Data were measured at a small test signal frequency of 100 kHz.

**Figure 18.**Frequency dependences of (

**a**) C

_{p}(1, 4), G

_{p}/ω (2, 5), tgδ (3, 6) and (

**b**) R

_{s}(7, 9), R

_{p}(8, 10) obtained for memristive structure in LRS (4, 5, 6, 9, 10) and HRS (1, 2, 3, 7, 8). The data were obtained after LT.

**Figure 19.**The Cole–Cole diagrams obtained for SiN

_{x}-based memristive structures. The data were obtained before and after LT. Inset: same Cole–Cole diagram as before LT, but at full scale.

**Figure 20.**(

**a**) Dependences of the currents (at a reading voltage of −0.5 V) of memristive structure in LRS (red) and HRS (blue) after LT on the number of RS cycles; (

**b**) distribution of voltages of V

_{SET}(red) and V

_{RESET}(blue) processes of memristive structure after LT.

Treatment | Resistive State | C_{p}_{0}, nF | C_{p}_{∞}, nF | G_{p}_{0}/ω, nF | G_{p}_{∞}/ω, nF | tgδ_{0} | tgδ_{∞} | R_{p}_{0}, Ω | R_{p}_{∞}, Ω | R_{s}_{0}, Ω | R_{s}_{∞}, Ω |
---|---|---|---|---|---|---|---|---|---|---|---|

Before LT and TT | IS | 2.05 | 1.60 | 334 | 3.68 | 163 | 2.30 | 476 | 433 | 476 | 364 |

HRS | 2.65 | 2.46 | 0.26 | 0.47 | 0.10 | 0.19 | 621,296 | 3400 | 5732 | 119 | |

After LT | LRS | 2.06 | 1.49 | 390 | 3.78 | 189 | 2.54 | 409 | 422 | 409 | 365 |

HRS | 2.65 | 2.45 | 1.98 | 0.49 | 0.75 | 0.20 | 80,309 | 3253 | 28,806 | 125 | |

During TT | HRS at 77 K | 3.24 | 2.17 | 11 | 0.59 | 3.24 | 0.27 | 15,124 | 2701 | 13,812 | 179 |

HRS at 540 K | 2.52 | 2.31 | 0.66 | 0.44 | 0.26 | 0.19 | 241,206 | 3637 | 15,457 | 126 | |

After multiple RS | HRS | 2.42 | 2.02 | 0.02 | 0.66 | 0.01 | 0.33 | 8,259,960 | 2396 | 525 | 234 |

Treatment | Resistive State | C_{p}_{0}, nF | C_{p}_{∞}, nF | G_{p}_{0}/ω, nF | G_{p}_{∞}/ω, nF | tgδ_{0} | tgδ_{∞} | R_{p}_{0}, Ω | R_{p}_{∞}, Ω | R_{s}_{0}, Ω | R_{s}_{∞}, Ω |
---|---|---|---|---|---|---|---|---|---|---|---|

Before LT | IS | 2.71 | 2.48 | 65 | 1.25 | 24 | 0.50 | 2436 | 1276 | 2432 | 258 |

After LT | LRS | 2.30 | 1.64 | 236 | 2.86 | 102 | 1.74 | 675 | 558 | 675 | 419 |

HRS | 3.26 | 2.61 | 0.48 | 0.90 | 0.15 | 0.35 | 334,200 | 1764 | 6992 | 188 |

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**MDPI and ACS Style**

Koryazhkina, M.N.; Filatov, D.O.; Tikhov, S.V.; Belov, A.I.; Korolev, D.S.; Kruglov, A.V.; Kryukov, R.N.; Zubkov, S.Y.; Vorontsov, V.A.; Pavlov, D.A.;
et al. Silicon-Compatible Memristive Devices Tailored by Laser and Thermal Treatments. *J. Low Power Electron. Appl.* **2022**, *12*, 14.
https://doi.org/10.3390/jlpea12010014

**AMA Style**

Koryazhkina MN, Filatov DO, Tikhov SV, Belov AI, Korolev DS, Kruglov AV, Kryukov RN, Zubkov SY, Vorontsov VA, Pavlov DA,
et al. Silicon-Compatible Memristive Devices Tailored by Laser and Thermal Treatments. *Journal of Low Power Electronics and Applications*. 2022; 12(1):14.
https://doi.org/10.3390/jlpea12010014

**Chicago/Turabian Style**

Koryazhkina, Maria N., Dmitry O. Filatov, Stanislav V. Tikhov, Alexey I. Belov, Dmitry S. Korolev, Alexander V. Kruglov, Ruslan N. Kryukov, Sergey Yu. Zubkov, Vladislav A. Vorontsov, Dmitry A. Pavlov,
and et al. 2022. "Silicon-Compatible Memristive Devices Tailored by Laser and Thermal Treatments" *Journal of Low Power Electronics and Applications* 12, no. 1: 14.
https://doi.org/10.3390/jlpea12010014