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Kim D-H, Jeong H-S, Lee D-H, Bae K-H, Lee S, Kim M-H, Lim J-H, Kwon H-I. Quantitative Analysis of Positive-Bias-Stress-Induced Electron Trapping in the Gate Insulator in the Self-Aligned Top Gate Coplanar Indium–Gallium–Zinc Oxide Thin-Film Transistors. Coatings. 2021; 11(10):1192. https://doi.org/10.3390/coatings11101192

Kim, Dae-Hwan, Hwan-Seok Jeong, Dong-Ho Lee, Kang-Hwan Bae, Sunhee Lee, Myeong-Ho Kim, Jun-Hyung Lim, and Hyuck-In Kwon. 2021. "Quantitative Analysis of Positive-Bias-Stress-Induced Electron Trapping in the Gate Insulator in the Self-Aligned Top Gate Coplanar Indium–Gallium–Zinc Oxide Thin-Film Transistors" Coatings 11, no. 10: 1192. https://doi.org/10.3390/coatings11101192

Kim, D.-H., Jeong, H.-S., Lee, D.-H., Bae, K.-H., Lee, S., Kim, M.-H., Lim, J.-H., & Kwon, H.-I. (2021). Quantitative Analysis of Positive-Bias-Stress-Induced Electron Trapping in the Gate Insulator in the Self-Aligned Top Gate Coplanar Indium–Gallium–Zinc Oxide Thin-Film Transistors. Coatings, 11(10), 1192. https://doi.org/10.3390/coatings11101192