Simulating Synaptic Behaviors through Frequency Modulation in a Capacitor–Memristor Circuit

Abstract

Memristors, known for their adjustable and non-volatile resistance, offer a promising avenue for emulating synapses. However, achieving pulse frequency-dependent synaptic plasticity in memristors or memristive systems necessitates further exploration. In this study, we present a novel approach to modulate the conductance of a memristor in a capacitor–memristor circuit by finely tuning the frequency of input pulses. Our experimental results demonstrate that these phenomena align with the long-term depression (LTD) and long-term potentiation (LTP) observed in synapses, which are induced by the frequency of action potentials. Additionally, we successfully implement a Hebbian-like learning mechanism in a simple circuit that connects a pair of memristors to a capacitor, resulting in observed associative memory formation and forgetting processes. Our findings highlight the potential of capacitor–memristor circuits in faithfully replicating the frequency-dependent behavior of synapses, thereby offering a valuable contribution to the development of brain-inspired neural networks.

1. Introduction

While the brain lags behind computers in terms of computational speed and accuracy, it possesses a remarkable advantage in its ability to perform massively parallel processing [1,2,3]. This advantage stems from the brain’s vast number of neurons and synapses, as well as its ability to process analog signals [1,3,4]. As the connections between neurons, synapses play a crucial role in this process [5,6,7]. The plasticity of synapses, including long-term potentiation (LTP) and long-term depression (LTD) [8,9], is considered to be the biological basis of learning and memory [4,6]. The development of electronic devices capable of emulating the behavior of biological synapses is considered fundamental to the construction of brain-inspired neural networks [10].

The concept of the memristor was first proposed by Chua in 1971 to describe the relationship between flux-linkage and charge. It was subsequently developed and produced by HP in 2008 [11,12]. The adjustable conductance of the memristor bears similarity to the weight of synapses [5,6,13]. However, the conventional method of modifying memristor conductance using positive and negative voltages fails to account for the influence of action potential frequency on synaptic weight changes [5]. In biological synapses, high-frequency stimulation leads to LTP, while low-frequency stimulation induces LTD [14]. Previous attempts to introduce frequency dependence in conductance modification, such as using diffusion memristors and second-order drift memristors, have yielded results that deviate from synaptic behavior [15,16]. Therefore, the challenge of accurately mimicking the frequency-dependent behavior of synapses remains unresolved.

In this study, we propose a capacitor–memristor circuit as a means of emulating the frequency-dependent behavior of biological synapses. We first investigate the mechanism of the capacitor–memristor circuit by applying rectangular pulses as an input. Our findings reveal the emergence of positive or negative voltage spikes across the memristor on the rising or falling edges of the input rectangular pulse, respectively. We then introduce specialized pulses, called action pulses, into the capacitor–memristor circuit to emulate synaptic LTP and LTD. High-frequency pulses result in an increase in memristor conductance, akin to LTP, while low-frequency pulses lead to a decrease in conductance, similar to LTD in synapses. Finally, by connecting two memristors to the same capacitor, we achieve a Hebbian-like learning mechanism, where the increase and decrease in conductance signify the processes of associative memory formation and forgetting, respectively.

2. The Comprehensive Physical Model of an Oxide Memristor

In the simulation, we utilized a tantalum oxide-based memristor model, which has been validated to closely match experimental results [17,18]. This model incorporates multi-physical field coupling and is solved using COMSOL.

The equations describing the drift and diffusion of oxygen vacancy (V_O) concentration (n_D) are represented by Equations (1) and (2), respectively. [17,18]. D∇n_D, vn_D and DSn_D∇T are the Fick diffusion flux, drift flux, and Soret diffusion flux, respectively. f is the escape attempt frequency (10¹² Hz), a is the hopping distance (0.1 nm), and E_a is the diffusion barrier (0.85 eV).

$$\frac{\partial n_D}{\partial t}=\nabla ·(D\nabla {\mathrm{n}}_D-v{\mathrm{n}}_D+DS{\mathrm{n}}_D\nabla T)$$

(1)

$$\left\{\begin{array}{c}D=\frac{1}{2}·a^2·f·\exp \left(-E_a/k/T\right)\hfill \\ v=a·f·\exp \left(-E_a/k/T\right)·\sinh \left(qaE/k/T\right)\hfill \\ S=-E_a/\left(K{T}^2\right)\hfill \end{array}\right.$$

(2)

The current continuity equation and Joule heating equation are Equations (3) and (4), respectively. σ and k_th are the electrical conductivity and thermal conductivity, respectively [17,18].

$$\mathit{\nabla }·\sigma \mathit{\nabla }\mathit{\Psi }=0$$

(3)

$$-\mathit{\nabla }·k_{th}\mathit{\nabla }T=J·E$$

(4)

Figure 1a illustrates the structure of the memristor, with the Ta₂O₅ film serving as the resistive switching (RS) layer and the TaO_x film acting as the V_O reservoir. Both the top and bottom electrodes are made of Pd. Figure 1b depicts a sweep voltage curve, clearly showing the set and reset processes. The arrows in the Figure 1b indicate the sweeping direction of voltage.

3. The Capacitor–Memristor Circuit with Rectangular Pulses as the Input

Figure 2a depicts a capacitor–memristor circuit and illustrates the application method of the input and measurement pulses. In Figure 2b, the blue curve represents the input pulse A, and the green curve is the measurement pulse.

It is evident from Figure 2c that a positive voltage spike occurs across the memristor at the rising edge of the input pulse A. This phenomenon can be attributed to the rapid increase in voltage of the input pulse A, causing most of the voltage to be applied across the memristor due to the limited ability of the capacitor voltage to change abruptly. Subsequently, as depicted in Figure 2d, the voltage across the memristor decreases while the voltage across the capacitor increases. The rate of increase in the capacitor voltage is determined by the time constant τ (τ = R∙C), with a smaller time constant resulting in a faster increase in the capacitor voltage.

When the voltage of the input pulse A drops to zero, the capacitor discharges through the memristor, leading to a negative voltage spike across the memristor, as shown in Figure 2c. The magnitude of this negative voltage spike depends on the amount of charge accumulated in the capacitor. A wider input pulse (Figure 2f) causes a greater charge accumulation in the capacitor (Figure 2h), consequently resulting in a more pronounced negative voltage spike (Figure 2g).

Positive and negative voltage spikes induce an increase and decrease in the memristor resistance, respectively. The final resistance state is determined by the interplay between these two spikes (Figure 2e,i). Our simulation results are in line with the experimental findings of Kim et al. [19].

4. The Theoretical Analysis of the Capacitor–Memristor Circuit

4.1. The Rectangular Pulse as the Input

To calculate the voltage across the memristor when a rectangular pulse (Figure 3a) is applied, we consider the memristor as a resistance R_m in parallel with a parasitic capacitance C_m. The capacitor is considered as a capacitance C_c in parallel with a leakage resistance R_c, as shown in Figure 3b [20,21]. To simplify the analysis, the resistance of the memristor is assumed to be constant. The time constant of this circuit can be determined from Equation (5) [22] as follows:

$$\tau =\frac{R_m{R}_c}{R_m+R_c}·\left(C_m+C_c\right)$$

(5)

The rising edge of the rectangular pulse is at t_r, and the falling edge is at t_f. It is assumed that there is no charge accumulation in the capacitor before t_r. The voltage across the memristor is as follows:

$$\left\{\begin{array}{c}{u}_m=u·\left(\frac{C_c}{C_m+C_c}-\frac{R_m}{R_m+R_c}\right)·e^{-\frac{t-t_r}{\tau }}+\frac{R_m}{R_m+R_c}·u, t_r<t<t_f \\ u_m=-\left(\frac{C_{c}u}{C_c+C_m}-u_{mf}\right)·e^{-\frac{t-t_f}{\tau }}, t_f<t\end{array}\right.$$

(6)

where $\mathrm{u}$ is the amplitude of the rectangular pulse, and u_mf is the voltage across the memristor at $t\to t_f^{-}$. In general, the parameters in Equations (5) and (6) satisfy C_c ≫ C_m and R_c ≫ R_m [21,23]. Thus, the circuit in Figure 3b can be simplified to the circuit in Figure 3c. Equations (5) and (6) can be simplified to

$$\mathsf{\tau }=R_m·C_c$$

(7)

$$\left\{\begin{array}{c}{u}_m=u·e^{-\frac{t-t_r}{\mathsf{\tau }}} , t_r<t<t_f \\ u_m=-{\mathrm{u}}_{cf}·e^{-\frac{t-t_f}{\mathsf{\tau }}} , t_f<t \end{array}\right.$$

(8)

$$u_{cf}=u·\left(1-e^{-\frac{t_f-t_r}{\mathsf{\tau }}}\right)$$

(9)

where u_cf is the voltage across the capacitor at $t\to t_f^{-}$. According to Equation (8), the positive voltage spike across the memristor is close to u regardless of the width of the rectangular pulse. However, the negative voltage spike across the memristor depends on the width of the rectangular pulse and the time constant. A wider pulse and a smaller time constant will result in a higher voltage across the memristor during discharge.

4.2. The Action Pulse as the Input

From the above analysis, we can see that the resistance of the memristor can be modified during the discharge of the capacitor in the memristor–capacitor circuit. We then designed a special pulse called an action pulse (Figure 4). The action pulse is a combination of a positive rectangular pulse and a negative rectangular pulse. The negative rectangular pulse is used here to increase the voltage during discharge. It is assumed that there is no charge accumulation in the capacitor before t_r1. The voltage across the memristor is

$$\left\{\begin{array}{c}{u}_m=u^{+}·e^{-\frac{t-t_{r1}}{\mathsf{\tau }}} , t_{r1}<t<t_f \\ u_m=-(u_{cf}-u^{-})·e^{-\frac{t-t_f}{\mathsf{\tau }}} , t_f<t<t_{r2} \\ u_m=-{\mathrm{u}}_{cr2}·e^{-\frac{t-t_{r2}}{\mathsf{\tau }}} , t_{r2}<t \end{array}\right.$$

(10)

$$\left\{\begin{array}{c}{u}_{cf}=u^{+}·\left(1-e^{-\frac{t_f-t_r}{\mathsf{\tau }}}\right) \\ u_{cr2}=(u_{cf}-u^{-})·e^{-\frac{t_{r2}-t_f}{\mathsf{\tau }}}+{\mathrm{u}}^{-} \end{array}\right.$$

(11)

where u_cf is the voltage across the capacitor at $t\to t_f^{-}$, and u_cr2 is the voltage across the capacitor at $t\to t_{cr2}^{-}$. The positive voltage spike across the memristor during charging is close to u⁺. The negative voltage spike during discharge depends on u_cf and u⁻. The existence of the negative rectangular pulse is necessary to increase the voltage across the memristor during discharge of the capacitor. From the equation we can see that the decay rate of the voltage spike is negatively related to the time constant τ. Importantly, if multiple pulses are input into the capacitor–memristor circuit at very short intervals, the charge in the capacitor will remain at the beginning of the subsequent pulse input. The remaining charge will reduce the voltage across the memristor during charging and increase the voltage during discharge, which will eventually affect the change in conductance.

5. Imitation of Synaptic Behavior Based on the Capacitor–Memristor Circuit

5.1. Long-Term Depression (LTD)

We employed action pulses in the capacitor–memristor circuit (with a capacitance value of 0.1 nF) to realize both LTD and LTP. To induce LTD, we input low-frequency action pulses into the circuit (Figure 5a,b). The positive voltage spikes across the memristor are close to 1.5 V, while the negative voltage spikes are around −1.1 V (Figure 5c,d). The interplay between these two spikes leads to a reduction in the memristor’s conductance (Figure 5e), as evidenced by the decrease in current depicted in Figure 5f. It should be noted that the fluctuations in memristor conductance are attributed to temperature variations. The conductivity of the conducting filament is assumed to follow the Arrhenius equation in the model $\sigma ={\sigma }_0\exp \left(-\frac{E_{AC}}{kT}\right)$, where σ₀ is a pre-exponential factor, k is Boltzmann’s constant, and E_AC is the activation energy for conduction [17,24,25]. As illustrated in Figure 5g,h, the conductance exhibits a positive correlation with temperature. The peak voltage drop across the capacitor can be attributed to the decrease in memristor conductance, which subsequently reduces the charging current (Figure 5i).

5.2. Long-Term Potentiation (LTP)

To emulate LTP, we input high-frequency action pulses (Figure 6a,b) with an interval of 0.1 μs. As the number of input high-frequency pulses increases, the positive spike reduces to 1.0 V, while the negative spike approaches −1.3 V (Figure 6c). The charge within the capacitor remains when the next pulse arrives, and gradually accumulates with subsequent action pulses. The increase in capacitor voltage (Figure 6d) leads to a decrease in the voltage across the memristor during charging and an increase during discharging. A smaller capacitor (0.1 nF) is employed to allow a faster increase in capacitor voltage. Initially, the conductance of the memristor experiences a slight reduction with the first few pulses, but then increases as the number of input pulses rises (Figure 6e). The increase in current through the memristor also indicates an increase in conductance (Figure 6f).

5.3. A Hebbian-Like Learning Mechanism

Hebbian rules are widely recognized as the foundation of the learning and memory functions of neural networks, where the weight of the synapse is modified based on the correlated spikes of the pre- and post-synaptic neurons [26,27,28]. Many researchers have studied the Hebbian-like mechanism based on the SPICE model and achieved good results [29,30]. In this study, we used the COMSOL model of the memristor to construct a capacitor–memristor circuit to realize the Hebbian-like mechanism, as shown in Figure 7. The two pre-synaptic neurons are represented by voltage sources, which imitates the sight of food and the sound of a bell, respectively. Memristor M1 with a larger initial weight represents the synapse between the “food” pre-synaptic neuron and the “salivation” post-synaptic neuron, while memristor M2 with a smaller initial weight denotes the synapse connected to the “bell” pre-synaptic neuron [21]. The entire simulation process consists of three steps. In step 1 (Figure 7a), the dog does not salivate when only the bell signal is given. In step 2 (Figure 7b), the dog salivates when both the bell and food stimuli are applied simultaneously. This step is repeated several times. In step 3 (Figure 7c), the dog is exposed to the bell stimulus alone, similar to step 1. Initially, the dog salivates when the bell signal is given, indicating the acquisition of associative memory. However, after several repetitions of the bell stimulus, the dog no longer salivates, representing the forgetting process [31].

Figure 8 illustrates the results of simulating the Hebbian-like mechanism. Memristor M1 is replaced by a constant resistance (G = 0.25mS) to simplify the calculation. The input to memristor M1 is always a high-frequency pulse, while the input to the memristor M2 is a low-frequency pulse. In addition, we assume that the post-synaptic neuron fires when the voltage across the capacitor exceeds 0.4 V.

In step 1, the pulses are only applied to memristor M2, while memristor M1 is floating (yellow curves in Figure 8a–d). The conductance of memristor M2 decreases slightly due to the low-frequency pulses, similar to the LTD behavior (yellow curves in Figure 8e–g). The peak voltage across the capacitor decreases gradually and remains below 0.4 V (yellow curve in Figure 8h). Consequently, the firing of the “salivation” post-synaptic neuron is not triggered by the sound of the bell in step 1.

In step 2, we input appropriate pulses to memristors M1 and M2 simultaneously (green curves in Figure 8a–d). The high-frequency pulse input to M2 increases the voltage across the capacitor (green curve in Figure 8h), which causes the voltage spike across memristor M2 to decrease during charging and increase during discharging (green curve in Figure 8e). Finally, the conductance of memristor M2 increases as the number of input pulses increases (green curve in Figure 8g), which can be regarded as the process of associative memory.

In step 3, the input pulses to memristor M1 are removed, and the input pulses to memristor M2 are retained, as in step 1 (purple curves in Figure 8a–d). As a result, the conductance of the memristor gradually decreases as the number of input pulses increases (purple curve in Figure 8g). It is worth noting that the peak voltage across the capacitor exceeds 0.4 V during the first few pulses (purple curve in Figure 8h), which means that the “salivation” post-synaptic neuron is firing. In other words, it has learned in step 2 to salivate when only the ring signal is given. However, as the conductivity of the memristor continues to decrease, it gradually forgets this ability.

6. Conclusions

The capacitor–memristor circuit was simulated using COMSOL. With the well-designed action pulses, it was shown that the capacitor–memristor circuit can emulate the frequency-dependent behavior of synapses, in which high- and low-frequency pulses induce LTP and LTD, respectively. In addition, a Hebbian-like learning mechanism was realized by connecting two memristors to the same capacitor, which naturally shows the process of associative memory and forgetting.