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Open AccessArticle

Design of a Sub-Picosecond Jitter with Adjustable-Range CMOS Delay-Locked Loop for High-Speed and Low-Power Applications

1
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia, Serdang 43400, Selangor, Malaysia
2
Department of Electronic and Communications Engineering, Al-Nahrain University, Al-Jadriya Complex, Baghdad 10070, Iraq
3
Imaging Devices Laboratory, Research Institute of Electronics, Shizuoka University, 3-5-1 Johoku, Nakaku, Hamamatsu, Shizuoka 432-8011, Japan
4
Faculty of Engineering, Multimedia University, Persiaran Multimedia, Cyberjaya 63100, Malaysia
*
Author to whom correspondence should be addressed.
Academic Editor: Gonzalo Pajares Martinsanz
Sensors 2016, 16(10), 1593; https://doi.org/10.3390/s16101593
Received: 28 July 2016 / Revised: 5 September 2016 / Accepted: 5 September 2016 / Published: 28 September 2016
(This article belongs to the Special Issue Imaging: Sensors and Technologies)
A Delay-Locked Loop (DLL) with a modified charge pump circuit is proposed for generating high-resolution linear delay steps with sub-picosecond jitter performance and adjustable delay range. The small-signal model of the modified charge pump circuit is analyzed to bring forth the relationship between the DLL’s internal control voltage and output time delay. Circuit post-layout simulation shows that a 0.97 ps delay step within a 69 ps delay range with 0.26 ps Root-Mean Square (RMS) jitter performance is achievable using a standard 0.13 µm Complementary Metal-Oxide Semiconductor (CMOS) process. The post-layout simulation results show that the power consumption of the proposed DLL architecture’s circuit is 0.1 mW when the DLL is operated at 2 GHz. View Full-Text
Keywords: delay step; delay range; time jitter; Delay-Locked Loop (DLL); charge pump; Capacitor-Reset Circuit (CRC) delay step; delay range; time jitter; Delay-Locked Loop (DLL); charge pump; Capacitor-Reset Circuit (CRC)
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Abdulrazzaq, B.I.; Ibrahim, O.J.; Kawahito, S.; Sidek, R.M.; Shafie, S.; Yunus, N.A.M.; Lee, L.; Halin, I.A. Design of a Sub-Picosecond Jitter with Adjustable-Range CMOS Delay-Locked Loop for High-Speed and Low-Power Applications. Sensors 2016, 16, 1593.

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