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Search Results (684)

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Keywords = thin-film transistors

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13 pages, 2341 KB  
Article
Hysteresis-Induced Performance Variations and Interfacial Charge Trapping Characteristics in Carbon Nanotube Thin-Film Transistors
by Mingyu Liu, Bo Lai, Hannian Wang, Lele Wu, Wendi Wu, Kai Xu and Yuanchun Zhao
Nanomaterials 2026, 16(14), 847; https://doi.org/10.3390/nano16140847 - 10 Jul 2026
Abstract
Carbon nanotube (CNT) networks are promising candidate channel materials for thin-film transistors (TFTs). However, the charge trapping characteristics underlying the gate hysteresis effect still remain unclear. Herein, high-performance CNT TFTs with good consistencies were fabricated to investigate the hysteresis-induced performance variations and the [...] Read more.
Carbon nanotube (CNT) networks are promising candidate channel materials for thin-film transistors (TFTs). However, the charge trapping characteristics underlying the gate hysteresis effect still remain unclear. Herein, high-performance CNT TFTs with good consistencies were fabricated to investigate the hysteresis-induced performance variations and the dynamic charge trapping/releasing behaviors at different gate biases. Both the subthreshold and suprathreshold characteristics of the TFTs are remarkably changed under different gate sweeping directions. The origin of gate hysteresis was illustrated by comparing the effects of gas desorption and selective re-adsorption, and the adsorbed O2 and H2O make different contributions related to specific charge trapping characteristics. We further demonstrate that the dynamic charge trapping/releasing processes are governed by the applied gate biases, revealing the equivalency between the positive charge trapping and negative charge releasing processes, and vice versa. The time-dependent degradation of the on-state current has been fitted to perform a statistical analysis based on the measurement results of eight devices. Three characteristic time constants have been determined, corresponding to a multi-step trapping process that may be dominated by dielectric surface trapping and trap-assisted tunneling into the bulk defects in the dielectric layer near the CNTs and those in depth, respectively. Full article
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13 pages, 2662 KB  
Article
Effects of Zn, W and Mg Doping on the Electrical Performance and Stability of ITO-Based Thin Film Transistors
by Jiaying He, Yayi Chen, Junjie Zhou, Wei Zhong and Yuan Liu
Electronics 2026, 15(13), 2754; https://doi.org/10.3390/electronics15132754 - 23 Jun 2026
Viewed by 216
Abstract
In this work, ZnO, WO3, and MgO were doped into InSnZnO (ITZO) films via co-sputtering to enhance the mobility and stability of ITO-based thin film transistors (TFTs). ITZO, InSnWO (ITWO) and InSnMgO (ITMO) films were fabricated, and the effect of cation [...] Read more.
In this work, ZnO, WO3, and MgO were doped into InSnZnO (ITZO) films via co-sputtering to enhance the mobility and stability of ITO-based thin film transistors (TFTs). ITZO, InSnWO (ITWO) and InSnMgO (ITMO) films were fabricated, and the effect of cation dopants on the oxygen stoichiometry in ITO films was investigated. We further discussed their influence on the electrical parameters of corresponding TFTs, including threshold voltage (Vth), subthreshold swing (SS), and field-effect mobility (μFE). Additionally, the positive and negative bias stress stability of these devices was evaluated. The results demonstrate that ITWO TFTs exhibit superior stability despite a reduction in mobility. This is attributed to the high electronegativity of W6+ and the strong W-O bonding, which effectively mitigate the formation of oxygen vacancies and suppress the adsorption of impurities at the back channel. The findings provide valuable insights for the material design of high-performance TFTs. Full article
(This article belongs to the Section Semiconductor Devices)
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18 pages, 12883 KB  
Article
Interface-Engineered, Low-Damage IGZO/HfO2 Charge-Trapping Memory Devices Fabricated Using a Remote Plasma ALD Process
by Inkook Hwang, Hyeonwu Nam, Jiwon Kim, Byungwook Kim, Yongwoon Jang, Wookyung Lee, Minkyun Kang and Changbun Yoon
Micromachines 2026, 17(6), 743; https://doi.org/10.3390/mi17060743 - 19 Jun 2026
Viewed by 372
Abstract
In this study, charge-trapping memory (CTM) transistors were developed using indium gallium zinc oxide (IGZO) as the oxide semiconductor channel and high-k HfO2 as the charge-trapping layer, aiming for next-generation nonvolatile memory applications. To evaluate the impact of plasma exposure on film [...] Read more.
In this study, charge-trapping memory (CTM) transistors were developed using indium gallium zinc oxide (IGZO) as the oxide semiconductor channel and high-k HfO2 as the charge-trapping layer, aiming for next-generation nonvolatile memory applications. To evaluate the impact of plasma exposure on film quality and device performance, HfO2 thin films were deposited via atomic layer deposition (ALD) using both direct plasma (DP) and remote plasma (RP) modes. Post-deposition annealing (PDA) was applied to the IGZO and HfO2 layers, with experiments conducted at various annealing temperatures to enhance the interfacial stability between the HfO2 layer and the IGZO channel. Electrical characterization results demonstrated that the RP-processed devices exhibited a wider memory window, reduced gate leakage current, and improved threshold voltage stability compared with the DP-processed devices. Thermal treatment effectively reduced the interfacial defect density and enhanced the crystallinity at the dielectric–channel interface. These findings underscore that the selection of the plasma process and annealing conditions is critical in determining the electrical characteristics and reliability of oxide semiconductor-based CTM devices. Full article
(This article belongs to the Special Issue Manufacturing and Application of Advanced Thin-Film-Based Device)
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16 pages, 6029 KB  
Article
Low-Temperature ZrAlOx-PVP Hybrid Dielectrics with Crosslinking-Regulated Leakage Suppression for Flexible IGZO TFTs
by Yufei Yue, Honglong Ning, Xuecong Fang, Dongxiang Luo, Chi Yuan, Haitao Zhu, Xu Zhou, Xiaojie Li, Weiguang Xie, Rihui Yao and Junbiao Peng
Inorganics 2026, 14(6), 161; https://doi.org/10.3390/inorganics14060161 - 12 Jun 2026
Viewed by 425
Abstract
Flexible oxide electronics require dielectric layers that combine low-temperature processability, low leakage current, high capacitance density, and mechanical reliability. In this work, we prepared ZrAlOx-PVP hybrid dielectric films through a low-temperature self-combustion solution process at 180 °C and systematically investigated the [...] Read more.
Flexible oxide electronics require dielectric layers that combine low-temperature processability, low leakage current, high capacitance density, and mechanical reliability. In this work, we prepared ZrAlOx-PVP hybrid dielectric films through a low-temperature self-combustion solution process at 180 °C and systematically investigated the effect of PVP doping (0–2 wt%). The results show that PVP promotes the formation of M-O-C related bonding environments, suggesting the construction of an organic–inorganic crosslinked structure. Moderate PVP incorporation effectively suppresses leakage pathways, whereas excessive PVP induces polymer aggregation and trap-assisted conduction. Among all samples, the film on flexible PI (polyimide) with a PVP doping concentration of 0.5 wt% exhibits the best overall performance, with a leakage current as low as 1.89 × 10−8 A/cm2 at 1 MV/cm, a dielectric constant of 8.88. After static bending at a radius of 20 mm, the film maintains stable dielectric behavior, indicating improved stress tolerance. Flexible IGZO TFT fabricated with the optimized dielectric shows a mobility of 11.84 cm2 V−1 s−1, a threshold voltage of 0.48 V, and a subthreshold swing of 0.24 V dec−1 before bending. This work demonstrates that moderate PVP crosslinking provides an effective balance between defect suppression and stress relaxation, offering a practical interface-engineering strategy for low-temperature flexible high-k dielectrics. Full article
(This article belongs to the Special Issue Multifunctional Composites and Hybrid Materials)
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24 pages, 6005 KB  
Review
Recent Advances in the Synthesis and Application of Tellurium Semiconductors
by Hao Yang, Zhiyi Lyu and Hoo-Jeong Lee
Nanomaterials 2026, 16(12), 725; https://doi.org/10.3390/nano16120725 - 11 Jun 2026
Viewed by 446
Abstract
Tellurium (Te), an attractive p-type van der Waals semiconductor, has been considered a promising candidate in electrical applications due to its unique one-dimensional chiral atomic-helical-chain structure, tunable bandgap, and ultrahigh hole mobility. This review summarizes recent advances in the controlled synthesis of Te [...] Read more.
Tellurium (Te), an attractive p-type van der Waals semiconductor, has been considered a promising candidate in electrical applications due to its unique one-dimensional chiral atomic-helical-chain structure, tunable bandgap, and ultrahigh hole mobility. This review summarizes recent advances in the controlled synthesis of Te semiconductor nanostructures, including one-dimensional tellurium nanowires and two-dimensional tellurene in the form of nanosheets and thin films. We further highlight emerging electrical applications of Te in field-effect transistors, logic circuits, photodetectors, memristors, and artificial synapse devices. Finally, current challenges and future opportunities for the commercialization of Te-based electronic and optoelectronic devices, particularly for neuromorphic and in-sensor computing systems, are discussed. Full article
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18 pages, 3000 KB  
Article
Development of a High-Frequency, High-Temperature Class-A Amplifier Based on a Silicon Carbide Static Induction Transistor
by Maximilian C. Scardelletti, Jonathon R. Grgat and Christian A. Zorman
Sensors 2026, 26(12), 3646; https://doi.org/10.3390/s26123646 - 8 Jun 2026
Viewed by 279
Abstract
This paper reports the development of a Class-A amplifier that operates at 50 MHz and 400 °C. The amplifier utilizes a commercially available 4H-SiC static induction transistor (SIT) as the active device and incorporates input/output-matching networks to optimize amplifier operation and DC bias [...] Read more.
This paper reports the development of a Class-A amplifier that operates at 50 MHz and 400 °C. The amplifier utilizes a commercially available 4H-SiC static induction transistor (SIT) as the active device and incorporates input/output-matching networks to optimize amplifier operation and DC bias networks, which comprise thin-film spiral inductors, metal–insulator–metal (MIM) capacitors, and thick-film chip resistors. All passive components were tested at frequency and temperature prior to amplifier development and are reported. A small-signal SiC SIT model that was developed in Keysight’s Advanced Design System (ADS 2023) software suite was used to design and optimize the amplifier’s performance. The SiC SIT amplifier’s S-parameters were recorded for frequencies between 20 and 100 MHz over a temperature range of 25 °C to 400 °C, exhibiting a gain (S21) of approximately 15.8 and 5.80 dB at 25 °C and 400 °C, respectively. The input and output reflection coefficients at 50 MHz and 400 °C were −18.5 and −15.2 dB, respectively. The noise figure and phase noise were measured at temperatures between 25 °C and 400 °C. At 50 MHz, the noise figure increased by only 21% over the temperature range, while the 1 kHz offset of the phase noise remained below −110 dBc/Hz. The stability factor, K, calculated using both measured and simulated data, demonstrates unconditional stability over the frequency range at 400 °C. Lastly, the 1 dB compression point was measured at 50 MHz and 400 °C with an approximated output of 9.5 dB. Simulated and measured results are presented and show the model is within 10% error at 400 °C. Full article
(This article belongs to the Special Issue Electronics and Sensors for Structure Health Monitoring)
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11 pages, 1602 KB  
Article
Conduction Mechanism in Lead Sulfide Quantum Dot Gas Sensors
by Yanting Tang, Jingyao Liu, Bowen Zhou, Lanpeng Guo, Hua-Yao Li and Huan Liu
Chemosensors 2026, 14(6), 131; https://doi.org/10.3390/chemosensors14060131 - 7 Jun 2026
Viewed by 253
Abstract
Colloidal quantum dots (CQDs) are ideal for room-temperature gas sensors due to their high surface area, abundant dangling bonds, and excellent film-forming properties. However, the underlying conduction mechanism remains unclear, lacking in-depth analysis of gas–solid charge transfer and carrier transport, which hinders the [...] Read more.
Colloidal quantum dots (CQDs) are ideal for room-temperature gas sensors due to their high surface area, abundant dangling bonds, and excellent film-forming properties. However, the underlying conduction mechanism remains unclear, lacking in-depth analysis of gas–solid charge transfer and carrier transport, which hinders the rational design of high-performance gas sensors. To address this, we fabricated a PbS colloidal quantum dot thin-film transistor (TFT) gas sensor that enables in situ analysis of carrier concentration and mobility via gate voltage modulation. We systematically measured the variations in conductivity, carrier concentration, and mobility with NO2 concentration and established a normalized weight variation model. The results show that the conductivity increase upon NO2 exposure is primarily due to the rise in carrier concentration induced by gas adsorption. At low concentrations (below 0.5 ppm), the response is dominated by mobility variation. This work provides a physically meaningful theoretical framework for understanding the conduction mechanism. Full article
(This article belongs to the Special Issue Innovative Gas Sensors: Development and Application)
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13 pages, 2593 KB  
Article
Roll-to-Roll Gravure-Printed SWCNT Ring Oscillator for Flexible Microfluidic Ion Sensing
by Junfeng Sun, Hyejin Park, Jinhwa Park, Sagar Shrestha, Sajjan Parajuli and Younsu Jung
Nanomaterials 2026, 16(11), 660; https://doi.org/10.3390/nano16110660 - 24 May 2026
Viewed by 452
Abstract
Rapid, accurate, and scalable ion sensing technologies are highly desirable for future flexible healthcare and lab-on-a-chip applications. Here, we present a fully roll-to-roll (R2R) gravure-printed single-walled carbon nanotube complementary ring oscillator (SWCNT-cRO)-based microfluidic ion sensing platform fabricated on a flexible substrate. The proposed [...] Read more.
Rapid, accurate, and scalable ion sensing technologies are highly desirable for future flexible healthcare and lab-on-a-chip applications. Here, we present a fully roll-to-roll (R2R) gravure-printed single-walled carbon nanotube complementary ring oscillator (SWCNT-cRO)-based microfluidic ion sensing platform fabricated on a flexible substrate. The proposed platform combines scalable printed complementary electronics with frequency-based ion sensing via electrostatically induced top-gating in aqueous microfluidic environments. The fabricated SWCNT-cRO devices exhibited stable oscillation characteristics, with a high device yield (>80%) and continuous manufacturing capability at a web speed of 5.4 m/min. Printable ethanolamine/zirconium acetylacetonate-based n-doping technology enabled complementary SWCNT transistor operation, while multilayer CYTOP/FG-3650 encapsulation ensured stable electrical operation under ionic aqueous conditions. After integration into a polydimethylsiloxane-based microfluidic channel, the oscillation frequency of the SWCNT-cRO was systematically modulated by Na+ concentration and pH. The sensing mechanism was based on electrostatically induced carrier modulation in n-type SWCNT transistors, resulting in variations in propagation delay and corresponding shifts in oscillation frequency. Compared with conventional ion-sensitive transistor platforms, the proposed approach offers scalable manufacturing, non-contact ion sensing, elimination of external reference electrodes, and direct compatibility with digital frequency-signal processing systems. This work establishes a promising strategy for future low-cost, disposable, and flexible microfluidic sensing platforms for wearable healthcare and lab-on-a-chip applications, ion sensing, and thin-film transistors. Full article
(This article belongs to the Special Issue Advanced Nanomaterials for Printed Electronics and Bioelectronics)
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22 pages, 5705 KB  
Article
A 20 Hz LTPS TFT-Only 8T1C AMOLED Pixel Circuit with over Tenfold Leakage Current Reduction by Source–Drain Voltage Control
by Kook Chul Moon and Jae-Hong Jeon
Electronics 2026, 15(10), 2226; https://doi.org/10.3390/electronics15102226 - 21 May 2026
Viewed by 368
Abstract
Low-refresh-rate driving is an effective way to reduce the power consumption of active-matrix organic light-emitting diode (AMOLED) displays. However, in conventional low-temperature polycrystalline silicon (LTPS) thin-film transistor (TFT) pixel circuits, leakage current through switching TFTs can disturb the stored gate voltage of the [...] Read more.
Low-refresh-rate driving is an effective way to reduce the power consumption of active-matrix organic light-emitting diode (AMOLED) displays. However, in conventional low-temperature polycrystalline silicon (LTPS) thin-film transistor (TFT) pixel circuits, leakage current through switching TFTs can disturb the stored gate voltage of the driving TFT during the long emission period. This causes the time-dependent variation in driving current and visible flicker. In this study, a novel pixel circuit for leakage suppression in low-refresh-rate driving is presented. Bias aging was first applied to reduce the leakage current of the LTPS TFT, and a device model was then built from the characteristics measured at 60 °C. Based on this model, the leakage-induced instability of a conventional 7T1C pixel circuit was analyzed. To suppress this effect, a new 8T1C pixel circuit was proposed. The key idea is to reduce the source–drain voltage of the leakage-sensitive switching TFT during the emission period by raising the initial line potential to a level close to the storage node potential. Simulation results show that the proposed circuit greatly reduces the time-dependent variation in both the driving TFT gate voltage and the driving current compared with the conventional 7T1C circuit. Perceptual evaluation based on human visual sensitivity also confirms stable low-refresh-rate operation down to 20 Hz over the practical gray range. These results show that the proposed circuit is an effective solution for moderate low-refresh-rate operation without relying on low-temperature polycrystalline silicon and oxide (LTPO) technology. Full article
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16 pages, 10475 KB  
Article
Solution-Processed High-k HfO2 Gate Insulator for High-Performance Indium-Zinc-Oxide Thin-Film Transistors: Optimisation of Annealing Temperature and Insulator Thickness
by Jialeen Sairike, Kamale Tuokedaerhan, Serikbek Sailanbek, Zhengang Cai and Haotian Yang
Materials 2026, 19(10), 1954; https://doi.org/10.3390/ma19101954 - 9 May 2026
Viewed by 336
Abstract
With the continuous advancement of display technology and advanced integrated circuits, oxide thin-film transistors (TFTs) have become core devices due to their high mobility, low leakage current and excellent large-area uniformity. To achieve low power consumption, high performance and high reliability, the introduction [...] Read more.
With the continuous advancement of display technology and advanced integrated circuits, oxide thin-film transistors (TFTs) have become core devices due to their high mobility, low leakage current and excellent large-area uniformity. To achieve low power consumption, high performance and high reliability, the introduction of high-k gate insulating layers is crucial. Among the numerous high-k materials, hafnium oxide (HfO2) has attracted significant attention due to its excellent dielectric properties and good compatibility with CMOS processes. In this paper, uniform and dense HfO2 films were successfully fabricated using the sol–gel method to serve as insulating layers for TFT devices. Through experimental analysis, 400 °C was determined to be the optimal annealing temperature. At this temperature, the effects of replacing SiO2 with HfO2 as the insulating layer, as well as the impact of reducing film thickness, on TFT devices were investigated. Ultimately, at an annealing temperature of 400 °C, an 85 nm-thick HfO2 film achieved the highest on/off current ratio (Ion/off = 1.11 × 106), the lowest subthreshold swing (SS = 0.53 V/dec), the lowest threshold voltage (Vth = −1.1 V) and the lowest off-current ratio (Ioff = 2.5 × 10−12 A). It was confirmed that replacing SiO2 with HfO2 as the insulating layer is a viable approach for reducing the volume of TFT devices. Full article
(This article belongs to the Section Thin Films and Interfaces)
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14 pages, 3398 KB  
Article
Electrical Performance of Hafnium Doped In2O3 Thin-Film Transistors Prepared Using a Solution Method
by Haotian Yang and Kamale Tuokedaerhan
Appl. Sci. 2026, 16(10), 4658; https://doi.org/10.3390/app16104658 - 8 May 2026
Viewed by 351
Abstract
Indium hafnium oxide thin-film transistors (TFTs) were prepared by the sol-gel method, and their crystal structures, surface morphologies, chemical compositions, optical and electrical properties were systematically investigated using X-ray diffraction (XRD), atomic force microscopy (AFM), X-ray photoelectron spectroscopy (XPS), ultraviolet-visible (UV-Vis) spectroscopy, and [...] Read more.
Indium hafnium oxide thin-film transistors (TFTs) were prepared by the sol-gel method, and their crystal structures, surface morphologies, chemical compositions, optical and electrical properties were systematically investigated using X-ray diffraction (XRD), atomic force microscopy (AFM), X-ray photoelectron spectroscopy (XPS), ultraviolet-visible (UV-Vis) spectroscopy, and a semiconductor parameter analyser. We mainly study the effects of hafnium doping on indium oxide-based thin-film transistors through the following electrical properties, including field-effect mobility (μ FE), carrier concentration, on/off current ratio (Ion/Ioff), threshold voltage (Vth), and subthreshold slope (SS). The oxygen defects concentration decreased from 25.83% to 17.82% when Hf doping was increased to 5 mol%. The effect of Hf doping on the structure, as well as the properties of the Hf-InOx thin films, was explored and it was found that Hf as a carrier inhibitor can effectively suppress the carrier concentration. This reduces the oxygen vacancy defects and improves the electrical performance of In2O3TFTs devices. The doped thin-film transistor exhibits excellent electrical properties with a mobility (μ) of 11.69 cm2/Vs, a threshold voltage (VTH) of 1.68 V, a subthreshold slope (SS) of 0.68 V/dec, and an on/off current ratio (Ion/Ioff) of 107 when the Hf doping level is 3 mol%. Research indicates that the Hf-InOx thin film prepared by the sol-gel method is a low-cost, high-performance, and widely applicable active layer material. Full article
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18 pages, 8134 KB  
Article
Numerical Investigation of Short-Channel Effects and RF Performance in Top-Gate In2O3 Thin-Film Transistors
by Hanbo Xu, Mingyang Zhu, Zeen Fang and Lei Zhang
Micromachines 2026, 17(5), 567; https://doi.org/10.3390/mi17050567 - 2 May 2026
Viewed by 690
Abstract
Indium oxide (In2O3) has recently emerged as a promising semiconductor for advanced electronics due to its high electron mobility and wide bandgap. In this article, the lateral scaling characteristics of top-gate In2O3 thin-film transistors (TFTs) featuring [...] Read more.
Indium oxide (In2O3) has recently emerged as a promising semiconductor for advanced electronics due to its high electron mobility and wide bandgap. In this article, the lateral scaling characteristics of top-gate In2O3 thin-film transistors (TFTs) featuring a 1.5 nm thick channel and a 7 nm thick HfO2 gate dielectric are investigated by two-dimensional device simulation. The analysis covers short-channel effects, DC characteristics, transconductance behavior, and small-signal radio frequency (RF) metrics across a gate-length (LG) range of 20 nm to 700 nm. Simulation results identify a critical gate length near 100 nm for the transition from long-channel to short-channel behavior. For LG ≤ 100 nm, pronounced short-channel effects emerge, featuring a significant negative VTH shift and a drain-induced barrier lowering (DIBL) coefficient up to ~130 mV/V. A non-classical gm scaling behavior is observed, where gm_max initially increases with LG, then remains within a narrow range and eventually evolves toward the conventional long-channel trend. Further analysis of the lateral electric field distribution, field-dependent mobility, and transconductance efficiency indicates that this behavior originates from a crossover between short-channel field-assisted transport and gate-controlled channel modulation. The devices show strong RF potential, with fT and fmax reaching 124.32 GHz and 157.64 GHz, respectively, at LG = 20 nm. The high-mobility In2O3 channel leads to a less distinct fT scaling transition from the classical 1/L2G dependence to the short-channel 1/LG dependence, while fmax scaling evolves through different regimes governed by capacitance-related limitations, intrinsic transport enhancement, and short-channel non-idealities. This work provides physical insight into the lateral scaling behavior of ultrathin top-gate In2O3 TFTs and highlights their potential for high-frequency and power-dense applications. Full article
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36 pages, 38341 KB  
Review
Surface Acoustic Wave Devices: New Mechanisms, Enabling Techniques, and Application Frontiers
by Hongsheng Xu, Xiangyu Liu, Weihao Ye, Xiangyu Zeng, Akeel Qadir and Jinkai Chen
Micromachines 2026, 17(4), 494; https://doi.org/10.3390/mi17040494 - 17 Apr 2026
Viewed by 956
Abstract
Surface Acoustic Wave (SAW) technology, long central to analog signal processing and RF filtering, is undergoing a major renewal. Driven by advances that decouple SAWs from traditional piezoelectric materials and fixed-function devices, the field is gaining unprecedented control over acoustic, optical, and electronic [...] Read more.
Surface Acoustic Wave (SAW) technology, long central to analog signal processing and RF filtering, is undergoing a major renewal. Driven by advances that decouple SAWs from traditional piezoelectric materials and fixed-function devices, the field is gaining unprecedented control over acoustic, optical, and electronic interactions at the micro and nanoscale. This review synthesizes these developments across four fronts: new physical mechanisms for SAW manipulation, emerging material platforms, ranging from thin films to 2D systems, along with reconfigurable device architectures and circuits, and the expanding landscape of applications they enable. Optical methods are reshaping how SAWs are generated and controlled, bypassing the limits of conventional electromechanical coupling. Coherent optical excitation of high-Q SAW cavities via Brillouin-like optomechanical interactions now grants access to modes in non-piezoelectric substrates such as diamond and silicon, while on-chip SAW excitation in photonic waveguides through backward stimulated Brillouin scattering opens new integrated sensing routes. In parallel, magneto-acoustic experiments have revealed nonreciprocal SAW diffraction from resonant scattering in magnetoelastic gratings. On the device side, ZnO thin-film transistors integrated on LiNbO3 exploit acoustoelectric coupling to realize voltage-tunable phase shifters; UHF Z-shaped delay lines achieve high sensitivity in a compact footprint; and parametric synthesis of wideband, multi-stage lattice filters targets 5G-class performance. Atomistic simulations show that SAW propagation in 2D MXene films can be engineered via surface terminations, while aerosol jet printing and SAW-assisted particle patterning provide agile, cleanroom-light fabrication of microfluidic and magnetic components. These advances enable applications ranging from hybrid quantum systems and quantum links to lab-on-a-chip particle control, SBS-based and UHF sensing, reconfigurable RF front-ends, and soft robotic actuators based on patterned magnetic composites. At the same time, optical techniques offer non-contact probes of dissipation, and MXenes and other emerging materials open new regimes of acoustic control. Conclusively, they are transforming SAW technology into a versatile, programmable platform for mediating complex interactions in next-generation electronic, photonic, and quantum systems. Full article
(This article belongs to the Special Issue Surface and Bulk Acoustic Wave Devices, 2nd Edition)
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13 pages, 2946 KB  
Article
Processing-Dependent Morphology and Photoluminescence Quenching in Donor–Acceptor PBDTTTPD:PNDI(2HD)2T Thin Films
by Otto Todor-Boer, Bogdan-Ionuț Ștefan, Levente Máthé, Tudor Blaga and Ioan Botiz
Coatings 2026, 16(4), 417; https://doi.org/10.3390/coatings16040417 - 1 Apr 2026
Viewed by 652
Abstract
In this study, we investigate the impact of processing strategies on the nanoscale morphology and photophysical behavior of donor–acceptor thin films composed of the polymeric donor PBDTTTPD and the n-type acceptor PNDI(2HD)2T. The blend morphology and interfacial characteristics were systematically tuned using three [...] Read more.
In this study, we investigate the impact of processing strategies on the nanoscale morphology and photophysical behavior of donor–acceptor thin films composed of the polymeric donor PBDTTTPD and the n-type acceptor PNDI(2HD)2T. The blend morphology and interfacial characteristics were systematically tuned using three distinct fabrication techniques: spin-coating, convective self-assembly, and space-confined solvent vapor annealing. Atomic force microscopy and photoluminescence spectroscopy were employed to elucidate structure–property correlations relevant to all-polymer optoelectronic systems. Films processed via convective self-assembly exhibited nanoscale features with extensive donor–acceptor intermixing, leading to the most efficient photoluminescence quenching of nearly 85%, indicative of enhanced exciton dissociation and charge transfer. In contrast, as-cast films displayed moderately mixed morphologies with approximately 81% quenching, serving as a reference state. The solvent vapor annealing method induced pronounced phase segregation and the formation of larger domains, resulting in reduced photoluminescence quenching efficiency of about 52%. These findings demonstrate that the nanoscale morphology, and consequently the photophysical response, of PBDTTTPD:PNDI(2HD)2T blends can be precisely tailored through processing, providing valuable design guidelines for all-polymer optoelectronic applications such as organic photovoltaics and field-effect transistors. Full article
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11 pages, 1438 KB  
Article
Nanoscale Thin-Film Flexible Organic Field-Effect Transistors with Triple PMMA/SiO2/ZnO Gate Insulator Layers
by Sundes Fakher, Furat AI-Saymari, Mohammed Mabrook and Hameed Al-Attar
Micromachines 2026, 17(3), 382; https://doi.org/10.3390/mi17030382 - 21 Mar 2026
Viewed by 608
Abstract
Organic field-effect transistors (OFETs) incorporating a triple insulating layer of polymethyl methacrylate (PMMA), silicon dioxide (SiO2), and zinc oxide (ZnO) were successfully fabricated on glass and on flexible PET substrates. The insulating layers significantly enhanced device performance, with the OFETs achieving [...] Read more.
Organic field-effect transistors (OFETs) incorporating a triple insulating layer of polymethyl methacrylate (PMMA), silicon dioxide (SiO2), and zinc oxide (ZnO) were successfully fabricated on glass and on flexible PET substrates. The insulating layers significantly enhanced device performance, with the OFETs achieving field-effect mobility (µ) values more than twice as high as those reported in the literature. Specifically, mobility values of ~6.75 cm2/V·s were recorded on glass, ~7.14 cm2/V·s on flexible substrates before bending, and ~6.88 cm2/V·s on flexible substrates after bending. Threshold voltages (Vth) of −7 V and −9 V were estimated for the flexible OFETs before and after bending, respectively, along with a high on/off current ratio, exceeding 103 for all devices. Minimal hysteresis in the transfer and output characteristics indicated excellent, trap-free interaction between the insulating layers and the pentacene. The high dielectric constant of the PMMA/SiO2/ZnO triple insulating layers was identified as a critical factor driving the exceptional performance, stability, and low hysteresis of the OFETs. These results underscore the pivotal role of advanced insulating layers in optimizing OFET performance and durability. Full article
(This article belongs to the Section D1: Semiconductor Devices)
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