Search Results (378)

In this work, a plasma-free atomic layer deposition (ALD)-based H₂O post-treatment method is proposed to precisely modulate hydrogen-related (H-related) traps in indium gallium zinc oxide (IGZO) thin-film transistors (TFTs) by the number of H₂O treatment cycles. Under the optimized condition, the scaled device with a channel length of 70 nm exhibits a near-ideal subthreshold swing of 62.9 mV/dec, a low threshold voltage (V_TH) of 0.18 V, an acceptable static leakage current, and a high drive current of 3.29 μA/μm at an overdrive voltage and drain voltage of 1 V. In addition, the treated device shows only a 13 mV of V_TH shift after 1000 s positive bias stress (PBS), corresponding to a 94% improvement compared with the pristine device. These improvements are attributed to the introduction of two different polarities of hydrogen-related traps after H₂O treatment. Furthermore, the influence of H-related traps on bias stability and the mechanisms responsible for V_TH shift are systematically clarified. These results establish that an optimized hydrogen incorporation window that maximizes the beneficial effects while balancing severe hydrogen-induced degradation caused by excessive hydrogen incorporation. Consequently, scaled IGZO TFTs with fast switching, low-power operation, high performance, and high reliability can be achieved, providing strong potential for back-end-of-line (BEOL)-compatible electronics and monolithic three-dimensional integrated applications. Full article

The development of flexible thin-film transistors (TFTs) is crucial for the advancement of wearable electronics, bendable displays, and the Internet of Things (IoT). A key challenge in this field is the fabrication of high-performance gate dielectric layers that combine excellent electrical properties with mechanical robustness and low-temperature processability. In this work, we report flexible TFTs based on CdS and hybrid PVPh/PMMA-ZrO₂ as semiconductor and gate dielectric layers, respectively. The hybrid gate dielectric films were deposited on flexible PEN substrates via a facile spin-coating process at a low temperature of 150 °C. On the other hand, CdS layers were deposited through photo-assisted chemical bath deposition at room temperature. Both correspond to deposition methods in solutions, fulfilling the low-temperature condition. The electrical properties of the hybrid gate dielectric layers were characterized by using metal–insulator–metal (MIM) capacitors, which presented excellent insulating properties, low leakage current density and suitable gate capacitance for transistor operation. From the analysis of the electrical response of flexible TFTs, reliable device characteristics and key electrical metrics were extracted. Furthermore, the MIM and TFTs were tested under mechanical bending, demonstrating stable performance. The MIM capacitors showed outstanding mechanical stability, retaining low leakage and stable capacitance after 1000 bending cycles, with changes attributed to reversible interfacial charge redistribution rather than bulk degradation. Meanwhile the TFTs kept full electrical functionality under repeated bending and tight bending radii (down to 0.6 cm), demonstrating reasonable mechanical durability. These results validate the solution-processed PVPh/PMMA-ZrO₂/CdS system as a promising, mechanically robust platform for flexible electronics. Full article

Enhancement behavior on saturation current of output characteristics in amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors under positive bias stress (PBS) is investigated. The threshold voltage (V_th) of the a-IGZO TFT demonstrates a typical positive shift during PBS. Notably, the output current at an identical overdrive voltage (V_ov) initially rises with increasing bias stress duration. The observed phenomena are elucidated by the detrapping of positively charged defects situated at the interface between the dielectric and active layer due to electrons induced by bias stress during PBS, which diminishes carrier scattering at the channel interface. Following the full release of positive interface charge, additional electron trapping states emerge. The presence of trapped electrons intensifies carrier scattering at the channel interface, leading to a degradation in drive current. Low-frequency noise (LFN) measurements are conducted to verify the suggested mechanism of PBS instability in a-IGZO TFTs. Moreover, the energy distribution of PBS-induced traps is shown by C-V characterization to be exponential, dominated by shallow traps. Passivation greatly enhanced the PBS stability, which is attributed to hydrogen doping-induced defect passivation and the shielding of the back-channel interface from the air atmosphere. Full article

In this study, we systematically decoupled reversible charge transitions via recombination and irreversible bulk trapping via ionization in solution-processed indium zinc oxide thin-film transistors (TFTs) under positive- and negative-bias-stress (PBS and NBS) conditions. We defined highly decoupled degradation behavior by completely evaluating time-dependent transfer characteristics and saturation leakage currents across a range of indium molarities (0.0125 M to 0.2 M). Results indicate that PBS-induced instability is likely governed by a reversible electrostatic neutralization process reducing total effective shallow and deep acceptor-like states, which are dynamically counteracted by interfacial recombination at the dielectric/semiconductor boundary. Conversely, severe degradation under NBS originated from irreversible bulk trapping triggered by the ionization of donor-like oxygen vacancies in a ZnO amorphous random network. Total effective trapped charges were calculated from threshold voltage shifts to clarify these defect kinetics quantitatively; these calculations demonstrated direct correlation with the integrated theoretical capacities of the deep and shallow acceptor-like gap-state distributions. Finally, we propose a comprehensive density of state–energy band alignment model incorporating thermal activation energies and flat-band voltages. This analytical framework proves that the composition-dependent Fermi level positioning rigorously limits and dictates complex bias-stress instabilities, offering profound insights for designing highly stable amorphous oxide semiconductor TFTs. Full article

In this work, a post-annealing rapid cooling and aging treatment process is innovatively proposed to build high-performance zinc tin oxide (ZTO) thin-film transistors. The relaxation effect on the abundant oversaturated oxygen vacancy deep-level traps contributes to the shallow donor formation during the aging period. The TFTs aged in an air environment for 10 days possess significantly improved electrical performance, including a clearly increased on/off current ratio of 7 × 10⁶ from 2 × 10⁴ and a markedly increased saturation mobility of 5.9 from 2.2 cm²·V⁻¹·s⁻¹, verifying the facile method to improve the electrical property of polycrystalline TFTs, and the method has been investigated using the grain boundary defect relaxation model and energy band theory. It is worth mentioning that the TFTs aged under vacuum conditions realized more effective regulation and control on off-state current and demonstrated a wider aging time window. The distinctive illumination interface stability was studied in depth using a charge trapping model and electron–hole pair model, which embody the potential application in photoelectric detectors. Full article

Carbon nanotube (CNT) networks are promising candidate channel materials for thin-film transistors (TFTs). However, the charge trapping characteristics underlying the gate hysteresis effect still remain unclear. Herein, high-performance CNT TFTs with good consistencies were fabricated to investigate the hysteresis-induced performance variations and the dynamic charge trapping/releasing behaviors at different gate biases. Both the subthreshold and suprathreshold characteristics of the TFTs are remarkably changed under different gate sweeping directions. The origin of gate hysteresis was illustrated by comparing the effects of gas desorption and selective re-adsorption, and the adsorbed O₂ and H₂O make different contributions related to specific charge trapping characteristics. We further demonstrate that the dynamic charge trapping/releasing processes are governed by the applied gate biases, revealing the equivalency between the positive charge trapping and negative charge releasing processes, and vice versa. The time-dependent degradation of the on-state current has been fitted to perform a statistical analysis based on the measurement results of eight devices. Three characteristic time constants have been determined, corresponding to a multi-step trapping process that may be dominated by dielectric surface trapping and trap-assisted tunneling into the bulk defects in the dielectric layer near the CNTs and those in depth, respectively. Full article

In this work, ZnO, WO₃, and MgO were doped into InSnZnO (ITZO) films via co-sputtering to enhance the mobility and stability of ITO-based thin film transistors (TFTs). ITZO, InSnWO (ITWO) and InSnMgO (ITMO) films were fabricated, and the effect of cation dopants on the oxygen stoichiometry in ITO films was investigated. We further discussed their influence on the electrical parameters of corresponding TFTs, including threshold voltage ($V_{\mathrm{th}}$), subthreshold swing (SS), and field-effect mobility (${\mu }_{\mathrm{FE}}$). Additionally, the positive and negative bias stress stability of these devices was evaluated. The results demonstrate that ITWO TFTs exhibit superior stability despite a reduction in mobility. This is attributed to the high electronegativity of W⁶⁺ and the strong W-O bonding, which effectively mitigate the formation of oxygen vacancies and suppress the adsorption of impurities at the back channel. The findings provide valuable insights for the material design of high-performance TFTs. Full article

Colloidal quantum dots (CQDs) are ideal for room-temperature gas sensors due to their high surface area, abundant dangling bonds, and excellent film-forming properties. However, the underlying conduction mechanism remains unclear, lacking in-depth analysis of gas–solid charge transfer and carrier transport, which hinders the rational design of high-performance gas sensors. To address this, we fabricated a PbS colloidal quantum dot thin-film transistor (TFT) gas sensor that enables in situ analysis of carrier concentration and mobility via gate voltage modulation. We systematically measured the variations in conductivity, carrier concentration, and mobility with NO₂ concentration and established a normalized weight variation model. The results show that the conductivity increase upon NO₂ exposure is primarily due to the rise in carrier concentration induced by gas adsorption. At low concentrations (below 0.5 ppm), the response is dominated by mobility variation. This work provides a physically meaningful theoretical framework for understanding the conduction mechanism. Full article

Low-refresh-rate driving is an effective way to reduce the power consumption of active-matrix organic light-emitting diode (AMOLED) displays. However, in conventional low-temperature polycrystalline silicon (LTPS) thin-film transistor (TFT) pixel circuits, leakage current through switching TFTs can disturb the stored gate voltage of the driving TFT during the long emission period. This causes the time-dependent variation in driving current and visible flicker. In this study, a novel pixel circuit for leakage suppression in low-refresh-rate driving is presented. Bias aging was first applied to reduce the leakage current of the LTPS TFT, and a device model was then built from the characteristics measured at 60 °C. Based on this model, the leakage-induced instability of a conventional 7T1C pixel circuit was analyzed. To suppress this effect, a new 8T1C pixel circuit was proposed. The key idea is to reduce the source–drain voltage of the leakage-sensitive switching TFT during the emission period by raising the initial line potential to a level close to the storage node potential. Simulation results show that the proposed circuit greatly reduces the time-dependent variation in both the driving TFT gate voltage and the driving current compared with the conventional 7T1C circuit. Perceptual evaluation based on human visual sensitivity also confirms stable low-refresh-rate operation down to 20 Hz over the practical gray range. These results show that the proposed circuit is an effective solution for moderate low-refresh-rate operation without relying on low-temperature polycrystalline silicon and oxide (LTPO) technology. Full article

With the continuous advancement of display technology and advanced integrated circuits, oxide thin-film transistors (TFTs) have become core devices due to their high mobility, low leakage current and excellent large-area uniformity. To achieve low power consumption, high performance and high reliability, the introduction of high-k gate insulating layers is crucial. Among the numerous high-k materials, hafnium oxide (HfO₂) has attracted significant attention due to its excellent dielectric properties and good compatibility with CMOS processes. In this paper, uniform and dense HfO₂ films were successfully fabricated using the sol–gel method to serve as insulating layers for TFT devices. Through experimental analysis, 400 °C was determined to be the optimal annealing temperature. At this temperature, the effects of replacing SiO₂ with HfO₂ as the insulating layer, as well as the impact of reducing film thickness, on TFT devices were investigated. Ultimately, at an annealing temperature of 400 °C, an 85 nm-thick HfO₂ film achieved the highest on/off current ratio (I_on/off = 1.11 × 10⁶), the lowest subthreshold swing (SS = 0.53 V/dec), the lowest threshold voltage (Vth = −1.1 V) and the lowest off-current ratio (I_off = 2.5 × 10⁻¹² A). It was confirmed that replacing SiO₂ with HfO₂ as the insulating layer is a viable approach for reducing the volume of TFT devices. Full article

Indium hafnium oxide thin-film transistors (TFTs) were prepared by the sol-gel method, and their crystal structures, surface morphologies, chemical compositions, optical and electrical properties were systematically investigated using X-ray diffraction (XRD), atomic force microscopy (AFM), X-ray photoelectron spectroscopy (XPS), ultraviolet-visible (UV-Vis) spectroscopy, and a semiconductor parameter analyser. We mainly study the effects of hafnium doping on indium oxide-based thin-film transistors through the following electrical properties, including field-effect mobility (μ FE), carrier concentration, on/off current ratio (Ion/Ioff), threshold voltage (Vth), and subthreshold slope (SS). The oxygen defects concentration decreased from 25.83% to 17.82% when Hf doping was increased to 5 mol%. The effect of Hf doping on the structure, as well as the properties of the Hf-InO_x thin films, was explored and it was found that Hf as a carrier inhibitor can effectively suppress the carrier concentration. This reduces the oxygen vacancy defects and improves the electrical performance of In₂O₃TFTs devices. The doped thin-film transistor exhibits excellent electrical properties with a mobility (μ) of 11.69 cm²/Vs, a threshold voltage (V_TH) of 1.68 V, a subthreshold slope (SS) of 0.68 V/dec, and an on/off current ratio (I_on/I_off) of 10⁷ when the Hf doping level is 3 mol%. Research indicates that the Hf-InO_x thin film prepared by the sol-gel method is a low-cost, high-performance, and widely applicable active layer material. Full article

Indium oxide (In₂O₃) has recently emerged as a promising semiconductor for advanced electronics due to its high electron mobility and wide bandgap. In this article, the lateral scaling characteristics of top-gate In₂O₃ thin-film transistors (TFTs) featuring a 1.5 nm thick channel and a 7 nm thick HfO₂ gate dielectric are investigated by two-dimensional device simulation. The analysis covers short-channel effects, DC characteristics, transconductance behavior, and small-signal radio frequency (RF) metrics across a gate-length (L_G) range of 20 nm to 700 nm. Simulation results identify a critical gate length near 100 nm for the transition from long-channel to short-channel behavior. For L_G ≤ 100 nm, pronounced short-channel effects emerge, featuring a significant negative V_TH shift and a drain-induced barrier lowering (DIBL) coefficient up to ~130 mV/V. A non-classical gm scaling behavior is observed, where g_{m_max} initially increases with L_G, then remains within a narrow range and eventually evolves toward the conventional long-channel trend. Further analysis of the lateral electric field distribution, field-dependent mobility, and transconductance efficiency indicates that this behavior originates from a crossover between short-channel field-assisted transport and gate-controlled channel modulation. The devices show strong RF potential, with f_T and f_max reaching 124.32 GHz and 157.64 GHz, respectively, at L_G = 20 nm. The high-mobility In₂O₃ channel leads to a less distinct f_T scaling transition from the classical 1/L²_G dependence to the short-channel 1/L_G dependence, while f_max scaling evolves through different regimes governed by capacitance-related limitations, intrinsic transport enhancement, and short-channel non-idealities. This work provides physical insight into the lateral scaling behavior of ultrathin top-gate In₂O₃ TFTs and highlights their potential for high-frequency and power-dense applications. Full article

Amorphous gallium oxide thin-film transistor photodetectors are promising for ultraviolet detection because of their wide bandgap and low dark current. Magnetron sputtering is compatible with low-temperature processing, but device performance is sensitive to sputtering conditions. Poor parameter choices can introduce oxygen vacancies and interface charges, degrading optoelectronic performance. Here, a three-factor, three-level orthogonal design is used to vary sputtering power, Ar/O₂ flow ratio, and film thickness. Nine device sets are fabricated and compared based on transfer characteristics and transient photocurrent–time (I-t) responses measured at a wavelength of 254 nm, with clear differences observed among process combinations. To identify the origin of these differences, representative samples with significant responsivity variations were modeled using TCAD. By fitting the simulated I-t curves to measured transients, the interface fixed charge density and defect-state densities were extracted, and the photon absorption distribution of different samples was analyzed. This analysis, from both defect and UV absorption perspectives, revealed the reasons for the differences in responsivity. The absorption coefficients at 254 nm measured by ellipsometry for the two samples were also compared, and the absorption trends observed in both the simulation and ellipsometry were consistent, confirming the accuracy of the simulation results. This work presents an integrated experimental and TCAD approach for process optimization and mechanistic analysis of a-GaO_x TFT-PDs. Full article

To improve the low deposition rate of atomic layer deposition (ALD), we introduced filtered cathodic vacuum arc (FCVA) technology for the high-rate deposition of Al₂O₃ films. The FCVA-Al₂O₃ process achieved a deposition rate of 15 nm/min, which is approximately an order of magnitude higher than that of conventional ALD. This process does not involve hydrogen, preventing hydrogen ion penetration and thereby ensuring the high stability of the oxide TFT backplane. FCVA-Al₂O₃ films were integrated with inkjet-printed (IJP) organic layers to form a hybrid thin-film encapsulation (TFE) structure for OLEDs. The resulting laminated encapsulation exhibited excellent water vapor barrier properties (WVTR, Water Vapor Transmission Rate of 1.2 × 10⁻⁴ g/m²/day), demonstrating the great potential of FCVA for packaging high-throughput and high-performance flexible electronics. In addition to evaluating barrier properties (surface roughness, residual stress, and WVTR) to assess the suitability of TFE, the impact of FCVA technology was assessed via oxide thin-film transistor (TFT) electrical performance and OLED device reliability tests. The electrical properties of oxide TFTs show no significant degradation post-encapsulation, while OLED performance, despite a slight increase in current efficiency, remains effectively unchanged. Additionally, the lifetime of OLED devices reached 300 h under accelerated aging conditions (85 °C, 85% relative humidity), which is nearly twice that of devices without FCVA-Al₂O₃ encapsulation. Full article

Stretchable semiconductors capable of maintaining electrical performance under large mechanical deformation are essential for reliable wearable electronic devices. However, polymer semiconductors often suffer from electrical degradation when subjected to tensile strain. In this study, electrical stability under strain was achieved by using a rubber-blended poly(2,5-bis(2-octyldodecyl)-3,6-di(thiophen-2-yl)diketopyrrolo[3,4-c]pyrrole-1,4-dione-alt-thieno[3,2-b]thiophene) (DPPT-TT) polymer semiconductor based on a conjugated polymer/elastomer phase separation-induced elasticity (CONPHINE) structure. Unlike most previous studies on fully stretchable thin-film transistors (TFTs), which primarily report overall performance changes under mechanical strain, this work systematically identifies the dominant origin of electrical performance degradation through a stepwise electrical analysis encompassing the gate insulating layer, the semiconductor layer, and complete devices. Bottom-gate top-contact (BGTC) and bottom-gate bottom-contact (BGBC) devices were fabricated on rigid Si/SiO₂ substrates to examine the intrinsic properties of the DPPT-TT/styrene-ethylene-butylene-styrene (SEBS) CONPHINE film. As a result, the device exhibits 90% mobility retention even at 100% tensile strain applied parallel to the charge transport direction. Quantitative resistance analysis using the Y-function method reveals that variations in channel resistance play a dominant role in strain-induced performance degradation, whereas changes in contact resistance contribute only marginally. These findings demonstrate that stabilizing channel resistance, rather than contact resistance, is important for achieving high mobility retention under large mechanical deformation, thereby providing concrete and quantitative design guidelines for reliable stretchable TFTs. Full article