Search Results (17)

Electromigration (EM) is a critical reliability concern in electronic solder joints due to increasing current densities in modern electronic packaging. EM-induced failures often manifest as void formation and microstructural degradation, particularly at the cathode interface. To address this issue, composite solder joints with elemental additions have been explored to enhance performance under high current stress. This study investigates the effect of Zn addition on the electromigration behavior and mechanical performance of eutectic Sn-Bi solder joints on copper (Cu) and nickel-coated copper (Ni/Cu) substrates. The solder alloys 58Sn-42Bi and Zn-modified Sn-Bi were prepared and reflowed onto the substrates. Electromigration testing was performed under a constant current of 1000 mA at room temperature, with applied voltages of 5 V, 12 V, and 24 V over a 10-day period per sample. Shear tests were conducted at a crosshead speed of 0.1 mm/min to evaluate joint strength. The results revealed that Zn addition influenced the distribution of Bi within the solder matrix, reducing Bi depletion at the cathode and mitigating accumulation at the anode, suggesting improved EM resistance. Zn-containing solder joints also demonstrated enhanced shear strength compared to unmodified Sn-Bi joints. These findings highlight the potential of Zn as a beneficial alloying element for improving the reliability of lead-free solder joints and form a foundation for future studies incorporating phase analysis and predictive EM lifetime modelling. Full article

High-Bandwidth Memory (HBM) enables the bandwidth required by modern AI and high-performance computing, yet its three dimensional stack traps heat and amplifies thermo mechanical stress. We first review how conventional solutions such as heat spreaders, microchannels, high density Through-Silicon Vias (TSVs), and Mass Reflow Molded Underfill (MR MUF) underfills lower but do not eliminate the internal thermal resistance that rises sharply beyond 12layer stacks. We then synthesize recent hybrid bonding studies, showing that an optimized Cu pad density, interface characteristic, and mechanical treatments can cut junction-to-junction thermal resistance by between 22.8% and 47%, raise vertical thermal conductivity by up to three times, and shrink the stack height by more than 15%. A meta-analysis identifies design thresholds such as at least 20% Cu coverage that balances heat flow, interfacial stress, and reliability. The review next traces the chain from Coefficient of Thermal Expansion (CTE) mismatch to Cu protrusion, delamination, and warpage and classifies mitigation strategies into (i) material selection including SiCN dielectrics, nano twinned Cu, and polymer composites, (ii) process technologies such as sub-200 °C plasma-activated bonding and Chemical Mechanical Polishing (CMP) anneal co-optimization, and (iii) the structural design, including staggered stack and filleted corners. Integrating these levers suppresses stress hotspots and extends fatigue life in more than 16layer stacks. Finally, we outline a research roadmap combining a multiscale simulation with high layer prototyping to co-optimize thermal, mechanical, and electrical metrics for next-generation 20-layer HBM. Full article

This paper presents a detailed physical model for a novel method of two- and three-dimensional microstructure formation: dry electron beam etching of the resist (DEBER). This method is based on the electron-beam induced thermal depolymerization of positive resist, and its advantages include high throughput and relative simplicity compared to other microstructuring techniques. However, the exact mechanism of profile formation in DEBER has been unclear until now, hindering the optimization of this technique for certain applications. The developed model takes into account the major DEBER phenomena: e-beam scattering in resist and substrate, e-beam induced main-chain scissions of resist molecules, thermal depolymerization of resist, monomer diffusion, and resist reflow. Based on the developed model, a simulation algorithm was implemented, which allowed simulation of the profile obtained in resist by DEBER. Experimental verification of the DEBER model was carried out, which demonstrated the reliability of the model and its applicability for theoretical study of this method. The ultimate DEBER characteristics were estimated by simulation. The minimum line width and the maximum profile slope that could be obtained by DEBER were approximately 300 nm and 70°, respectively. Full article

For vertical interconnect access (VIA) in three-dimensional (3D) structure chips, including those with high bandwidth memory (HBM), shrinking contact holes (C/Hs) using the resist flow process (RFP) represents the most promising technology for low-${\mathrm{k}}_1 (\mathrm{w}\mathrm{h}\mathrm{e}\mathrm{r}\mathrm{e} \mathrm{C}\mathrm{D}={\mathrm{k}}_1\mathsf{\lambda }/\mathrm{N}\mathrm{A},$$\mathrm{C}\mathrm{D}$ is the critical dimension, $\mathsf{\lambda }$ is wavelength, and $\mathrm{N}\mathrm{A}$ is the numerical aperture). This method offers a way to reduce dimensions without additional complex process steps and is independent of optical technologies. However, most empirical models are heuristic methods and use linear regression to predict the critical dimension of the reflowed structure but do not account for intermediate shapes. In this research, the resist flow process (RFP) was modeled using the evolution method, the finite-element method, machine learning, and deep learning under various reflow conditions to imitate experimental results. Deep learning and machine learning have proven to be useful for physical optimization problems without analytical solutions, particularly for regression and classification tasks. In this application, the self-assembly of cylinder-forming block copolymers (BCPs), confined in prepatterns of the resist reflow process (RFP) to produce small contact hole (C/H) dimensions, was described using the self-consistent field theory (SCFT). This research paves the way for the shrink modeling of the enhanced resist reflow process (RFP) for random contact holes (C/Hs) and the production of smaller contact holes. Full article

Properties such as lower melting temperature, good tensile strength, good reliability, and well creep resistance, together with low production cost, make the system Bi-Sn an ideal candidate for fine soldering in applications such as reballing or reflow. The first objective of the work was to determine the thermodynamic quantities of Bi and Sn using the electromotive force measurement method in an electrolytic cell (Gibbs’ enthalpies of the mixture, integral molar entropies, and the integral molar excess entropies were determined) at temperatures of 600 K and 903 K. The second objective addressed is the comprehensive characterization of three alloy compositions that were selected and elaborated, namely Bi25Sn75, Bi50Sn50, and Bi75Sn25, and morphological and structural investigations were carried out on them. Optical microscopy and SEM-EDS characterization revealed significant changes in the structure of the elaborated alloys, with all phases being uniformly distributed in the Bi50Sn50 and Bi75Sn25 alloys. These observations were confirmed by XRD and EDP-XRFS analyses. Diffractometric analysis reveals the prevalence of metallic Bi and traces of Sn, the formation of the Sn_0.3Bi_0.7, Sn_0.95Bi_0.05 compounds, and SnO and SnO₂ phases. Full article

Depending on operating conditions, metals and alloys are exposed to various factors: wear, friction, corrosion, and others. Plasma surface alloying of machine and tool parts is now an effective surface treatment process of commercial and strategic importance. The plasma surface alloying process involves adding the required elements (carbon, chromium, titanium, silicon, nickel, etc.) to the surface layer of the metal during the melting process. A thin layer of the compound is pre-applied to the substrate, then melted and intensively mixed under the influence of a plasma arc, and during the solidification process, a new surface layer with optimal mechanical properties is formed. Copper-based alloys—Cu-X, where X is Fe, Cr, V, Nb, Mo, Ta, and W—belong to an immiscible binary system with high mechanical strength, electrical conductivity, and magnetism (for Fe-Cu) and also high thermal characteristics. At the same time, copper-based alloys have low hardness. In this article, wear tests were carried out on coatings obtained by plasma alloying of CuSn10 and CrxCy under various friction conditions. The following were chosen as a modifying element: chromium carbide to increase hardness and iron to increase surface tension. It is noted that an increase in the chromium carbide content to 20% leads to the formation of a martensitic structure. As a result, the microhardness of the layer increased to 700 HV. The addition of CuSn10 + 20% CrxCy and an additional 5% iron to the composition of the coating improves the formation of the surface layer. Friction tests on fixed abrasive particles were carried out at various loads of 5, 10, and 50 N. According to the test results, the alloy layer of the Fe-Cr-C-Cu-Sn system has the greatest wear resistance under abrasive conditions and dry sliding friction conditions. Full article

Due to the growing demand for ultra-high-density integrated circuits in the integrated circuit industry, flip-chip bonding (FCB) has become the mainstream solution for chip interconnection. In flip-chip bonding (FCB), however, alloy solder is no longer adequate to meet the high heat dissipation demands of high-power devices with over 100 kW/cm² in power density due to its low reflow temperature. Nano-silver solder, on the other hand, exhibits superior thermal and electrical conductivity, making it an excellent alternative to traditional solder for FCB. This study explored nano-silver’s thermal reliability and electrical performance as a solder material. The following results were obtained through temperature cycle (with temperatures ranging from −55 to 150 °C) and high-temperature storage experiments (with applied temperatures of over 170 °C). The results indicate that as the duration of the high-temperature storage increased, the grain continued to coarsen, resulting in an average pore size transition from 0.004 to 0.072 μm². A strong correlation coefficient of 0.9913 was observed between the duration of high-temperature exposure and the porosity within the time range of 0–200 h. Following the reliability test, the shear strength of the nano-silver interconnect samples showed varying degrees of decrease. The bonding effect with the nano-silver layer can be enhanced, and the thermal reliability can be improved by depositing Ni/Ag on the surface of Cu, making it less prone to cracking. Regarding the electrical performance, the square resistance of the nano-silver interconnect structures increased by 35% after the reliability test. This indicates a significant degradation in the electrical reliability of nano-silver interconnects under temperature stress. Full article

A novel three-dimensional (3D) wafer-level sandwich packaging technology is here applied in the dual mass MEMS butterfly vibratory gyroscope (BFVG) to achieve ultra-high Q factor. A GIS (glass in silicon) composite substrate with glass as the main body and low-resistance silicon column as the vertical lead is processed by glass reflow technology, which effectively avoids air leakage caused by thermal stress mismatch. Sputter getter material is used on the glass cap to further improve the vacuum degree. The Silicon-On-Insulator (SOI) gyroscope structure is sandwiched between the composite substrate and glass cap to realize vertical electrical interconnection by high-vacuum anodic bonding. The Q factors of drive and sense modes in BFVG measured by the self-developed double closed-loop circuit system are significantly improved to 8.628 times and 2.779 times higher than those of the traditional ceramic shell package. The experimental results of the processed gyroscope also demonstrate a high resolution of 0.1°/s, the scale factor of 1.302 mV/(°/s), and nonlinearity of 558 ppm in the full-scale range of ±1800°/s. By calculating the Allen variance, we obtained the angular random walk (ARW) of 1.281°/√h and low bias instability (BI) of 9.789°/h. The process error makes the actual drive and sense frequency of the gyroscope deviate by 8.989% and 5.367% compared with the simulation. Full article

For the problem of high waste heat in the active area of high-power VCSEL arrays and the difficulty of heat dissipation, we took advantage of laser 3D printing technology and combined it with the relevant principles of fluid-structure coupling, three kinds of microchannel heat sink with different structures of pin-fin, honeycomb, and double-layer reflow were designed. The heat dissipation capacity of three kinds of heat sinks to the heat flux density 200 W/cm² VCSEL array and the influence of the key characteristics of the microchannel on the heat dissipation capacity was studied. The results show that the double-layer reflow microchannel heat sink has the strongest heat dissipation capability, with the minimum thermal resistance value of 0.258 °C/W when the microchannel diameter and the cooling mass flow rate were 0.5 mm and 24 L/h, respectively. The inner wall roughness of the pure copper microchannel prepared by 3D printing technology was 7.08 μm, and the heat sink thermal resistance was reduced by 0.7% compared with the smooth channel wall. The deviation of the microchannel diameter from the design size (500 μm) was −10 μm, and the heat sink thermal resistance was reduced by 0.8% compared to the theoretical value, which shows that the surface roughness and size deviation of the 3D printed microchannel had beneficial effect on enhancing heat dissipation. The actual thermal conductivity of the 3D printed pure copper after heat treatment was 310.4 W/m-K, at which point the thermal resistance was 0.306 °C/W, and the maximum temperature was 35.3 °C, which satisfied the operating temperature range of the chip. This study provides a theoretical basis and implementation method for the fabrication of heat sinks for high-energy VCSEL arrays using laser 3D printing technology. Full article

Smart textiles have attracted huge attention due to their potential applications for ease of life. Recently, smart textiles have been produced by means of incorporation of electronic components onto/into conductive metallic yarns. The development, characterizations, and electro-mechanical testing of surface mounted electronic device (SMD) integrated E-yarns is still limited. There is a vulnerability to short circuits as non-filament conductive yarns have protruding fibers. It is important to determine the best construction method and study the factors that influence the textile properties of the base yarn. This paper investigated the effects of different external factors, namely, strain, solder pad size, temperature, abrasion, and washing on the electrical resistance of SMD integrated silver-coated Vectran (SCV) yarn. For this, a Vectran E-yarn was fabricated by integrating the SMD resistor into a SCV yarn by applying a vapor phase reflow soldering method. The results showed that the conductive gauge length, strain, overlap solder pad size, temperature, abrasion, and washing had a significant effect on the electrical resistance property of the SCV E-yarn. In addition, based on the experiment, the E-yarn made from SCV conductive thread and 68 Ω SMD resistor had the maximum electrical resistance and power of 72.16 Ω and 0.29 W per 0.31 m length. Therefore, the structure of this E-yarn is also expected to bring great benefits to manufacturing wearable conductive tracks and sensors. Full article

In this study, the effect of intermetallic compound (IMC) bridging on the cracking resistance of microbumps with two different under bump metallization (UBM) systems, Cu/solder/Cu and Cu/solder/Ni, under a thermal cycling test (TCT) is investigated. The height of the Sn2.3Ag solders was ~10 µm, which resembles that of the most commonly used microbumps. We adjusted the reflow time to control the IMC bridging level. The samples with different bridging levels were tested under a TCT (−55–125 °C). After 1000 and 2000 TCT cycles (30 min/cycle), the samples were then polished and characterized using a scanning electron microscope (SEM). Before IMC bridging, various cracks in both systems were observed at the IMC/solder interfaces after the 1000-cycle tests. The cracks propagated as cyclic shapes from the sides to the center and became more severe as the thermal cycle was increased. With IMC bridging, we could not observe any further failure in all the samples even when the thermal cycle was up to 2000. We discovered that IMC bridging effectively suppressed crack formation in microbumps under TCTs. Full article

It is well-known that Cu–Sn intermetallic compounds are easily produced during reflow process and result in poor reliability of solder bump. Recently, amorphous metallic films have been considered to be the most effective barrier layer because of the absence of grain boundaries and immiscibility with copper. Since Cu–Ag alloys are characterized by their lower electrical resistivity and superior glass-forming ability, they are appropriate to be used as the diffusion barrier layers. In this study, molecular dynamics simulation was performed to investigate the effects of composition ratio and quenching rate on the internal microstructure, diffusion properties, and the strength of the interface between polycrystalline Cu and Cu–Ag barrier layers. The results showed that Cu₄₀Ag₆₀ and Cu₆₀Ag₄₀ present more than 95% of the amorphous at quenching rate between 0.25 and 25 K/ps, indicating a good glass-forming ability. Diffusion simulation showed that a better barrier performance can be achieved with higher amorphous ratio. For the sample of Cu₂₀Ag₈₀ with quenching rate of 25 K/ps, a void is initially generated in amorphous Cu–Ag layer during the tensile test. This indicates the strength of amorphous Cu–Ag is weaker than Cu–Ag/Cu interface and the polycrystalline Cu layer. Full article

The present study applied Sn–0.7Cu–0.2Zn alloy solders to a photovoltaic ribbon. Intermetallic compounds of Cu₆Sn₅ and Ag₃Sn formed at the Cu/solder/Ag interfaces of the module after reflow. Electron probe microanalyzer images showed that a Cu–Zn solid-solution layer (Zn accumulation layer) existed at the Cu/solder interface. After a 72 h current stress, no detectable amounts of Cu₆Sn₅ were found. However, a small increase in Ag₃Sn was found. Compared with a Sn–0.7Cu photovoltaic module, the increase of the intermetallic compounds thickness in the Sn–0.7Cu–0.2Zn photovoltaic module was much smaller. A retard in the growth of the intermetallic compounds caused the series resistance of the module to slightly increase by 9%. A Zn accumulation layer formed at the module interfaces by adding trace Zn to the Sn–0.7Cu solder, retarding the growth of the intermetallic compounds and thus enhancing the lifetime of the photovoltaic module. Full article

Thermoplastic polymer micro- and nanostructures suffer pattern decay when heated to a temperature close to or above the polymer’s glass transition temperature. In this work, we report enhanced thermal stability of polycarbonate nanostructures at temperatures well above their glass transition temperatures. Based on this observation, we develop a unique technique for high-resolution polymer patterning by polymer reflows. This technique is characterized as the precise control of polymer reflows regardless of the annealing time, which avoids the time-domain nonlinear reflow of the polymer melt. We also implement thermal nanoimprinting in a step-and-repeat fashion, which dramatically increases the throughput of the thermal nanoimprint. The enhanced pattern stability against thermal reflow also allows for multiple imprinting at the same location to generate complex resist patterns from a simple mold structure. Since modern lithography often uses thin resist films (sub-100 nm) due to the restraint from the pattern aspect ratio, the unusual annealing behavior of thin polymer films is highly relevant in sub-100 nm lithographic processing. Full article

A novel three-dimensional (3D) hermetic packaging technique suitable for capacitive microelectromechanical systems (MEMS) sensors is studied. The composite substrate with through silicon via (TSV) is used as the encapsulation cap fabricated by a glass-in-silicon (GIS) reflow process. In particular, the low-resistivity silicon pillars embedded in the glass cap are designed to serve as the electrical feedthrough and the fixed capacitance plate at the same time to simplify the fabrication process and improve the reliability. The fabrication process and the properties of the encapsulation cap were studied systematically. The resistance of the silicon vertical feedthrough was measured to be as low as 263.5 mΩ, indicating a good electrical interconnection property. Furthermore, the surface root-mean-square (RMS) roughnesses of glass and silicon were measured to be 1.12 nm and 0.814 nm, respectively, which were small enough for the final wafer bonding process. Anodic bonding between the encapsulation cap and the silicon wafer with sensing structures was conducted in a vacuum to complete the hermetic encapsulation. The proposed packaging scheme was successfully applied to a capacitive gyroscope. The quality factor of the packaged gyroscope achieved above 220,000, which was at least one order of magnitude larger than that of the unpackaged. The validity of the proposed packaging scheme could be verified. Furthermore, the packaging failure was less than 1%, which demonstrated the feasibility and reliability of the technique for high-performance MEMS vacuum packaging. Full article