Search Results (190)

Synthetic nanopores were recently demonstrated with memristive and nonlinear voltage-current behaviors, akin to ion channels in a cell membrane. Such ionic devices are considered a promising candidate for the development of brain-inspired neuromorphic computing techniques. In this work, we show the composite behavior of nanopore-array large memristors, formed with different membrane materials, pore sizes, electrolytes, and device arrangements. Anodic aluminum oxide (AAO) membranes with 5 nm and 20 nm diameter pores and track-etched polycarbonate (PCTE) membranes with 10 nm diameter pores are tested and shown to demonstrate memristive and nonlinear behaviors with approximately 10⁷–10¹⁰ pores in parallel when electrolyte concentration across the membranes is asymmetric. Ion diffusion through the large number of channels induces time-dependent electrolyte asymmetry that drives the system through different memristive states. The behaviors of series composite memristors with different configurations are also presented. In addition to helping understand fluidic devices and circuits for neuromorphic computing, the results also shed light on the development of field-assisted ion-selection-membrane filtration techniques as well as the investigations of large neurons and giant synapses. Further work is needed to de-embed parasitic components of the measurement setup to obtain intrinsic large memristor properties. Full article

This study presents transistor-level simulation results for a novel memristor emulator circuit. The design incorporates an inverter and a current-mode-controlled operational transconductance amplifier to stabilize the output voltage. Transient performance is evaluated across a 20 MHz to 100 MHz frequency range. Simulations using 0.18 μm TSMC technology confirm the circuit’s functionality, demonstrating a power consumption of 0.1 mW at a 1.2 V supply. The memristor model’s reliability is verified through corner simulations, along with Monte Carlo and temperature variation tests. Furthermore, the emulator is applied in a Memristive Integrate-and-Fire neuron circuit, a CMOS-based system that replicates biological neuron behavior for spike generation, enabling ultra-low-power computing and advanced processing in retinal prosthesis applications. Full article

Threshold-switching memristors (TSMs) are emerging as key enablers for hardware spiking neural networks, offering intrinsic spiking dynamics, sub-pJ energy consumption, and nanoscale footprints ideal for brain-inspired computing at the edge. This review provides a comprehensive examination of how TSMs emulate diverse spiking behaviors—including oscillatory, leaky integrate-and-fire (LIF), Hodgkin–Huxley (H-H), and stochastic dynamics—and how these features enable compact, energy-efficient neuromorphic systems. We analyze the physical switching mechanisms of redox and Mott-type TSMs, discuss their voltage-dependent dynamics, and assess their suitability for spike generation. We review memristor-based neuron circuits regarding architectures, materials, and key performance metrics. At the system level, we summarize bio-inspired neuromorphic platforms integrating TSM neurons with visual, tactile, thermal, and olfactory sensors, achieving real-time edge computation with high accuracy and low power. Finally, we critically examine key challenges—such as stochastic switching origins, device variability, and endurance limits—and propose future directions toward reconfigurable, robust, and scalable memristive neuromorphic architectures. Full article

Memristors, as the fourth fundamental circuit element, have attracted significant interest for their potential in analog signal processing, computing, and memory storage technologies. However, physical memristor implementations still face challenges in reproducibility, scalability, and integration with standard CMOS processes. Memristor emulator circuits, implemented using analog, digital, and mixed components, have emerged as practical alternatives, offering tunability, cost effectiveness, and compatibility with existing fabrication technologies for research and prototyping. This review paper provides a comprehensive analysis of recent advancements in memristor emulator design methodologies, including active and passive analog circuits, digital implementations, and hybrid approaches. A critical evaluation of these emulation techniques is conducted based on several performance metrics, including maximum operational frequency range, power consumption, and circuit topology. Additional parameters are also taken into account to ensure a comprehensive assessment. Furthermore, the paper examines promising healthcare applications of memristor and memristor emulators, focusing on their integration into biomedical systems. Finally, key challenges and promising directions for future research in memristor emulator development are outlined. Overall, the research presented highlights the promising future of memristor emulator technology in bridging the gap between theoretical memristor models and practical circuit implementations. Full article

Memristive elements, known as memristors, memcapacitors and meminductors, have become an important topic of research in the electronics world in recent years. As there is still no efficient way to manufacture two-terminal memristive elements, many researchers have focused their efforts on designing emulator circuits that mimic these devices. In this study, a memcapacitor emulator circuit using Current Derivative Buffered Amplifier (CDBA) is proposed, which has significant advantages such as wide dynamic range, differential structure at the input port, high sloping rate and wide bandwidth. The main advantages of the emulator are that it is floating without grounding constraint, it is electronically adjustable, it has charge-controlled incremental and decremental modes and it has a simpler circuit structure since it does not contain a memristor. To ensure the integrity of the circuit theory, the results of the mathematical model and the simulation of the memcapacitor are given together. In addition, the characteristics of the experimentally investigated memcapacitor emulator are in good agreement with the simulation results. To provide an illustration of the performance of the proposed emulator, firstly the second-order active low-pass filter circuit and subsequently the amoeba learning circuit are selected as the working environment. The results show that the filtering performance of the proposed emulator at a value after the cut-off frequency in the filter circuit is $25\%$ more efficient than a standard capacitor and in terms of power consumption, it consumes $27.93\%$ less power than a standard capacitor. Moreover, the emulator successfully accomplishes the learning and data storage tasks in the amoeba learning circuit. Full article

This paper presents a dual-band bandpass filter with passband switchability controlled by using memristors. The memristor is a good choice as a control element due to its characteristics, such as low-power consumption, no bias needed, good electrical characteristics, and no moving parts. The filter’s reconfigurability is achieved by using memristors to selectively connect filter elements to ground. For the filter realization, multilayer technology with quasi-lumped elements has been chosen because of filter size miniaturization. Circuit-level simulations were initially used for quick analysis, followed by 3D EM simulations to validate the expected functionality of the proposed design concept. The results confirm the feasibility of a very small dual-band bandpass filter with independently controllable passbands. The frequency response of each of the two passbands (3.5 GHz and 5.8 GHz) can be tuned with negligible impact on the other passband by controlling the states of the memristors. The filter footprint area is equal to 0.10 λ_g × 0.12 λ_g, where λ_g is the guided wavelength at 3.5 GHz. Full article

Devices with tunable characteristics and parameters are used in many technical fields. Such devices can be based on memristors, which serve as programmable potentiometers. The quality of the tuning is higher by means of memristors than with mechanical and digital potentiometers. We investigate a bandpass filter in the form of an active Wien bridge with a memristor. The filter is analyzed with the help of the nodal voltage method. The dependence of the resonance frequency on the parameters of the Wien circuit, the dependence of the quality factor, and the filter gain at resonant frequency on the parameters of the voltage divider are obtained. The dependences of the resonant frequency, quality factor, and gain at the resonant frequency on the parameters of the Wien filter were formed. The tuning of the main frequency features (the filter gain, quality factor, and resonance frequency) is shown to be independent. Under different values of memristance, the frequency features result from a simulation in LTspice. These features are less than 1 percent different from the corresponding features obtained analytically. Thus, the high precision of modeling and tuning of the frequency characteristics of the memristive Wien filter is demonstrated. Full article

In a biological nervous system, neurons are connected to each other via synapses to transmit information. Synaptic crosstalk is the phenomenon of mutual interference or interaction of neighboring synapses between neurons. This phenomenon is prevalent in biological neural networks and has an important impact on the function and information processing of the neural system. In order to simulate and study this phenomenon, this paper proposes a memristor model based on hyperbolic tangent function for simulating the activation function of neurons, and constructs a three-neuron HNN model by coupling two memristors, which brings it close to the real behavior of biological neural networks, and provides a new tool for studying complex neural dynamics. The intricate nonlinear dynamics of the MHNN are examined using techniques like Lyapunov exponent analysis and bifurcation diagrams. The viability of the MHNN is confirmed through both analog circuit simulation and FPGA implementation. Moreover, an image encryption approach based on the chaotic system and a dynamic key generation mechanism are presented, highlighting the potential of the MHNN for real-world applications. The histogram shows that the encryption algorithm is effective in destroying the features of the original image. According to the sensitivity analysis, the bit change rate of the key is close to 50% when small perturbations are applied to each of the three parameters of the system, indicating that the system is highly resistant to differential attacks. The findings indicate that the MHNN displays a wide range of dynamical behaviors and high sensitivity to initial conditions, making it well-suited for applications in neuromorphic computing and information security. Full article

The human brain is an extremely sophisticated system. Several neural models have been proposed to mimic and understand brain function. Most of them incorporate memristors to simulate autapse or self-coupling, electromagnetic radiation and the synaptic weight of the neuron. This article introduces and studies the dynamics of a Hopfield neural network (HNN) consisting of four neurons, where one of the synaptic weights of the neuron is replaced by a memristor. Theoretical aspects such as dissipation, the requirements for the existence of attractors, symmetry, equilibrium states and stability are studied. Numerical investigations of the model reveal that it develops very rich and diverse behaviors such as chaos, hyperchaos and transient chaos. These results obtained numerically are further supported by the results obtained from an electronic circuit of the system, constructed and simulated in PSpice. Both approaches show good agreement. In light of the findings from the numerical and experimental studies, it appears that the 4D Hopfield neural network under consideration in this work is more complex than its original version, which did not include a memristor. Full article

Moore’s Law is being challenged, as the use of transistors has limitations in terms of physical materials, energy consumption, performance, and economics. To continue Moore’s Law, people have put forward many ideas, one of which is to find smaller devices to replace CMOS transistors. Memristor-based digital logic circuits open new avenues for exploring advanced computing architectures. In this paper, a biomemristor with the structure of Al/gelatin:Au NPs/Al/gelatin was fabricated using gelatin as the substrate and the host material of the dielectric layer. The device has a large switching current ratio, good stability, and physical transient characteristics. The device can be dissolved by soaking in deionized water for 5 min. In addition, the device successfully realizes the functions of NAND and NOR logic gates. It provides an effective method for research on green electronic devices with logic functions. Full article

In the era of artificial intelligence, the demand for rapid and efficient data processing is growing, and traditional computing architectures are increasingly struggling to meet these needs. Against this backdrop, memristor devices, capable of mimicking the computational functions of brain neural networks, have emerged as key components in neuromorphic systems. Despite this, memristors still face many challenges in biomimetic functionality and circuit integration. In this context, a starch–glycerol-based hydrogel memristor was developed using starch as the dielectric material. The starch–glycerol–water mixture employed in this study has been widely recognized in literature as a physically cross-linked hydrogel system with a three-dimensional network, and both high water content and mechanical flexibility. This memristor demonstrates a high current switching ratio and stable threshold voltage, showing great potential in mimicking the activity of biological neurons. The device possesses the functionality of auditory neurons, not only achieving artificial spiking neuron discharge but also accomplishing the spatiotemporal summation of input information. In addition, we demonstrate the application capabilities of this artificial auditory neuron in gain modulation and in the synchronization detection of sound signals, further highlighting its potential in neuromorphic engineering applications. These results suggest that starch-based hydrogel memristors offer a promising platform for the construction of bio-inspired auditory neuron circuits and flexible neuromorphic systems. Full article

This paper presents the integration of memristors into N-path filter architectures to develop reconfigurable N-path filters with a tuneable bandwidth. Two different memristor-based N-path filter designs are proposed and systematically compared. One of the architectures was experimentally validated by interfacing it with a memristor package in a laboratory environment, demonstrating a tuneable bandwidth ranging from 1.5 kHz to 2 kHz at a centre frequency of 1 MHz, corresponding to a tuneable quality factor (Q factor) of between 500 and 667. Additionally, this design enables centre frequency tuning from 0.9 MHz to 1.2 MHz while maintaining a fixed Q factor of 600. The second architecture was evaluated through simulations in the Cadence Virtuoso environment using a memristor model. The results indicate a tuneable bandwidth from 0.99 MHz to 1.38 MHz at a centre frequency of 1 GHz, corresponding to a tuneable Q factor ranging from 730 to 1010. Furthermore, this design allows the centre frequency to be adjusted within the range of 0.99 GHz to 1.38 GHz while preserving a fixed Q factor of 1000. These findings highlight the potential of memristor-based N-path filters in achieving reconfigurable and high-Q filtering capabilities for RF applications. Full article

Introducing a memristor into chaotic systems facilitates the construction of high-dimensional hyperchaotic systems. The hyperchaotic signals generated by these systems have important applications in the field of information security. A five-dimensional hyperchaotic system is constructed by introducing a memristor. Its hyperchaotic nature is discussed using phase diagrams and Lyapunov exponential diagrams. The effects of the parameters on the dynamical behavior are examined by bifurcation diagrams and Lyapunov exponential diagrams. To validate the theoretical model, an electronic circuit was designed for circuit simulation. The electronic simulation of the circuit was carried out using the Multisim simulation platform. Finally, the fixed-time projection synchronization of the system was taken into consideration. Three sets of synchronization schemes were considered and simulated. The synchronization scheme has the features of fast synchronization speed and robustness. It is potentially valuable for applications in the fields of chaotic communication and chaotic encryption. Full article

An ultralow-power, high-performance online-learning and anomaly-detection system has been developed for edge security applications. Designed to support personalized learning without relying on cloud data processing, the system employs sample-wise learning, eliminating the need for storing entire datasets for training. Built using memristor-based analog neuromorphic and in-memory computing techniques, the system integrates two unsupervised autoencoder neural networks—one utilizing optimized crossbar weights and the other performing real-time learning to detect novel intrusions. Threshold optimization and anomaly detection are achieved through a fully analog Euclidean Distance (ED) computation circuit, eliminating the need for floating-point processing units. The system demonstrates 87% anomaly-detection accuracy; achieves a performance of 16.1 GOPS—774× faster than the ASUS Tinker Board edge processor; and delivers an energy efficiency of 783 GOPS/W, consuming only 20.5 mW during anomaly detection. Full article

The rapid advancement of artificial intelligence (AI) technologies has significantly increased the demand for high-performance computational hardware. Memristor-based compute-in-memory (CIM) technology, also known as resistive random-access memory (RRAM)-based CIM technology, shows great potential for addressing the data transfer bottleneck and supporting high-performance computing (HPC). In this paper, a multi-scale thermal model is developed to evaluate the temperature distribution in RRAM-based CIM chips and the influence of various factors on thermal behavior. The results indicate that hotspot temperatures can be mitigated by reducing the epoxy molding compound (EMC) thickness, increasing the substrate thickness, and lowering boundary thermal resistance. Moreover, optimizing the layout of analog computing circuits and digital circuits can reduce the maximum temperature by up to 4.04 °C. Furthermore, the impact of temperature on the conductance of RRAM devices and the inference accuracy of RRAM-based CIM chips is analyzed. Simulation results reveal that thermal-induced accuracy loss in CIM chips is significant, but the computation correction method effectively reduces the accuracy loss from 66.4% to 1.4% at 85 °C. Full article