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Keywords = fractional-order digital filters

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23 pages, 10230 KiB  
Article
Compact and Hybrid Dual-Band Bandpass Filter Using Folded Multimode Resonators and Second-Mode Suppression
by Nicolas Claus, Kamil Yavuz Kapusuz, Jo Verhaevert and Hendrik Rogier
Electronics 2024, 13(10), 1921; https://doi.org/10.3390/electronics13101921 - 14 May 2024
Cited by 4 | Viewed by 1784
Abstract
The proliferation of the Internet of Things (IoT) propels the continuous demand for compact, low-cost, and high-performance multiband filters. This paper introduces a novel low-profile dual-band bandpass filter (BPF) constructed with a back-to-back coupled pair of shielded folded quarter-mode substrate integrated waveguide (SF-QMSIW) [...] Read more.
The proliferation of the Internet of Things (IoT) propels the continuous demand for compact, low-cost, and high-performance multiband filters. This paper introduces a novel low-profile dual-band bandpass filter (BPF) constructed with a back-to-back coupled pair of shielded folded quarter-mode substrate integrated waveguide (SF-QMSIW) multimode cavities. A hybrid structure is obtained by etching a coplanar waveguide (CPW) coupling line in the folded cavity’s septum layer. It serves multiple functions: generating an additional resonance, providing a separate coupling mechanism for the upper passband, and offering the flexibility to control the passbands’ center frequency ratio. Additionally, the unused second higher-order mode is suppressed by integrating embedded split-ring resonators (ESRRs) with an inter-digital capacitor (IDC) structure into the feed lines. A filter prototype has been fabricated and experimentally tested. The measurements confirmed reliable operation in two passbands having center frequencies 3.6 GHz and 5.8 GHz, and exhibiting 3 dB fractional bandwidths (FBWs) of 6.4% and 5.3%, respectively. Furthermore, the group delay variation within both passbands equals only 0.62 ns and 1.00 ns, respectively. Owing to the second higher-order mode suppression, the filter demonstrated an inter-band rejection exceeding 38 dB, within a compact footprint of 0.71λg2 (with λg being the guided wavelength at the lower passband’s center frequency). Full article
(This article belongs to the Section Microwave and Wireless Communications)
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20 pages, 1627 KiB  
Article
Thiran Filters for Wideband DSP-Based Multi-Beam True Time Delay RF Sensing Applications
by Sirani M. Perera, Gayani Rathnasekara and Arjuna Madanayake
Sensors 2024, 24(2), 576; https://doi.org/10.3390/s24020576 - 17 Jan 2024
Cited by 2 | Viewed by 1767
Abstract
The ability to sense propagating electromagnetic plane waves based on their directions of arrival (DOAs) is fundamental to a range of radio frequency (RF) sensing, communications, and imaging applications. This paper introduces an algorithm for the wideband true time delay digital delay Vandermonde [...] Read more.
The ability to sense propagating electromagnetic plane waves based on their directions of arrival (DOAs) is fundamental to a range of radio frequency (RF) sensing, communications, and imaging applications. This paper introduces an algorithm for the wideband true time delay digital delay Vandermonde matrix (DVM), utilizing Thiran fractional delays that are useful for realizing RF sensors having multiple look DOA support. The digital DVM algorithm leverages sparse matrix factorization to yield multiple simultaneous RF beams for low-complexity sensing applications. Consequently, the proposed algorithm offers a reduction in circuit complexity for multi-beam digital wideband beamforming systems employing Thiran fractional delays. Unlike finite impulse response filter-based approaches which are wideband but of a high filter order, the Thiran filters trade usable bandwidth in favor of low-complexity circuits. The phase and group delay responses of Thiran filters with delays of a fractional sampling period will be demonstrated. Thiran filters show favorable results for sample delay blocks with a temporal oversampling factor of three. Thiran fractional delays of orders three and four are mapped to Xilinx FPGA RF-SoC technologies for evaluation. The preliminary results of the APF-based Thiran fractional delays on FPGA can potentially be used to realize DVM factorizations using application-specific integrated circuit (ASIC) technology. Full article
(This article belongs to the Section Electronic Sensors)
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18 pages, 1694 KiB  
Article
Fractional-Order LCL Filters: Principle, Frequency Characteristics, and Their Analysis
by Junhua Xu, Ermeng Zeng, Xiaocong Li, Guopeng He, Weixun Liu and Xuanren Meng
Fractal Fract. 2024, 8(1), 38; https://doi.org/10.3390/fractalfract8010038 - 5 Jan 2024
Cited by 1 | Viewed by 2160
Abstract
The fractional-order LCL filter, composed of two fractional-order inductors and one fractional-order capacitor, is a novel fractional-order π-type circuit introduced in recent years. Based on mathematical modeling, this article comprehensively studies the principles and frequency characteristics of fractional-order LCL filters. Five critical properties [...] Read more.
The fractional-order LCL filter, composed of two fractional-order inductors and one fractional-order capacitor, is a novel fractional-order π-type circuit introduced in recent years. Based on mathematical modeling, this article comprehensively studies the principles and frequency characteristics of fractional-order LCL filters. Five critical properties are derived and rigorously demonstrated. One of the most significant findings is that we identify the necessary and sufficient condition for resonance in fractional-order LCL filters when the sum of the orders of the fractional-order inductors and the fractional-order capacitor is equal to 2, which provides a theoretical foundation for effectively avoiding resonance in fractional-order LCL filters. The correctness of our theoretical derivation and analysis was confirmed through digital simulations. This study reveals that fractional-order LCL filters exhibit more versatile operational characteristics than traditional integer-order LCL filters, paving the way for broader application prospects. Full article
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20 pages, 56331 KiB  
Article
Virtual Space-Time DiversityTurbo Equalization Using Cluster Sparse Proportional Recursive Least Squares Algorithm for Underwater Acoustic Communications
by Zhen Han, Weiliang Tao, Dan Zhang and Peng Jiang
Appl. Sci. 2023, 13(19), 11050; https://doi.org/10.3390/app131911050 - 7 Oct 2023
Cited by 1 | Viewed by 1604
Abstract
The oceanic positioning, navigation and timing (PNT) network requires high-quality underwater acoustic message transmission. Turbo equalization technology has exhibited superior performance for underwater acoustic (UWA) communications compared with conventional channel equalizers. To overcome the performance reduction caused by severe doubly selective UWA channels, [...] Read more.
The oceanic positioning, navigation and timing (PNT) network requires high-quality underwater acoustic message transmission. Turbo equalization technology has exhibited superior performance for underwater acoustic (UWA) communications compared with conventional channel equalizers. To overcome the performance reduction caused by severe doubly selective UWA channels, the virtual space-time diversity soft direct-adaptation turbo equalization is proposed for UWA communications. The proposed scheme improves the ability of the typical turbo equalizer to deal with both Doppler and multipath effects for time varying channels. We utilize a fractionally spaced soft interference cancellation equalizer (FS-SE) instead of a hard decision to constitute the soft-input soft-output (SISO) equalizer. Combined with another virtual time-reversal mirror equalizer component, we can obtain virtual space and time diversity with only a single receiving transducer and mitigate the error propagation phenomenon of the feedback filter. To satisfy the sparse UWA channel, the p,q-PRLS algorithm is applied to adaptive updates for FS-SE. In the proposed scheme, an adjustable interpolator and digital phase-locked loop are embedded into the equalizer to overcome the residual Doppler frequency shift and recover the timing distortion. Results of simulations and field lake trial show that the proposed scheme achieves better performance than existing ones under the same equalizer order. Full article
(This article belongs to the Section Marine Science and Engineering)
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17 pages, 2524 KiB  
Article
A Novel Fractional Delay Proportional–Integral Multi-Resonant-Type Repetitive Control Based on a Farrow-Structure Filter for Grid-Tied Inverters
by Fen Liang, Ho-Joon Lee and Qiangsong Zhao
Electronics 2023, 12(19), 4010; https://doi.org/10.3390/electronics12194010 - 23 Sep 2023
Cited by 2 | Viewed by 1331
Abstract
The integer-order delay of proportional–integral multi-resonant-type repetitive control (PIMR-RC) cannot provide excellent control performance for grid-tied inverters when the grid frequency fluctuates. To address this issue and reduce control errors, a fractional delay PIMR-RC (FD-PIMR-RC) scheme is proposed. In addition, to reduce the [...] Read more.
The integer-order delay of proportional–integral multi-resonant-type repetitive control (PIMR-RC) cannot provide excellent control performance for grid-tied inverters when the grid frequency fluctuates. To address this issue and reduce control errors, a fractional delay PIMR-RC (FD-PIMR-RC) scheme is proposed. In addition, to reduce the computational load and memory consumption, a Farrow-structure fractional delay (FFD) filter is adopted. The digital filter with the Farrow structure is flexibly and efficiently used for fractional delay. For each new fractional delay, a large number of calculations and storage for the FFD filter coefficients are avoided, which significantly reduces the computational load and memory consumption. The parameter design of the FD-PIMR-RC scheme is provided in detail, including the implementation of fractional delay based on the Farrow structure. Then, a system stability analysis and parameter optimization are presented. Finally, simulations for the steady-state and dynamic responses are presented, and the validity of the proposed method is demonstrated. Full article
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11 pages, 6543 KiB  
Article
Design of a Common-Mode Rejection Filter Using Dumbbell-Shaped Defected Ground Structures Based on Equivalent Circuit Models
by Jeong-Sik Choi, Byung-Cheol Min, Mun-Ju Kim, Sachin Kumar, Hyun-Chul Choi and Kang-Wook Kim
Electronics 2023, 12(15), 3230; https://doi.org/10.3390/electronics12153230 - 26 Jul 2023
Cited by 2 | Viewed by 1958
Abstract
An efficient design method is proposed for a compact common-mode rejection (CMR) filter utilizing dumbbell-shaped defected ground (DS-DG) structures and gap-coupled stub (GCS) resonators. A CMR filter for differential lines helps to improve the signal integrity of high-speed digital signals on printed circuit [...] Read more.
An efficient design method is proposed for a compact common-mode rejection (CMR) filter utilizing dumbbell-shaped defected ground (DS-DG) structures and gap-coupled stub (GCS) resonators. A CMR filter for differential lines helps to improve the signal integrity of high-speed digital signals on printed circuit boards. The proposed CMR filter design is based on the equivalent circuit models, while the previous designs depended heavily on the DS-DG structure optimization using the EM simulations. The proposed CMR filter effectively rejects the common-mode components while minimally affecting the differential signals. To prove the simplified design approach, a fifth-order Chebyshev band-stop filter is designed with three DS-DG structures and two GCS resonators. From the simulated and measured results, it is found that the proposed CMR filter provides ~90% fractional frequency bandwidth with more than 20 dB of common-mode rejection ratio and less than 0.6 dB of insertion loss of the differential signal. Full article
(This article belongs to the Section Microwave and Wireless Communications)
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12 pages, 4081 KiB  
Communication
A Fractional-Order Multi-Rate Repetitive Controller for Single-Phase Grid-Connected Inverters
by Qiangsong Zhao, Kaiyue Liu and Hengyi Li
Electronics 2023, 12(4), 1021; https://doi.org/10.3390/electronics12041021 - 18 Feb 2023
Cited by 5 | Viewed by 1546
Abstract
The multi-rate repetitive controller (MRC) can achieve zero steady-state error in tracking the reference current signal of grid-connected inverters, save the settling time effectively, and improve the running speed. However, when the grid frequency fluctuates, the harmonic suppression performance of MRC will degrade. [...] Read more.
The multi-rate repetitive controller (MRC) can achieve zero steady-state error in tracking the reference current signal of grid-connected inverters, save the settling time effectively, and improve the running speed. However, when the grid frequency fluctuates, the harmonic suppression performance of MRC will degrade. Aiming at the problem of harmonic suppression performance degradation, a fractional-order MRC (FOMRC) based on the farrow structure fractional delay (FD) filter is proposed. Firstly, the equivalent digital model of MRC is established, and a Farrow structure fractional delay (FD) filter based on Taylor series expansion is selected as the internal model filter of MRC. The stability analysis and harmonic suppression characteristics of the FOMRC are analyzed. Then, the parameter design of FOMRC applied to an LCL single-phase grid-connected inverter control system is given. Finally, the simulation results show that the proposed method has better transient and steady-state performance than the CRC when the grid frequency fluctuates. Full article
(This article belongs to the Special Issue Advanced Control Techniques of Power Electronics)
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15 pages, 1143 KiB  
Article
Error Detection and Correction of Mismatch Errors in M-Channel TIADCs Based on Genetic Algorithm Optimization
by Yuehui Li, Cong Liu, Guangshan Niu, Xiangdong Luo, Haocheng Ma and Yiqiang Zhao
Electronics 2022, 11(15), 2366; https://doi.org/10.3390/electronics11152366 - 28 Jul 2022
Cited by 1 | Viewed by 1693
Abstract
In order to achieve higher system performance, a digital calibration technique for the sub-channel mismatches of time-interleaved ADCs (TIADCs) is proposed in this paper. The sine-fit-based estimation algorithm is introduced to estimate the channel mismatches and a calibration algorithm is proposed to compensate [...] Read more.
In order to achieve higher system performance, a digital calibration technique for the sub-channel mismatches of time-interleaved ADCs (TIADCs) is proposed in this paper. The sine-fit-based estimation algorithm is introduced to estimate the channel mismatches and a calibration algorithm is proposed to compensate for the mismatches. Subsequently, the genetic algorithm (GA) is firstly utilized to detect the mismatch errors of the outputs of sub-channels after frequency domain filtering. The detected offset error and gain error are then corrected by performing the calibration algorithm, and the time errors are corrected by fractional delay filters based on Farrow structure. The spurious-free dynamic range (SFDR) is enhanced from 19.69 dB to 108.12 dB, and the signal to noise and distortion ratio (SNDR) is enhanced from 16.02 dB to 97.63 dB. The proposed technique is further validated on the FPGA. Compared with existing calibration techniques, the proposed technique has the advantages of simple algorithm structure, low hardware resource consumption, and high calibration accuracy and can be applied to the calibration of high-resolution (18-bit) TIADCs for low-frequency inputs. Full article
(This article belongs to the Section Circuit and Signal Processing)
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16 pages, 2568 KiB  
Article
Fractional Order KDHD Impedance Control of the Stewart Platform
by Luca Bruzzone and Alessio Polloni
Machines 2022, 10(8), 604; https://doi.org/10.3390/machines10080604 - 24 Jul 2022
Cited by 9 | Viewed by 2465
Abstract
In classical impedance control, KD, the steady-state end-effector forces are imposed to be proportional to the end-effector position errors through the stiffness matrix, K, and a proper damping term is added, proportional to the first-order derivatives of the end-effector position errors according to [...] Read more.
In classical impedance control, KD, the steady-state end-effector forces are imposed to be proportional to the end-effector position errors through the stiffness matrix, K, and a proper damping term is added, proportional to the first-order derivatives of the end-effector position errors according to the damping matrix, D. This paper presents a fractional-order impedance control scheme, named KDHD, in which an additional damping is added, proportional to the half-order derivatives of the end-effector position errors according to the half-derivative damping matrix, HD. Since the finite-order digital filters which implement in real-time the half-order derivatives modify the steady-state stiffness of the end-effector—which should be defined exclusively by the stiffness matrix—a compensation method is proposed (KDHDc). The effectiveness of this approach is validated by multibody simulation on a Stewart platform. The proposed impedance controller represents the extension to multi-input multi-output robotic systems of the PDD1/2 controller for single-input single-output systems, which overperforms the PD scheme in the transient behavior. Full article
(This article belongs to the Special Issue New Frontiers in Parallel Robots)
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27 pages, 10273 KiB  
Article
Digital Twin Geometry for Fibrous Air Filtration Media
by Ivan P. Beckman, Gentry Berry, Heejin Cho and Guillermo Riveros
Fibers 2021, 9(12), 84; https://doi.org/10.3390/fib9120084 - 16 Dec 2021
Cited by 13 | Viewed by 4230
Abstract
Computational modeling of air filtration is possible by replicating nonwoven nanofibrous meltblown or electrospun filter media with digital representative geometry. This article presents a methodology to create and modify randomly generated fiber geometry intended as a digital twin replica of fibrous filtration media. [...] Read more.
Computational modeling of air filtration is possible by replicating nonwoven nanofibrous meltblown or electrospun filter media with digital representative geometry. This article presents a methodology to create and modify randomly generated fiber geometry intended as a digital twin replica of fibrous filtration media. Digital twin replicas of meltblown and electrospun filter media are created using Python scripting and Ansys SpaceClaim. The effect of fiber stiffness, represented by a fiber relaxation slope, is analyzed in relation to resulting filter solid volume fraction and thickness. Contemporary air filtration media may also be effectively modeled analytically and tested experimentally in order to yield valuable information on critical characteristics, such as overall resistance to airflow and particle capture efficiency. An application of the Single Fiber Efficiency model is incorporated in this work to illustrate the estimation of performance for the generated media with an analytical model. The resulting digital twin fibrous geometry compares well with SEM imagery of fibrous filter materials. This article concludes by suggesting adaptation of the methodology to replicate digital twins of other nonwoven fiber mesh applications for computational modeling, such as fiber reinforced additive manufacturing and composite materials. Full article
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26 pages, 403 KiB  
Review
A Review of Recent Advances in Fractional-Order Sensing and Filtering Techniques
by Cristina I. Muresan, Isabela R. Birs, Eva H. Dulf, Dana Copot and Liviu Miclea
Sensors 2021, 21(17), 5920; https://doi.org/10.3390/s21175920 - 2 Sep 2021
Cited by 60 | Viewed by 5621
Abstract
The present manuscript aims at raising awareness of the endless possibilities of fractional calculus applied not only to system identification and control engineering, but also into sensing and filtering domains. The creation of the fractance device has enabled the physical realization of a [...] Read more.
The present manuscript aims at raising awareness of the endless possibilities of fractional calculus applied not only to system identification and control engineering, but also into sensing and filtering domains. The creation of the fractance device has enabled the physical realization of a new array of sensors capable of gathering more information. The same fractional-order electronic component has led to the possibility of exploring analog filtering techniques from a practical perspective, enlarging the horizon to a wider frequency range, with increased robustness to component variation, stability and noise reduction. Furthermore, fractional-order digital filters have developed to provide an alternative solution to higher-order integer-order filters, with increased design flexibility and better performance. The present study is a comprehensive review of the latest advances in fractional-order sensors and filters, with a focus on design methodologies and their real-life applicability reported in the last decade. The potential enhancements brought by the use of fractional calculus have been exploited as well in sensing and filtering techniques. Several extensions of the classical sensing and filtering methods have been proposed to date. The basics of fractional-order filters are reviewed, with a focus on the popular fractional-order Kalman filter, as well as those related to sensing. A detailed presentation of fractional-order filters is included in applications such as data transmission and networking, electrical and chemical engineering, biomedicine and various industrial fields. Full article
(This article belongs to the Special Issue Fractional Sensor Fusion and Its Applications)
27 pages, 379 KiB  
Article
The VIT Transform Approach to Discrete-Time Signals and Linear Time-Varying Systems
by Edward W. Kamen
Eng 2021, 2(1), 99-125; https://doi.org/10.3390/eng2010008 - 10 Mar 2021
Viewed by 3131
Abstract
A transform approach based on a variable initial time (VIT) formulation is developed for discrete-time signals and linear time-varying discrete-time systems or digital filters. The VIT transform is a formal power series in z1, which converts functions given by linear [...] Read more.
A transform approach based on a variable initial time (VIT) formulation is developed for discrete-time signals and linear time-varying discrete-time systems or digital filters. The VIT transform is a formal power series in z1, which converts functions given by linear time-varying difference equations into left polynomial fractions with variable coefficients, and with initial conditions incorporated into the framework. It is shown that the transform satisfies a number of properties that are analogous to those of the ordinary z-transform, and that it is possible to do scaling of zi by time functions, which results in left-fraction forms for the transform of a large class of functions including sinusoids with general time-varying amplitudes and frequencies. Using the extended right Euclidean algorithm in a skew polynomial ring with time-varying coefficients, it is shown that a sum of left polynomial fractions can be written as a single fraction, which results in linear time-varying recursions for the inverse transform of the combined fraction. The extraction of a first-order term from a given polynomial fraction is carried out in terms of the evaluation of zi at time functions. In the application to linear time-varying systems, it is proved that the VIT transform of the system output is equal to the product of the VIT transform of the input and the VIT transform of the unit-pulse response function. For systems given by a time-varying moving average or an autoregressive model, the transform framework is used to determine the steady-state output response resulting from various signal inputs such as the step and cosine functions. Full article
23 pages, 1979 KiB  
Article
Testing Stability of Digital Filters Using Optimization Methods with Phase Analysis
by Damian Trofimowicz and Tomasz P. Stefański
Energies 2021, 14(5), 1488; https://doi.org/10.3390/en14051488 - 9 Mar 2021
Cited by 7 | Viewed by 2344
Abstract
In this paper, novel methods for the evaluation of digital-filter stability are investigated. The methods are based on phase analysis of a complex function in the characteristic equation of a digital filter. It allows for evaluating stability when a characteristic equation is not [...] Read more.
In this paper, novel methods for the evaluation of digital-filter stability are investigated. The methods are based on phase analysis of a complex function in the characteristic equation of a digital filter. It allows for evaluating stability when a characteristic equation is not based on a polynomial. The operation of these methods relies on sampling the unit circle on the complex plane and extracting the phase quadrant of a function value for each sample. By calculating function-phase quadrants, regions in the immediate vicinity of unstable roots (i.e., zeros), called candidate regions, are determined. In these regions, both real and imaginary parts of complex-function values change signs. Then, the candidate regions are explored. When the sizes of the candidate regions are reduced below an assumed accuracy, then filter instability is verified with the use of discrete Cauchy’s argument principle. Three different algorithms of the unit-circle sampling are benchmarked, i.e., global complex roots and poles finding (GRPF) algorithm, multimodal genetic algorithm with phase analysis (MGA-WPA), and multimodal particle swarm optimization with phase analysis (MPSO-WPA). The algorithms are compared in four benchmarks for integer- and fractional-order digital filters and systems. Each algorithm demonstrates slightly different properties. GRPF is very fast and efficient; however, it requires an initial number of nodes large enough to detect all the roots. MPSO-WPA prevents missing roots due to the usage of stochastic space exploration by subsequent swarms. MGA-WPA converges very effectively by generating a small number of individuals and by limiting the final population size. The conducted research leads to the conclusion that stochastic methods such as MGA-WPA and MPSO-WPA are more likely to detect system instability, especially when they are run multiple times. If the computing time is not vitally important for a user, MPSO-WPA is the right choice, because it significantly prevents missing roots. Full article
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30 pages, 14008 KiB  
Article
Design and Implementation of a Farrow-Interpolator-Based Digital Front-End in LTE Receivers for Carrier Aggregation
by Chester Sungchung Park, Sunwoo Kim, Jooho Wang and Sungkyung Park
Electronics 2021, 10(3), 231; https://doi.org/10.3390/electronics10030231 - 20 Jan 2021
Cited by 3 | Viewed by 3928
Abstract
A digital front-end decimation chain based on both Farrow interpolator for fractional sample-rate conversion and a digital mixer is proposed in order to comply with the long-term evolution standards in radio receivers with ten frequency modes. Design requirement specifications with adjacent channel selectivity, [...] Read more.
A digital front-end decimation chain based on both Farrow interpolator for fractional sample-rate conversion and a digital mixer is proposed in order to comply with the long-term evolution standards in radio receivers with ten frequency modes. Design requirement specifications with adjacent channel selectivity, inband blockers, and narrowband blockers are all satisfied so that the proposed digital front-end is 3GPP-compliant. Furthermore, the proposed digital front-end addresses carrier aggregation in the standards via appropriate frequency translations. The digital front-end has a cascaded integrator comb filter prior to Farrow interpolator and also has a per-carrier carrier aggregation filter and channel selection filter following the digital mixer. A Farrow interpolator with an integrate-and-dump circuitry controlled by a condition signal is proposed and also a digital mixer with periodic reset to prevent phase error accumulation is proposed. From the standpoint of design methodology, three models are all developed for the overall digital front-end, namely, functional models, cycle-accurate models, and bit-accurate models. Performance is verified by means of the cycle-accurate model and subsequently, by means of a special C++ class, the bitwidths are minimized in a methodic manner for area minimization. For system-level performance verification, the orthogonal frequency division multiplexing receiver is also modeled. The critical path delay of each building block is analyzed and the spectral-domain view is obtained for each building block of the digital front-end circuitry. The proposed digital front-end circuitry is simulated, designed, and both synthesized in a 180 nm CMOS application-specific integrated circuit technology and implemented in the Xilinx XC6VLX550T field-programmable gate array (Xilinx, San Jose, CA, USA). Full article
(This article belongs to the Section Circuit and Signal Processing)
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