A Novel Fractional Delay Proportional–Integral Multi-Resonant-Type Repetitive Control Based on a Farrow-Structure Filter for Grid-Tied Inverters

: The integer-order delay of proportional–integral multi-resonant-type repetitive control (PIMR-RC) cannot provide excellent control performance for grid-tied inverters when the grid frequency ﬂuctuates. To address this issue and reduce control errors, a fractional delay PIMR-RC (FD-PIMR-RC) scheme is proposed. In addition, to reduce the computational load and memory consumption, a Farrow-structure fractional delay (FFD) ﬁlter is adopted. The digital ﬁlter with the Farrow structure is ﬂexibly and efﬁciently used for fractional delay. For each new fractional delay, a large number of calculations and storage for the FFD ﬁlter coefﬁcients are avoided, which signiﬁcantly reduces the computational load and memory consumption. The parameter design of the FD-PIMR-RC scheme is provided in detail, including the implementation of fractional delay based on the Farrow structure. Then, a system stability analysis and parameter optimization are presented. Finally, simulations for the steady-state and dynamic responses are presented, and the validity of the proposed method is demonstrated.


Introduction
As a result of the energy crisis and environmental pollution, distributed power generation systems (DPGS) based on renewable energy have attracted more and more attention in recent decades [1].A grid-tied inverter with nonlinear factors such as dead time, as an important interface between the distributed generation system and the grid, will generate a large number of harmonics, which may cause additional power losses or even result in system instability [2].The total harmonic distortion (THD) of a grid-tied current should be less than 5% according to the IEEE standard.Thus, to suppress harmonics and smooth the grid-tied current, many control schemes have been proposed for grid-tied inverters, such as proportional-integral (PI) control [3], proportional-resonant (PR) control [4], model predictive control (MPC) [5], repetitive control (RC) [6], and so on.
PI control theory is mature and its design is simple.Nevertheless, PI control cannot achieve static zero steady-state error control performance for single-phase or three-phase asymmetric grid-tied inverters due to its limited control-loop gain.To address this problem, some scholars have proposed an ideal PR control [7], which provides an infinite gain and can track references at the selected resonant frequency while maintaining zero steady-state errors.However, the frequency bandwidth of the PR controller is too narrow, which may result in the poor robustness of a system.Subsequently, quasi-proportional-resonant (QPR) controllers have been introduced to increase the bandwidth at the resonant frequency, but the QPR controller can only achieve zero steady-state errors for a single-frequency signal.
Several controllers need to operate in parallel to form a proportional multi-resonant (PMR) controller [8], but this results in an increased computational load, a significant reduction in the phase margin, and even system instability.
RC, which is based on the internal model principle, has been widely used in active power filters (APF) [9], grid-tied inverters [10], etc., due to its outstanding performance in static zero-error tracking control and disturbance elimination for the periodic signals (e.g., sine wave signal or harmonics).It not only has high steady-state accuracy and can achieve zero-error tracking but also exhibits excellent performance in suppressing harmonics whose frequencies are integer multiples of the fundamental frequency [11].However, the ideal RC has a slow dynamic response due to the delay of one fundamental period.To achieve better control performance, it is necessary to combine other feedback controllers such as PI to improve the dynamic response.There are two common structural forms: RC and PI in series or in parallel.For instance, a PIMR-RC adopting an improved RC and a proportional gain in parallel was proposed in [12].These improved schemes exhibit an excellent dynamic response and performance in suppressing harmonics by accommodating a large gain at resonant frequencies.
The conventional RC (CRC) can be expressed by z −N /(1 − z −N ), where N = f s / f 0 , N is the number of samples in one period of the repetitive signal, f s is the sampling frequency, and f 0 is the grid fundamental frequency.Theoretically, when the sampling frequency is fixed, the delay unit N is an integer.Nevertheless, the grid fundamental frequency in DPGS may vary within a certain range [13].For instance, f s = 10 kHz, f 0 = 50 Hz, and the delay unit N is 200; however, when f 0 = 49.6 Hz, N is 201.6.Hence, N may not be an integer when the grid frequency fluctuates.The CRC can only be implemented digitally when N is an integer.Thus, if the value of the fraction N is rounded to the nearest integer, it may result in approximation errors, as well as worse harmonic suppression performance and a higher THD.Given the above issues, adopting fractional delay RC becomes necessary to reduce approximation errors and ensure effective control.Therefore, scholars have proposed frequency adaptive RC schemes for grid-tied inverters [14,15].In these schemes, a fractional-order RC (FORC) based on a fractional delay (FD) filter is adopted, and the FD filter is used to approximate the fractional part of N. By adjusting the coefficients of the digital filter in real time, the resonant frequency of the FORC is almost equal to the actual values of the grid fundamental and harmonic frequencies, thus achieving current harmonic suppression.Therefore, FORC can achieve good performance in suppressing harmonics while the grid frequency fluctuates.
Generally, there are two kinds of FD filters adopted in FORC: the finite impulse response (FIR) filter [16,17] and the infinite impulse response (IIR) filter [18].However, both of these filters require recalculating the sub-filter coefficients during coefficient updates, which consumes a significant amount of computational resources.The Farrow-structure filter, based on Taylor series expansion, is more flexible and efficient due to its time-varying nature [19,20].The Farrow-structure filter can cope with time-varying fractional delays.For each new delay, the polynomial coefficients of the filter remain unchanged, which greatly decreases the computational load of the controller.Moreover, the Farrow-structure filter is easier to implement in hardware and reduces hardware complexity [21,22].Another benefit of the Farrow-structure filter is that the fractional delay item d is independent of the specific filter coefficients [23].Thus, when the delay changes, there is no need to reload the filter coefficients, which avoids storing a large number of filter coefficients, thereby greatly reducing the memory.Furthermore, according to [24], the error of the Farrow-structure design is smaller than that of the conventional Lagrange-based design with the same filter order.To date, the Farrow-structure filter has been adopted in many applications [25,26].A comparison of the FIR filter, conventional IIR filter, and Farrow-structure filter is provided in Table 1.In addition, there is no fractional-order PIMR-RC based on a Farrow-structure filter in the published literature, so the idea of adopting an FFD filter in PIMR-RC is novel.
In summary, to further improve harmonic suppression performance and control accuracy when the grid frequency fluctuates, based on PIMR-RC and an FFD filter, an FD-PIMR-RC scheme is proposed in this paper.Item z −N with a fractional N can be approximated using an FFD filter, where each sub-filter of the FFD filter is designed offline in advance, which simplifies the calculations.The proposed FD-PIMR-RC scheme not only decreases the computational load and memory consumption but also exhibits excellent harmonic suppression performance and smaller tracking errors when the grid frequency fluctuates.The contributions of this paper are as follows: (1) To reduce the computational load and memory consumption of the grid-tied inverter, an FFD filter is adopted to achieve fractional delay for the PIMR-RC system.(2) Based on the FFD filter, an FD-PIMR-RC scheme is proposed to effectively improve the quality of the grid current against frequency variations.(3) From both the steady-state and dynamic response aspects of the system, a synthesis analysis is carried out on the comparison of the control effects between the conventional integer-order PRMR-RC and the proposed FD-PIMR-RC scheme when the grid frequency fluctuates.

Model of the LCL-Type Grid-Tied Inverter
Figure 1 shows the model of the single-phase LCL-type grid-tied inverter, including the single-phase inverter bridge, LCL filter, and controller [27].E dc is the bus voltage; u inv is the grid-tied inverter output voltage; and L 1 , L 2 , and C are nominal values of the LCL filter, respectively.I re f is the tracked reference current amplitude; i g is the grid current; u g is the grid voltage; i c is the capacitance current; and ZOH is the zero-order holder.The phase-locked loop (PLL) is adopted to provide the phase angle θ of the point common coupling (PCC) voltage u PCC .Moreover, the reference current i re f is produced by combining the phase θ with I re f ; k ic is the capacitance current feedback coefficient, which is used to suppress the LCL filter resonance peak; and G i (z) is the FD-PIMR-RC current controller.
In practice, high-frequency SPWM modulation technology is mainly adopted in gridtied inverters, with a switching frequency of more than 10 kHz.Thus, the inverter unit can be regarded as a link with a gain of k PW M , which can be equivalent to 1 [28].To suppress the LCL resonance peak, capacitive current feedback active damping is adopted in this system.Then, the open-loop transfer function from the inverter output voltage u inv (s) to the grid current i g (s) can be expressed as: where P(s) is the controlled object transfer function in the s-domain.Accordingly, a block diagram of an LCL-type grid-tied inverter control with capacitive current feedback active damping is shown in Figure 2.
Block diagram of an inverter control with active damping.
According to the LCL filter parameters in Table 2, by selecting k ic = 18 (in Section 5), P(s) with active damping can be derived as The discrete transfer function P(z) with f s = 10 kHz is given by Figure 3 shows the frequency characteristics of P(s) with active damping and P LCL (s) without damping (k ic = 0), respectively.As shown in Figure 3, f r is the resonance frequency.Due to a lack of damping, the magnitude characteristics of P LCL (s) exhibit a resonance spike at the resonance frequency (1348 Hz).The phase characteristics of P LCL (s) exhibit a −180°jump, which can lead to system instability.Thus, it is necessary to adopt a damping method to suppress the resonance peak and stabilize the system.In this paper, the method of capacitive current feedback active damping is adopted because of its simplicity and losslessness [29].

PIMR-RC
The transfer function of CRC in the s-domain can be described as: where k r is the RC gain and T 0 is the fundamental period of the reference signal.Based on the Taylor series expansion, Expression (4) can be derived as By adding a positive gain, proportional link k p , on both sides of Equation ( 5), k p > k r 2 , a composite controller G i (s) composed of RC+PI can be obtained: Thus, G i (s) contains a proportional term (k p − k r /2), an integral term k r /T 0 s, and a multi-resonant term, indicating that the composite controller G i (s) is a PIMR controller [27,30].ω 0 is the resonance frequency.
As a digital control system, the repetitive controller needs to be discretized.The discretized RC transfer function in the z-domain is where Q(z) is usually a low-pass filter [31], which is employed to improve system stability; z −N is the period delay; S(z) is a compensator, which is adopted to further attenuate high frequencies; and z m is a phase-lead compensator.
A block diagram of a PIMR-RC current controller, which comprises RC and P components in parallel, after discretization is shown in Figure 4. k p is the proportional gain and E(z) is the tracking error of the system.The PIMR-RC controller, based on CRC, is also sensitive to grid frequency fluctuations.In addition, N may not be an integer, which can reduce tracking accuracy and stability.Here, to address this issue, an FD-PIMR-RC scheme based on an FFD filter is proposed to improve robustness against varying grid frequencies.

Design of FD-PIMR-RC 4.1. Realization of FFD Filter
When the grid frequency fluctuates, N is a fraction, and it can be separated into an integer N i and a fraction d, as follows: A block diagram of FD-PIMR-RC based on an FFD filter is shown in Figure 5.The transfer function of a Wth-order FFD filter in the z-domain can be described as where W is the order of the filter and L k (z) is the k-th sub-filter (k = 0, 1, 2, . . ., W). L k (z) can be calculated as follows: where z sub is the delay operator matrix where U is a Wth-order Vandermonde matrix (S = W).For instance, the second-order FFD filter is derived as follows: When W = 3, z −198.4 can be expressed as z −198 z −0.4 , according to Equations ( 9)-( 12) Hence, Figure 6 shows the frequency characteristics of z −0.4 based on an FFD filter with different W-th order.The bandwidths of the first-and second-order FFD filters are 51% and 66% of the Nyquist frequency, respectively, which is almost the same as the FIR filter.Additionally, the FFD filter has a wider bandwidth and better phase response linearity when W = 3.Therefore, using a third-order FFD filter can effectively approximate fractional delay.

Stability of FD-PIMR-RC
According to Figure 4, the error transfer function E(z) can be derived as The characteristic polynomial of E(z) is: where P 0 (z) is a new equivalent controlled object of RC, and its expression is: There are two stability conditions for the system [12]: 1 The roots of the polynomial 1 + k p P(z) = 0 are all inside a unit circle. 2 |1 + G rc (z)P 0 (z)| = 0.By selecting an appropriate proportional gain k p , condition 1 can be met.Subsequently, by substituting (7) into condition 2 , condition 2 can be written as Substitute (8) into ( 20) When both the frequency of the reference signal and disturbance signal are equal to the fundamental frequency or its integer multiples within the bandwidth range of the fractional delay filter, z Expression (22) indicates that to maintain the stability of the PIMR-RC system while ω varies from zero to the Nyquist frequency, the vector (1 − z m k r S(z)P 0 (z)) should fall within the unit circle.Accordingly, the system stability condition is independent of the FFD filters.Thus, according to the literature [12], Equation (22) can be derived as where N s (ω) and θ s (ω) are the magnitude characteristics and the phase characteristics of S(z), respectively.N P 0 (ω) and θ P 0 (ω) are the magnitude characteristics and the phase characteristics of P 0 (z), respectively.

Parameter Design of FD-PIMR-RC
According to Figure 5, there are five parameters to be designed for the proposed FD-PIMR-RC.They are the proportional gain k p , internal mode filter Q(z), phase-lead compensator z m , RC controller gain k r , and compensator S(z).The design processes of these parameters are described below.

Proportional Gain k p
It is necessary to select the appropriate k p to meet condition 1 , which is equivalent to having all the poles of P 0 (z) inside a unit circle.According to [12], when k p varies from 10 to 25, the poles of P 0 (z) are within a unit circle.As shown in Figure 7a, the pole plots of P 0 (z) with the proportional gain k p are 10, 13, 16, 19, respectively.Then, by selecting an appropriate capacitance current feedback coefficient k ic , condition 1 is satisfied.Figure 7b shows the pole map of P 0 (z) when k p = 15 and k ic = 18.The poles of P 0 (z) are all inside the unit circle on the z-plane.

Design the Compensator S(z)
The compensator can use a fourth-order Butterworth low-pass filter with a cut-off frequency of 850 Hz.The discrete expression of S(z) is as follows:

Design the Phase-Lead Compensator z m and RC Gain k r
The bode diagram of P 0 (z)S(z)z m is illustrated in Figure 8 with four typical values of m (m = 7, 8, 9, 10, respectively).It is clear that within the 1 kHz frequency range, the compensated phase-frequency curve is closest to the 0 dB line when m is equal to 9. Therefore, m = 9 can be selected as the lead beat.It is necessary to find a balance between harmonic suppression capability and stability margins when selecting an appropriate value for k r .According to Expression (24), the maximum k r can be selected as Define the error convergence function for the system by H(e jωT s ) = 1 − k r e jωmT s S(e jωT s )P 0 (e jωT s ) (27) According to the system stability Formula (22), the Nyquist graph of the H(e jωT s ) should be within the unit circle to ensure system stability.Figure 9 shows the trajectories H(e jωT s ), with k r varying from 14 to 18.It can be seen that when k r = 18, m = 9, and the curve is closest to the center of the unit circle.

Internal Mode Filter Q(z)
The internal mode Q(z) is an important component for keeping the system stable.Q(z) can be selected as a constant less than 1 (such as 0.95, 0.98, etc.).However, to further improve system control performance and increase harmonic suppression capability, a zerophase low-pass filter is usually employed.The expression for the zero-phase low-pass filter can be selected as Q(z) = 0.25z −1 + 0.5 + 0.25z (28)

Harmonic Suppression Analysis
When the sampling frequency is 10 kHz and the grid frequency varies from 49.5 Hz to 50.5 Hz, the delay N correspondingly fluctuates from 202 to 198.Furthermore, N may be a fraction; using an integer to approximate the fraction N will result in control errors.Consequently, the proposed FD-PIMR-RC based on an FFD filter is adopted to reduce control errors against grid frequency variations.
The frequency characteristics of the PIMR-RC (N = 200) and the FD-PIMR-RC (N = 198.4and N = 201.6)are shown in Figure 10.The PIMR-RC exhibits excellent harmonic suppression performance at 50 Hz, 100 Hz, . . ., etc.However, when the grid frequency varies within a certain range, the harmonic suppression performance deteriorates due to this deviation.i.e., a large tracking error and high THD of the grid current are produced.When the grid fundamental frequency fluctuates (50 ± 0.4 Hz) at the 7th harmonic frequency (347.2Hz or 352.8 Hz) as an example, the open-loop gain of PIMR-RC decreases from 38 dB to 9 dB, as shown in Figure 11.Conversely, the open-loop gain of FD-PIMR-RC can maintain 38 dB at the same resonant frequency.Therefore, the newly proposed control scheme exhibits excellent harmonic suppression performance when the grid frequency fluctuates.

Simulation Analysis
As illustrated in Figures 4 and 5, a model of the 2.2 kW single-phase grid-tied inverter system adopting the PIMR-RC and FD-PIMR-RC schemes was built by MATLAB/Simulink.The rated value of the reference current was 10 A, and the other parameters were set based on the above analysis and the calculation parameter values presented in this paper.

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Grid frequency: the grid fundamental frequency (50 Hz) When the grid frequency was the grid fundamental frequency, f g = 50 Hz and N = 200.The grid voltage u g and grid current i g waveforms are shown in Figures 12 and 13.The THDs of PIMR-RC and FD-PIMR-RC were 0.5% and 0.74%, respectively.Both schemes demonstrated excellent performance in suppressing harmonics at the grid fundamental frequency.
ug(100V/div) ig( 6 When the grid frequency fluctuates, the grid fundamental frequency is not 50 Hz but 50 ± 0.4 Hz.The conventional integer order delayed PIMR-RC system still takes the N as an integer 200, the control errors will be produced.As shown in Figure 14, if the conventional PIMR-RC scheme is adopted, when the grid frequency fluctuates from 50 Hz to 49.6 Hz, the THD of the i g increases from 0.5% to 2.37%.However, the proposed FD-PIMR-RC can effectively cope with frequency fluctuations.Figure 15 shows that when the grid frequency fluctuates from 50 Hz to 49.6 Hz, N is 201.6, compared with the conventional PIMR-RC scheme, the THD of i g decreases from 2.37% to 1.38% by the proposed FD-PIMR-RC.Similarly, Figure 16 shows that when the grid frequency fluctuates from 50 Hz to 50.4 Hz, the THD of i g increases from 0.5% to 3.43% by the conventional PIMR-RC system.However, while the proposed FD-PIMR-RC is adopted in Figure 17, N is 198.4,and the THD of i g decreases from 3.43% to 1.3%.Therefore, the simulation results of the steady-state response illustrate that compared to the conventional PIMR-RC scheme, the proposed FD-PIMR-RC system is more robust to grid frequency fluctuations.In addition, to further verify the harmonic suppression performance when the grid frequency fluctuates ( f g = 50 ± 0.4 Hz), the PIMR-RC, PIMR-RC+FIR, and proposed FD-PIMR-RC schemes were adopted.The THD values of output current i g are shown in Figure 18.Due to the absence of fractional delay, the greater the grid frequency fluctuation, the more severe the current distortion of PIMR-RC.The PIMR-RC+FIR scheme, based on a third-order FIR to achieve fractional delay, exhibited excellent harmonic suppression performance when the grid frequency fluctuated.However, for each new fractional delay, the FIR filter coefficients needed to be recalculated, which increased the computation load of the system.
The proposed FD-PIMR-RC scheme is based on an FFD filter to achieve fractional delay.Because the fractional delay item d is independent of the coefficients of the FFD filter, when the fractional delay item d changes, the coefficients of the FFD filter remain unchanged.That is, for each new fractional delay, a large number of calculations and storage for the FFD filter coefficients are avoided, which effectively reduces the computational load and memory consumption.Clearly, the proposed FD-PIMR-RC scheme not only retains the excellent harmonic suppression performance of the PIMR-RC+FIR but also avoids recalculating the filter coefficients for each new fractional delay.Therefore, the proposed FD-PIMR-RC scheme is more efficient and flexible.

Conclusions
In this paper, a frequency-adaptive FD-PIMR-RC scheme is proposed for grid-tied inverters to resist grid frequency variations.The proposed scheme, based on an FFD filter, can flexibly and efficiently achieve fractional delay with reduced computational load and memory consumption.Furthermore, the parameter design and stability analysis of the FD-PIMR-RC system are presented.Then, the new controller based on the FFD filter is established, and the steady-state and dynamic responses of the conventional PIMR-RC and FD-PIMR-RC systems are compared and analyzed.The simulation results show that the proposed FD-PIMR-RC scheme is robust to grid frequency fluctuations, fast error convergence rates, and small tracking errors, thereby improving the quality of the grid current.
However, there are still some limitations of the proposed scheme that need to be studied in future works.Firstly, the research object is the ideal grid-tied inverter model, without considering the 1.5-period digital delay that exists in the practical grid-tied inverter.The impact of grid voltage and grid impedance fluctuations is also ignored.Secondly, the detailed mathematical analysis and simulation verification of the specific computational load and memory consumption required for the controller are not provided in this paper.Moreover, other methods used to reduce a system's computational load, such as multibandwidth RC, multi-rate RC, etc., need to be further researched.

Figure 1 .
Figure 1.The model of the single-phase LCL-type grid-tied inverter.

Figure 3 .
Figure 3. Frequency characteristics of P(s) and P LCL (s).

Figure 5 .
Figure 5. Structure of the FD-PIMR-RC based on an FFD filter.

Figure 6 .
Figure 6.Frequency characteristics of the FFD filter with different W-th order.

Figure 7 .
Figure 7. Pole plots of P 0 (z).(a) Pole plots of the P 0 (z) with different k p .(b) Pole plots of the P 0 (z) with k p and k ic is 15 and 18, respectively.

Figure 9 .
Figure 9. Nyquist graph of the H(e jωT s ) with different values of k r .

Figure 14 .
Figure 14.Steady-state response of the PIMR-RC system when f g = 49.6 Hz.(a) Output voltage and current of grid.(b) Spectrum analysis of output current.

Figure 15 .Figure 16 .Figure 17 .
Figure 15.Steady-state response of the FD-PIMR-RC system when f g = 49.6Hz.(a) Output voltage and current of grid.(b) Spectrum analysis of output current.

Figures 19 and 20
Figures 19 and 20  show the grid current i g and error current i error transient waveforms of the PIMR-RC and FD-PIMR-RC systems when the reference current i re f drops from 10 A to 5 A. As can be seen, the two schemes exhibited excellent error convergence rates when the reference current changed at different frequencies.Both of them could recover stability after about two fundamental periods.Nevertheless, compared to the PIMR-RC, the FD-PIMR-RC more effectively reduced the steady-state error.

Figure 19 .Figure 20 .
Figure 19.Transient waveforms of i g and i error when the reference current changes with f g = 49.6 Hz.(a) PIMR-RC.(b) FD-PIMR-RC.

Table 1 .
Comparison of the different fractional delay filters.

Table 2 .
Parameters of the LCL-type single-phase grid-tied inverter.
THD values of i g with different control schemes when the grid frequency fluctuates.