Search Results (543)

There is a growing need for high-efficiency power electronic converters that can effectively convert energy, regulate voltages, and enhance power quality in standalone power generators, as the use of renewable energy sources and battery energy storage devices increases. The quasi-impedance-source inverter (qZSI) has attracted significant interest due to its single-stage buck-boost operation, continuous input current, reduced reliance on passive elements, and increased reliability. In this paper, the control strategy and implementation of the qZSI with battery assistance for standalone photovoltaic energy generation are discussed. To analyze the operational characteristics and design the control strategy of the qZSI, the system equations are linearized around the nominal operating point to develop a small-signal model, from which the direct current (DC) side and alternative current (AC) side transfer functions are derived and used as the basis for controller design. Using the proposed model, hybrid controllers are designed to control the shoot-through duty cycle, maintain DC link voltage stability, and battery charging to achieve stable power generation. Furthermore, the SPWM technique is applied to produce AC power with minimal harmonic content and higher efficiency. Application results show stable dynamic behavior, effective battery energy management, improved voltage regulation, and reduced harmonic distortion in the output waveform. The main contribution is a low-complexity coordinated PI and PR control framework for standalone battery-assisted qZSI operation, experimentally validated under DC- and AC-side disturbances without requiring an additional battery-side power-conversion stage. Full article

This paper proposes a super twisting observer-based fast terminal sliding mode control scheme with a novel dual-term reaching law for output voltage regulation of a DC–DC buck converter under disturbances. The proposed reaching law replaces the discontinuous sign function with a continuous hyperbolic tangent function, resolving the fundamental chattering–convergence trade-off inherent in classical reaching laws. The first term employs an exponential gain structure to accelerate convergence when system states are far from the sliding surface, while the second fractional-power term ensures rapid terminal-phase positioning in the vicinity of the surface. A fast terminal sliding surface is incorporated to further reduce settling time, and a super-twisting observer estimates matched disturbances arising from load and input voltage variations using only the output voltage measurement, eliminating the need for additional current sensors. Lyapunov-based stability proofs are provided for both the observer and the controller. Simulation results demonstrate that the proposed reaching law achieves a convergence time of 0.0403 s with the lowest tracking error among all compared methods: RMSE and MAE are reduced by 45.3% and 58.4%, respectively, relative to the exponential reaching law, while the chattering rate value decreases by 13.0%. Real-time experimental validation on a dSPACE1104 platform confirms that the proposed controller achieves fast reference voltage tracking, maintains tight output voltage regulation under load variations, and effectively rejects input voltage disturbances, demonstrating superior convergence speed, chattering attenuation, and disturbance rejection capability. Full article

The application of DC power electronics has expanded significantly across modern transmission and distribution systems, spanning medium-voltage direct current (MVDC) and high-voltage direct current (HVDC) networks, as well as low-power DC supplies for nanoscale applications, in which experimental validation remains indispensable for verifying system performance and control strategies. However, developing experimental platforms for high-power, high-voltage, or nanoscale DC systems is technically challenging and expensive and has not been adequately addressed in the existing literature. To overcome these limitations, this paper presents a per-unit-based experimental twin (Ex-Twin) framework for Buck converters implemented with a nested-loop control architecture. By transforming the converter dynamics from the time domain to an angular-domain representation, the proposed per-unit framework enables the development of dynamically equivalent experimental twins across a wide range of operating scales. The feasibility and effectiveness of the proposed Ex-Twin framework are validated through comprehensive electromagnetic (EMT) simulation studies and hardware experimental results, demonstrating its potential as a scalable and cost-effective platform for the development, testing, and validation of advanced DC power electronic systems. EMT simulations verify the cross-scale dynamic equivalence of the converter models over power ratings from 2 kW to 2 MW and voltage levels from 54 V to 54 kV, provided that the corresponding per-unit parameters and normalized disturbances are preserved. Under the investigated operating conditions, the systems achieved efficiencies of 95.3%, 96.7%, and 94.3% at 2 kW, 20 kW, and 2 MW, respectively, using both the real-scale and corresponding per-unit controllers. These results demonstrate consistent performance across the evaluated power scales. In addition, laboratory tests conducted on a 1 kW, 50 V Buck-converter platform validate the real-time implementation of both the real-scale and per-unit controllers under reference-voltage and load disturbances. An experimentally measured efficiency of 92.1% was achieved with both controllers, further demonstrating their consistent performance. Full article

Bidirectional DC–DC converters are key interfaces in battery energy storage systems, electric vehicles, fuel cell vehicles, and DC microgrids, where transparent mathematical models are required for simulation, controller evaluation, and energy-flow analysis. This paper presents a hybrid index matrix framework for the Python-based modeling of a bidirectional buck–boost converter coupled to a first-order Thevenin battery model. In contrast to a classical state-space formulation, the index matrix is used as a label-aware model-assembly layer: component equations are aligned by explicit row and column identifiers and subsequently projected into ordered numerical matrices for solution. Charging, idle, and discharging equations are solved using a fixed-step backward-Euler procedure, and a PI current controller with duty-cycle saturation and anti-windup regulates the power-flow direction. A conventional switched ODE implementation is retained only as a software-level numerical-consistency check between two implementations of the same assumptions; it is not presented as experimental validation or as an independent physical benchmark. For the reported 60 s current profile, the model gives a current RMSE of 0.0863 A and a peak current of 4.3684 A, corresponding to 9.2094% overshoot at the idle-to-discharge transition. The power-integration balance is 1.6091 Wh input, 1.5868 Wh output, and 0.0223 Wh estimated loss under the adopted conduction-oriented loss model. The conditional one-step sensitivity matrices have a spectral radius of 1.00000 in all three modes; the unit eigenvalue is consistent with the slowly varying SOC state, while the remaining electrical eigenvalues lie inside the unit circle. These eigenvalue results are interpreted as local non-divergence diagnostics rather than proof of asymptotic closed-loop or switched-system stability. The framework provides a transparent and reproducible numerical workflow, while experimental validation, detailed switching-level loss modeling, step-size convergence, and formal closed-loop/switched-system stability analysis remain necessary future work. Full article

Mobile robots and autonomous vehicles require tightly regulated direct current (DC) power under rapidly varying load conditions, motivating control strategies that combine fast nonlinear regulation with predictive optimization. This paper proposes a Hybrid Sliding Mode Control and Model Predictive Control (Hybrid SMC + MPC) strategy for a DC-DC buck converter supplying a representative mobile-robot mission load. The controller employs a cascade SMC structure for fast inner-loop regulation and an MPC component that provides finite-horizon duty-cycle correction using planned load information. The MPC problem is formulated in condensed form and solved analytically without an external optimization solver. A Lyapunov-based analysis establishes a sufficient reaching condition for the sliding variable under the ideal averaged-model assumptions, and the condition is verified for the simulated mission. The proposed approach is evaluated in MATLAB using a 10-phase, 10 s load profile with resistance varying from 7 Ω to 100 Ω and is compared with SMC-only, MPC-only, PID, constant-duty, and reconstructed fuzzy-logic benchmarks. In the averaged-model study, the Hybrid SMC + MPC achieves a maximum absolute voltage deviation of 0.388 V, an RMSE of 0.0115 V, and a final-phase mean absolute error of 0.0076 V. It provides the lowest maximum voltage deviation among the principal closed-loop controllers, while PID achieves the lowest RMSE and final-phase error and SMC-only exhibits the shortest mean settling time. Relative to MPC-only, the Hybrid controller reduces the maximum voltage deviation by approximately 43.6% and the mean settling time by approximately 66.1%. An ablation study shows that the MPC contribution substantially improves overall and steady-state regulation accuracy, while load preview primarily reduces the worst-case voltage deviation. Switching-level MATLAB/Simulink validation with explicit 20 kHz PWM and converter parasitics confirms that the output remains within ±2% of the 25 V reference throughout the complete mission, with a maximum absolute deviation of 0.443 V and a maximum steady-state switching ripple of 21.6 mV peak-to-peak. These results demonstrate that the proposed Hybrid SMC + MPC architecture provides a favorable balance between worst-case transient regulation, steady-state accuracy, and predictive control capability for dynamically varying robotic power loads. Full article

The growing share of photovoltaic generation in power grids intensifies the need for converter architectures capable of combining efficient energy conversion, DC-bus stability, and ancillary service provision at the grid coupling point. This paper presents the modeling, implementation, and simulation-based evaluation of a 91 kWp three-phase photovoltaic (PV) system integrated with a battery energy storage system (BESS), developed in the PLECS environment. The proposed architecture comprises three interleaved Boost stages for maximum power point tracking (MPPT), a DC bus regulated at 600 V, three independent bidirectional buck–boost converters for LiFePO₄ bank management, and a two-level three-phase voltage source inverter (VSI) with an LC output filter. The control is organized in cascade voltage–current loops for the DC–DC stages and in vector control within the synchronous reference frame (SRF) for the inverter, with synchronization via SRF-PLL. A C-Script supervisory block integrates the Perturb and Observe (P&O) MPPT algorithm, independent state of charge (SOC) estimation per bank via coulomb counting, and Volt–VAR reactive power reference generation with a dead band of 0.90–1.10 pu. Five scenarios are analyzed for validation: DC-bus regulation under irradiance transients; reactive power support during undervoltage and overvoltage events (0.80–0.85 pu and 1.15–1.20 pu); BESS operation as an active DC-link support element; and PV curtailment with fully charged banks. All five scenarios were additionally corroborated on a Typhoon HIL402 Pro 2 hardware-in-the-loop platform, reproducing the PLECS waveforms within the amplitude and timing resolution of the oscilloscope captures. Across all scenarios, the DC bus is held within $\pm 15$ V (2.5%) of the 600 V reference, with the worst-case transient recovering in 80–100 ms; under a sustained 9 s bidirectional disturbance, redirecting PV surplus to BESS charging in both the undervoltage and overvoltage segments—with no externally imposed active-current limit—keeps the current-vector magnitude $\sqrt{i_d^2+i_q^2}$ below the 335 A rating throughout (≈271 A and ≈242 A, respectively), while the available reactive margin $Q_{disp}$ reaches ≈78–80 kVAr in both segments and the bank SOC advances by ≈$0.03$ pu; and supervisory curtailment under a sustained overvoltage ride-through with a saturated bank keeps the per-bank SOC dispersion within $4\times {10}^{-5}$ pu while expanding the available reactive margin $Q_{disp}$ from ≈50 to ≈90 kVAr. Full article

Chaos, characterized by a broad spectrum, aperiodic, unpredictable behavior, and sensitivity to initial conditions, has been widely studied as a potential candidate for secure data transmission. Switching voltage converters (SVCs) are well known for their ability to exhibit nonlinear and, more specifically, chaotic behavior. In contrast to conventional approaches that seek to eliminate chaotic behavior in switching voltage converters, this work proposes exploiting such behavior to generate chaotic oscillations for further use in authentication and physical-layer security systems. However, reliable data recovery in a converter-based chaotic communication system requires synchronization between the transmitter and receiver converters operating in the chaotic regime. This work demonstrates the leader–follower synchronization of chaotic buck converters via control-signal injection using both SPICE simulations and laboratory experiments, contributing to the experimental investigation of chaotic power electronics. Simulation and experimental results confirm synchronization of chaotic buck converters using the proposed method, achieving a high correlation (>0.8) between the output waveforms. Furthermore, the analysis of the effect of noise in the synchronization channel demonstrates that converters remain highly correlated for SNR values down to 20 dB, suggesting their potential applicability to chaos-based communication systems. The proposed method achieves synchronization at the expense of the follower converter’s output-voltage regulation capability and requires both converters to share a common clock source, motivating future research on integrated synchronization and control strategies. Full article

A synchronous-Buck converter is proposed as part of a maximum power point tracking (MPPT) controller for charging a 12 V battery from a photovoltaic (PV) solar panel. This design incorporates a control module that manages energy flow from the solar panel to the battery. The novel module sequentially integrates MPPT, active current limiting (constant current, CC), and voltage regulation (constant voltage, CV), along with protection mechanisms and low-computational-complexity control. It also incorporates a synchronous-Buck converter with a current PI control loop; this differs from the strategy used in a traditional Buck converter in terms of how much switching losses are reduced. The proposal integrates these two stages and establishes a robust control scheme that enables the battery charging process in photovoltaic systems to adapt to variations in both input and output conditions. Additionally, an irradiance detection logic has been incorporated to ensure that the system operates only when there is sufficient solar radiation is available, thereby extending the system’s lifetime and improving overall energy utilization. This work focuses on the practical integration and experimental validation of a comprehensive maximum-power-point-tracking (MPPT)-based charging system. The main contributions of this study can be summarized as follows: (1) practical integration; (2) experimental validation; (3) hardware-based protection strategy and low-computational-complexity control. To validate the designed system, a 70 W prototype with 90% efficiency was implemented and tested. The experimental results verify that the implemented protection mechanism prevents the battery from discharging unnecessarily during low-irradiance or nighttime conditions. This improves the overall efficiency of the system and extends the battery’s lifetime. Full article

This paper presents a dual-output high-step-down buck converter with a resonant charge redistribution output stage using an average-difference regulation (ADR) scheme. The proposed converter combines a double-step-down (DSD) power stage and a resonant switched-capacitor charge redistribution (RCR) output stage to generate two low-voltage outputs from a 12 V input. The DSD stage regulates the intermediate voltage, which determines the sum of the two output voltages, while the RCR output stage controls the voltage difference between the two outputs through phase-shift control. Therefore, the proposed architecture separates output-voltage average regulation and output-voltage balancing, reducing cross regulation under load-imbalance conditions. The converter was designed in a 0.18 $\mathsf{\mu }$m BCD process with an active chip area of $8.29{\mathrm{mm}}^2$, including bonding pads. It supports two output voltages from 0.8 V to 1.2 V with a maximum load current of 2 A per output. Simulation results show an output voltage ripple of 7 mV at 1 V. For a 0.5 A to 2 A load step, the transient output exhibits a 147 mV undershoot, while the cross-regulation voltage is limited to 18 mV. The peak efficiency is 90.1% at a 0.5 A load current per output. Full article

The interleaved parallel Buck–Boost converter can reduce output voltage ripple and has been widely used in engineering practice. The application of fractional-order theory has a significant influence on model accuracy and power converter performance. Based on fractional calculus theory and the state space averaging method, this paper establishes a fractional-order mathematical model of the CCM interleaved parallel Buck–Boost converter. The steady-state operating point and ripple characteristics of the converter under the Caputo fractional-order definition are analyzed and compared with those under other fractional-order definitions. Fractional-order energy storage elements are constructed, and a fractional-order circuit simulation model of the converter is established for comparative simulation analysis. Finally, experiments are carried out to verify the effectiveness of the theoretical analysis. Full article

This paper presents the design, digital implementation, and experimental validation of a new 50 W scaled prototype of a quadratic buck converter (48 V to 5 V, 10 A) controlled by a finite control set model predictive control (FCS-MPC) strategy. The converter utilizes its quadratic step-down topology to achieve high voltage conversion gain without extreme duty cycles, making it suitable for low-power applications requiring precise voltage regulation. The proposed methodology encompasses the theoretical design of the power stage, the development of the experimental prototype based on a C2000 Digital Signal Processor DSP, and a comparative performance assessment between the proposed FCS-MPC and a conventionally tuned PD controller. An iterative tuning and real-time validation process is employed to optimize both the converter parameters and the control law, ensuring closed-loop stability and enhanced dynamic response under line and load disturbances. The experimental results demonstrate that the FCS-MPC strategy significantly outperforms the PD controller in terms of output voltage regulation, settling time (4.2 s vs. 5 ms), and disturbance rejection (<2 ms recovery). The main contribution of this work is the construction of a new scaled prototype and the experimental validation of a predictive control strategy for a high-gain DC–DC converter, positioning the FCS-MPC-controlled quadratic buck converter as a viable solution for modern applications demanding high energy efficiency and robustness. Full article

High-efficiency and high-power-density point-of-load (POL) converters are critical for data center power supplies. Although hybrid resonant switched-capacitor (ReSC) converters can substantially reduce the volume of passive components, they often suffer from severe efficiency degradation when the switching frequency mismatches the resonant frequency due to component tolerances. To address this challenge, this paper proposes a parameter-mismatch insensitive cascaded POL converter by integrating a BUCK stage with a cascaded voltage divider (CVD). By introducing an auxiliary resonant branch, a multi-resonant operation is established, enabling the residual inductor energy caused by component variations to be transferred to the output during the dead time with virtually eliminated hard-switching losses. Consequently, precise matching between the switching frequency and the resonant frequency is no longer mandatory. A 12 V-to-1 V/30 A GaN-based prototype was developed to validate the theoretical analysis. Experimental results demonstrate that the proposed converter maintains high efficiency under a ±10% component variation and achieves robust voltage regulation and fast transient response, making it highly suitable for high-current data center applications. Full article

Buck converter power interfaces are commonly used as local voltage regulation units in compact actuator-driven microsystems, where the regulated voltage needs to remain stable under input, load, and circuit-level disturbances. In practical control loops, passive-parameter variations, external perturbations, and non-ideal sensor-driver dynamics may distort feedback signals, delay effective duty-cycle action, and degrade the transient response of conventional robust controllers. Motivated by this issue, this paper presents the analysis and design of a sensor-driver-aware integral nonsingular terminal sliding mode control (INTSMC) method for a buck converter power interface under multi-source disturbances. A control-oriented averaged model is first constructed by incorporating converter parameter perturbations, load-side disturbances, Hall sensor dynamics, and isolated driver characteristics into a unified representation. Based on this model, an integral nonsingular terminal sliding surface is designed to improve voltage tracking performance while avoiding singularity in the reaching process. The corresponding control law is further arranged in a pulse-width modulation-realizable duty-cycle form, making it suitable for digital converter control. In addition, a phase-trajectory-based response-time estimation method is introduced to analyze the influence of initial states, disturbance levels, and hardware dynamic parameters on the closed-loop reaching behavior. Simulation studies under different operating conditions are carried out to evaluate the proposed controller. Simulation and experimental results show that the proposed method achieves a settling time within 33 ms, a steady-state voltage error within 0.01 V, and a measured efficiency of 83.5%~88.9%, indicating its feasibility for robust power regulation in micro-actuator-oriented microsystems where sensor-driver dynamics cannot be ignored. Full article

In recent years, the rapid evolution of large artificial intelligence (AI) models has placed unprecedented demands on the computing power of data center servers, driving an explosive growth in data center computing requirements. The power consumption of core computing components, represented by GPUs, has surged dramatically. When facing extremely high power densities, the traditional 12 V single-voltage power delivery architecture exposes severe limitations, including increased transmission link losses, thermal management difficulties, and low system efficiency. To address these challenges, this paper proposes and designs a hierarchical 54 V/12 V dual-plane multi-phase DC power delivery architecture for high-computing-power AI servers. By conducting refined hierarchical identification of system loads, this architecture introduces a 54 V high-voltage DC power plane for high-power loads while retaining the 12 V power plane for conventional loads. Within each power plane, multi-phase interleaved parallel Buck converters integrated with Turbo-COT control strategies and high-density DrMOS are deployed. Experimental results demonstrate that this power architecture exhibits excellent electrical characteristics: under steady-state conditions, the peak-to-peak (PK-PK) ripple voltage fluctuation amplitude of the 54 V power plane under different loads is compressed to between ±0.22% and ±0.26%, while the PK-PK ripple voltage fluctuation amplitude of the 12V power plane under different loads reaches ±0.66% to ±0.68%; in dynamic load step (0–50% and 50–100%) tests, the PK-PK voltage fluctuations of the 54 V plane are ±1.42% and ±1.33%, whereas the PK-PK voltage fluctuations of the 12 V power plane are ±2.36% and ±1.83%. Furthermore, the peak conversion efficiency of the 54 V power plane approaches 97%, and the maximum efficiency of the 12 V power plane reaches 94%, showing a measurable efficiency improvement under the tested conditions. The hierarchical multi-phase power delivery technology comprehensively reduces power supply link losses and enhances power stability, providing an important theoretical basis and engineering reference for the design of next-generation high-density AI servers and the optimization of green, energy-saving networks in data centers. Full article

This study addresses the power dispatching of a DC-coupled three-phase grid-connected photovoltaic (PV) and energy storage-integrated system by proposing a peak shaving and valley-filling control architecture based on time-of-use (TOU) pricing. This research involves achieving maximum power-point tracking (MPPT) for PVMAs using a boost converter combined with the perturb and observe (P&O) method. A lithium-iron phosphate battery pack is integrated into the DC link via a bidirectional buck-boost converter, where charging and discharging control is executed according to peak and off-peak periods to regulate and stabilize the DC link voltage. Furthermore, bidirectional power flow control for peak and off-peak electricity consumption is realized using hysteresis current control and sinusoidal pulse-width modulation (SPWM) technologies within a smart inverter. By integrating the aforementioned power control architecture, the grid system can store energy from the utility during off-peak hours and release the stored energy during peak hours to reduce the load demand on the utility side. Initially, a simulation environment was established using Matlab/Simulink (2024b version) software, followed by control verification of the proposed system on a physical platform. The simulation and experimental results confirm that the integrated control architecture can precisely control the system’s DC link voltage at 800 V and stabilize the grid-connected AC voltage at an effective value (RMS) of 380 V. Moreover, under conditions of peak/off-peak switching and load variations, the system effectively demonstrates its stability and efficacy in performing valley filling and peak shaving. The proposed strategy achieves a power factor above 0.99 and a total harmonic distortion (THD) below 5%, regulates the DC-link voltage at 800 V with a steady-state error within 1.75%, and prevents up to 66.4 kWh of over-contract energy consumption per day under a 35 kW contract capacity, thereby contributing to sustainable energy management and economic savings. Full article