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Keywords = adjacent channel power ratio

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10 pages, 28452 KiB  
Article
Highly Linear 2.6 GHz Band InGaP/GaAs HBT Power Amplifier IC Using a Dynamic Predistorter
by Hyeongjin Jeon, Jaekyung Shin, Woojin Choi, Sooncheol Bae, Kyungdong Bae, Soohyun Bin, Sangyeop Kim, Yunhyung Ju, Minseok Ahn, Gyuhyeon Mun, Keum Cheol Hwang, Kang-Yoon Lee and Youngoo Yang
Electronics 2025, 14(11), 2300; https://doi.org/10.3390/electronics14112300 - 5 Jun 2025
Viewed by 445
Abstract
This paper presents a highly linear two-stage InGaP/GaAs power amplifier integrated circuit (PAIC) using a dynamic predistorter for 5G small-cell applications. The proposed predistorter, based on a diode-connected transistor, utilizes a supply voltage to accurately control the linearization characteristics by adjusting its dc [...] Read more.
This paper presents a highly linear two-stage InGaP/GaAs power amplifier integrated circuit (PAIC) using a dynamic predistorter for 5G small-cell applications. The proposed predistorter, based on a diode-connected transistor, utilizes a supply voltage to accurately control the linearization characteristics by adjusting its dc current. It is connected in parallel with an inter-stage of the two-stage PAIC through a series configuration of a resistor and an inductor, and features a shunt capacitor at the base of the transistor. These passive components have been optimized to enhance the linearization performance by managing the RF signal’s coupling to the diode. Using these optimized components, the AM−AM and AM−PM nonlinearities arising from the nonlinear resistance and capacitance in the diode can be effectively used to significantly flatten the AM−AM and AM−PM characteristics of the PAIC. The proposed predistorter was applied to the 2.6 GHz two-stage InGaP/GaAs HBT PAIC. The IC was tested using a 5 × 5 mm2 module package based on a four-layer laminate. The load network was implemented off-chip on the laminate. By employing a continuous-wave (CW) signal, the AM−AM and AM−PM characteristics at 2.55–2.65 GHz were improved by approximately 0.05 dB and 3°, respectively. When utilizing the new radio (NR) signal, based on OFDM cyclic prefix (CP) with a signal bandwidth of 100 MHz and a peak-to-average power ratio (PAPR) of 9.7 dB, the power-added efficiency (PAE) reached at least 11.8%, and the average output power was no less than 24 dBm, achieving an adjacent channel leakage power ratio (ACLR) of −40.0 dBc. Full article
(This article belongs to the Section Microwave and Wireless Communications)
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17 pages, 5570 KiB  
Article
Analysis and Design of Class-D Outphasing Power Amplifier with Non-Isolating Balun Combiner
by Jiyun Bae, Munsu Jeong, Sangjin Yoo, Ilku Nam and Ockgoo Lee
Electronics 2025, 14(11), 2196; https://doi.org/10.3390/electronics14112196 - 28 May 2025
Viewed by 359
Abstract
This paper presents a class-D outphasing power amplifier (PA) that incorporates a non-isolating balun combiner employing a 180° phase shift. Both isolating and non-isolating outphasing combiners are analyzed for signal restoration and combining efficiency. The proposed non-isolating balun combiner employing the 180° phase [...] Read more.
This paper presents a class-D outphasing power amplifier (PA) that incorporates a non-isolating balun combiner employing a 180° phase shift. Both isolating and non-isolating outphasing combiners are analyzed for signal restoration and combining efficiency. The proposed non-isolating balun combiner employing the 180° phase shift was experimentally evaluated and compared with a commercial isolating Wilkinson combiner. When two constant-envelope signals derived from a 10 MHz long-term evolution (LTE) signal are applied to the inputs of the outphasing combiners, both combiners demonstrate successful signal reconstruction. The measured adjacent channel leakage ratios (ACLRs) are −47 dBc for the Wilkinson combiner and −46 dBc for the proposed balun combiner. At 6 dB power back-off (PBO), the proposed balun combiner achieves a combining efficiency of 85.1%, representing an improvement of nearly 60% over the Wilkinson combiner. With a center frequency of 650 MHz, targeting 5G FR1 applications, a class-D outphasing PA was designed in a 28 nm CMOS process using the measured S-parameter data from both outphasing combiners. Simulation results show that the class-D outphasing PA incorporating the proposed balun combiner achieves a peak drain efficiency (DE) of 82.9% with an output power of 17.7 dBm. At 6 dB PBO, the DE reaches 61%, which is approximately 37% higher than that of the outphasing PA using the Wilkinson combiner. Moreover, the designed outphasing PA supports broadband operation over the 360–860 MHz range. Full article
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12 pages, 1326 KiB  
Article
A Wideband Digital Pre-Distortion Algorithm Based on Edge Signal Correction
by Yan Lu, Hongwei Zhang and Zheng Gong
Electronics 2025, 14(11), 2170; https://doi.org/10.3390/electronics14112170 - 27 May 2025
Viewed by 340
Abstract
With the continuous expansion of communication bandwidth, accurately modeling the non-linear characteristics of power amplifiers has become increasingly challenging, directly affecting the performance of digital pre-distortion (DPD) technology. The high peak-to-average power ratio and complex modulation schemes of wideband signals further exacerbate the [...] Read more.
With the continuous expansion of communication bandwidth, accurately modeling the non-linear characteristics of power amplifiers has become increasingly challenging, directly affecting the performance of digital pre-distortion (DPD) technology. The high peak-to-average power ratio and complex modulation schemes of wideband signals further exacerbate the difficulty of DPD implementation, necessitating more efficient algorithms. To address these challenges, this paper proposes a wideband DPD algorithm based on edge signal correction. By acquiring signals near the center frequency and comparing them with equally band-limited feedback signals, the algorithm effectively reduces the required processing bandwidth. The incorporation of cross-terms for model calibration enhances the model fitting accuracy, leading to significant improvement in pre-distortion performance. Simulation results demonstrate that compared with traditional DPD algorithms, the proposed method reduces the error vector magnitude (EVM) from 1.112% to 0.512%. Experimental validation shows an average improvement of 11.75 dBm in adjacent channel power at a 2 MHz frequency offset compared to conventional memory polynomial DPD. These improvements provide a novel solution for power amplifier linearization in wideband communication systems. Full article
(This article belongs to the Section Circuit and Signal Processing)
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15 pages, 12762 KiB  
Review
Advanced Doherty Power Amplifier Architectures for 5G Handset Applications: A Comprehensive Review of Linearity, Back-Off Efficiency, Bandwidth, and Thermal Management
by Shihai He and Huan Chen
Chips 2025, 4(2), 20; https://doi.org/10.3390/chips4020020 - 6 May 2025
Viewed by 1324
Abstract
This paper presents a comprehensive review of GaAs HBT-based Doherty power amplifiers (DPAs) targeting 5G New Radio (NR) handset applications. Focusing on the critical challenges of linearity enhancement, back-off efficiency improvement, bandwidth extension under low-voltage (3.4 V) operation, and chip thermal management, the [...] Read more.
This paper presents a comprehensive review of GaAs HBT-based Doherty power amplifiers (DPAs) targeting 5G New Radio (NR) handset applications. Focusing on the critical challenges of linearity enhancement, back-off efficiency improvement, bandwidth extension under low-voltage (3.4 V) operation, and chip thermal management, the authors analyze state-of-the-art DPAs published in recent years. Key innovations including dynamic power division technique, third order intermodulation (IM3) cancellation technology, and compact output combiners are comparatively studied. Using 5G NR signals, the critical performance of the latest reported PA such as maximum linear power, back-off efficiency, bandwidth, and operating voltage are quantitatively investigated. The measurement results demonstrated that the best performance in recent DPAs achieved high linear power of 31 dBm with 34% PAE and 30 dBm with 31% PAE at the N78 and N77 bands, respectively. The corresponding adjacent channel leakage ratios (ACLRs) were lower than −36.5 dBc without digital pre-distortion (DPD). This review provides a comprehensive understanding of the latest advancements and future directions in highly efficient and linear DPA designs for 5G handset front-end modules. Full article
(This article belongs to the Special Issue IC Design Techniques for Power/Energy-Constrained Applications)
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10 pages, 6676 KiB  
Article
2W HBT Power Amplifier Module with Dual Second Harmonic Suppression Technique
by Chul-Woo Byeon and Joon-Hyung Kim
Sensors 2025, 25(4), 1231; https://doi.org/10.3390/s25041231 - 18 Feb 2025
Viewed by 572
Abstract
This paper presents a high-power heterojunction bipolar transistor (HBT) power amplifier (PA) module designed for GSM/EDGE applications. The proposed HBT PA employs a differential output stage that delivers high output power at a low supply voltage. A transformer-based output matching network is employed [...] Read more.
This paper presents a high-power heterojunction bipolar transistor (HBT) power amplifier (PA) module designed for GSM/EDGE applications. The proposed HBT PA employs a differential output stage that delivers high output power at a low supply voltage. A transformer-based output matching network is employed to combine the differential output signals. Through the selection of an appropriate capacitor value at the transformer’s center tap, linearity is enhanced across a wide bandwidth without requiring additional second harmonic termination. When assembled with a low-pass filter and an antenna switch, the PA module achieves an output power of 36 dBm and a power-added efficiency (PAE) exceeding 40% in GSM mode. In EDGE mode, it delivers an output power of 28.5 dBm with a PAE exceeding 20%. Additionally, the designed PA module achieves an adjacent channel power ratio of −60 dBc at a 400 kHz offset with an output power of 28.5 dBm. Full article
(This article belongs to the Section Electronic Sensors)
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25 pages, 15082 KiB  
Article
A Sub-6GHz Two-Port Crescent MIMO Array Antenna for 5G Applications
by Heba Ahmed, Allam M. Ameen, Ahmed Magdy, Ahmed Nasser and Mohammed Abo-Zahhad
Electronics 2025, 14(3), 411; https://doi.org/10.3390/electronics14030411 - 21 Jan 2025
Cited by 2 | Viewed by 1487
Abstract
The fifth generation of wireless communication (5G) technology is becoming more innovative with the increasing need for high data rates because of the incremental rapidity of mobile data growth. In 5G systems, enhancing device-to-device communication, ultra-low latency (1 ms), outstanding dependability, significant flexibility, [...] Read more.
The fifth generation of wireless communication (5G) technology is becoming more innovative with the increasing need for high data rates because of the incremental rapidity of mobile data growth. In 5G systems, enhancing device-to-device communication, ultra-low latency (1 ms), outstanding dependability, significant flexibility, and data throughput (up to 20 Gbps) is considered one of the most essential factors for wireless networks. To meet these objectives, a sub-6 5G wideband multiple-input multiple-output (MIMO) array microstrip antenna for 5G Worldwide Interoperability for Microwave Access (WiMAX) applications on hotspot devices has been proposed in this research. The 1 × 4 MIMO array radiating element antenna with a partial ground proposed in this research complies with the 5G application standard set out by the Federal Communications Commission. The planned antenna configuration consists of a hollow, regular circular stub patch antenna shaped like a crescent with a rectangular defect at the top of the patch. The suggested structure is mounted on an FR-4 substrate with a thickness “h” of 1.6, a permittivity “εr” of 4.4, and a tangential loss of 0.02. The proposed antenna achieves a high radiation gain and offers a frequency spectrum bandwidth of 3.01 GHz to 6.5 GHz, covering two 5G resonant frequencies “fr” of 3.5 and 5.8 GHz as the mid-band, which yields a gain of 7.66 dBi and 7.84 dBi, respectively. MIMO antenna parameters are examined and introduced to assess the system’s performance. Beneficial results are obtained, with the channel capacity loss (CCL) tending to 0.2 bit/s/Hz throughout the operating frequency band, the envelope correlation coefficient (ECC) yielding 0.02, a mean effective gain (MEG) of less than −6 dB over the operating frequency band, and a total active reflection coefficient (TARC) of less than −10 dB; the radiation efficiency is equal to 71.5%, maintaining impedance matching as well as good mutual coupling among the adjacent parameters. The suggested antenna has been implemented and experimentally tested using the 5G system Open Air Interface (OAI) platform, which operates at sub-6 GHz, yielding −67 dBm for the received signal strength indicator (RSSI), and superior frequency stability, precision, and reproducibility for the signal-to-interference-plus-noise ratio (SINR) and a high level of positivity in the power headroom report (PHR) 5G system performance report, confirming its operational effectiveness in 5G WiMAX (Worldwide Interoperability for Microwave Access) application. Full article
(This article belongs to the Section Microwave and Wireless Communications)
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16 pages, 2111 KiB  
Article
Research on the Interference Effects of 5G’s Key Parameters on Radio Altimeters
by Jie Bai, Shun Yuan and Zhaobin Duan
Aerospace 2025, 12(1), 16; https://doi.org/10.3390/aerospace12010016 - 30 Dec 2024
Cited by 1 | Viewed by 923
Abstract
The 5G frequency band is extremely close to the operating frequency band of radio altimeters (RAs), so an in-depth study of the possible interference of 5G’s key parameters on RAs is especially necessary to ensure aviation safety. In this paper, the interference magnitude [...] Read more.
The 5G frequency band is extremely close to the operating frequency band of radio altimeters (RAs), so an in-depth study of the possible interference of 5G’s key parameters on RAs is especially necessary to ensure aviation safety. In this paper, the interference magnitude of 5G waveforms on an altimeter was measured by simulating the Adjacent Channel Leakage Power Ratio (ACLR) values for different sub-carrier spacing (SCS) and channel bandwidth configurations. Furthermore, interference injection experiments on simulated 5G signals and the interference thresholds of a frequency-modulated continuous wave (FMCW) altimeter were compared to experiments on the effects of the different configurations of 5G SCSs, channel bandwidths, and center frequency points. The interference thresholds of this FMCW altimeter were found to be in the range of 1 dBm to 6 dBm and −4 dBm to 0 dBm under the interference of 5G signals at the center frequency points of 3.7 GHz and 3.9 GHz. These results provided a certain reference for the engineering judgement margin of the interference thresholds. Full article
(This article belongs to the Section Air Traffic and Transportation)
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13 pages, 3887 KiB  
Article
A Low-Computational-Complexity Digital Predistortion Model for Wideband Power Amplifier
by Xu Lu, Qiang Zhou, Lei Zhu, Zhihu Wei, Yaqi Wu, Zunyan Liu and Zhang Chen
Sensors 2024, 24(21), 6941; https://doi.org/10.3390/s24216941 - 29 Oct 2024
Viewed by 1586
Abstract
This paper proposes a Composition Piecewise Memory Polynomial (CPMP) digital predistortion model based on a Vector Switched (VS) behavioral model to address the challenges of severe nonlinearity and strong memory effects in wideband power amplifiers (PAs). To tackle this issue, two thresholds are [...] Read more.
This paper proposes a Composition Piecewise Memory Polynomial (CPMP) digital predistortion model based on a Vector Switched (VS) behavioral model to address the challenges of severe nonlinearity and strong memory effects in wideband power amplifiers (PAs). To tackle this issue, two thresholds are calculated and used to segment the envelope values of the input signal according to the nonlinear distortion characteristics of the PA. In this approach, a Generalized Memory Polynomial (GMP) model is employed for the lower segment, a Memory Polynomial (MP) model is employed for the middle segment, and a higher-order GMP model is employed for the upper segment. By sharing the fundamental MP among the proposed segmented models and leveraging a design methodology that configures different cross terms, memory depths, and polynomial orders for each segment, this model achieves superior linearization performance while simultaneously reducing the computational complexity associated with model extraction. The experimental results demonstrate that the adjacent channel power ratio (ACPR) of the predistorted PA output signal using the proposed model improves from −36 dBc to −54 dBc, matching the performance of the GMP model. Furthermore, this performance is 0.5 dBc better than the Piecewise Dynamic Deviation Reduction (PDDR) and Decomposed Vector Rotation (DVR) models. Notably, the complexity of the proposed parameter extraction process is 28.8% of the DVR model, 21.79% of the GMP model, and 12.83% of the PDDR model. Full article
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15 pages, 2896 KiB  
Article
Guard Band Protection Scheme to Facilitate Coexistence of 5G Base Stations and Radar Altimeters
by Jiaqi Li and Seung-Hoon Hwang
Electronics 2024, 13(18), 3681; https://doi.org/10.3390/electronics13183681 - 16 Sep 2024
Cited by 1 | Viewed by 1608
Abstract
Reformation of the 3.7–4.0 GHz band to expand 5G communication deployment poses a risk of 5G signals disrupting radar altimeter operation, leading to data loss or inaccuracies. Thus, this paper proposes a guard band protection method to facilitate the coexistence of 5G base [...] Read more.
Reformation of the 3.7–4.0 GHz band to expand 5G communication deployment poses a risk of 5G signals disrupting radar altimeter operation, leading to data loss or inaccuracies. Thus, this paper proposes a guard band protection method to facilitate the coexistence of 5G base stations and radar altimeters operating in the 4.2–4.4 GHz band. To enhance the adjacent channel leakage ratio (ACLR), we implemented spectral regrowth on an oversampled waveform using a high-power amplifier model, filtering out-of-band spectral emissions. The results demonstrated that a 150 MHz guard band enables coexistence, except in the case of the 16-by-16 antenna array in rural environments. Notably, for the 4-by-4 antenna array in urban environments, coexistence can be achieved using a 50 MHz guard band. The proposed mitigation techniques may also be extended to promote coexistence between non-terrestrial networks and 5G communication systems, including satellites, unmanned aerial vehicles, and hot air balloons. Full article
(This article belongs to the Special Issue 5G/B5G/6G Wireless Communication and Its Applications)
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16 pages, 57288 KiB  
Article
Ultra-Generalized Continuous Class F Power Amplifier with Finite Third-Harmonic Load Impedance
by Feifei Li and Cuiping Yu
Electronics 2024, 13(12), 2284; https://doi.org/10.3390/electronics13122284 - 11 Jun 2024
Cited by 1 | Viewed by 1632
Abstract
This paper proposes the ultra−generalized continuous class F (UCCF) mode, which combines the influences of the drain current conduction angle and overdriven transistor on the drain current waveform to achieve a broader finite third-harmonic load impedance space. The UCCF mode uses α to [...] Read more.
This paper proposes the ultra−generalized continuous class F (UCCF) mode, which combines the influences of the drain current conduction angle and overdriven transistor on the drain current waveform to achieve a broader finite third-harmonic load impedance space. The UCCF mode uses α to describe the magnitude of the drain current conduction angle and pcr to describe the drain current peak-clipped ratio. An analysis of the effects of pcr and α on the linearity and efficiency of the UCCF model is presented, establishing a robust theoretical foundation for achieving a balance between these two characteristics. Additionally, an examination of how pcr and α influence the load impedance design space is conducted, demonstrating that the UCCF mode not only offers a broader finite third-harmonic load impedance space but also expands the fundamental and second-harmonic load impedance design space. For practical validation, a PA with frequency of 2.05–2.65 GHz is designed based on CGH40010F. The test results show that S11 is less than −15 dB, the drain efficiency is 67.0–73.2%, and the output power is 40.1–41.0 dBm. The linearity is tested using a 5G NR (New Radio) signal with a bandwidth of 100 MHz and a peak-to-average power ratio of 8 dB at 2.35 GHz. The worst adjacent channel power ratio (ACPR) is −34.8 dBc without digital predistortion (DPD), and −57.8 dBc with DPD. An average output power (Pave) of around 32.4 dBm and an average DE (DEave) of 34.39% were obtained. Full article
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16 pages, 3903 KiB  
Article
A Broadband Three-Way Series Doherty Power Amplifier with Deep Power Back-Off Efficiency Enhancement for 5G Application
by Xianfeng Que, Jun Li and Yanjie Wang
Electronics 2024, 13(10), 1882; https://doi.org/10.3390/electronics13101882 - 11 May 2024
Cited by 4 | Viewed by 2195
Abstract
This article presents a new broadband three-way series Doherty power amplifier (DPA) topology, which enables a broadband output power back-off (OBO) efficiency enhancement of up to 10 dB or higher. The proposed DPA topology achieves Doherty load modulation and three-way power combining through [...] Read more.
This article presents a new broadband three-way series Doherty power amplifier (DPA) topology, which enables a broadband output power back-off (OBO) efficiency enhancement of up to 10 dB or higher. The proposed DPA topology achieves Doherty load modulation and three-way power combining through a transformer, which requires only a low coupling factor, thus facilitating its implementation in double-sided PCBs or monolithic microwave integrated circuit (MMIC) processes. The design equations for the proposed DPA topology are proposed and analyzed in detail. A proof-of-concept PA at the 2.1–2.8 GHz band using commercial GaN transistors was designed and fabricated to validate the proposed concept. Within the operating frequency band, it achieves a saturated output power (Psat) of 44.5–46.5 dBm with a peak drain efficiency (DE) of 60–72%, and 43–52% DE at 10 dB OBO. Moreover, under a 20 MHz long-term evolution (LTE)-modulated signal, the PA demonstrates a 36.8–37.5 dBm average output power (Pavg) and 47–53% average drain efficiency (DEavg). Notably, the adjacent channel leakage ratio (ACLR) is as low as −35–−28.2 dBc without any digital predistortion (DPD). Full article
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19 pages, 10394 KiB  
Article
Non-Linear Simulation by Harmonic Balance Techniques of Load Modulated Power Amplifier Driven by Random Modulated Signals
by Guillaume Neveux, Clément Hallepee, Damien Passerieux and Denis Barataud
Electronics 2024, 13(5), 947; https://doi.org/10.3390/electronics13050947 - 29 Feb 2024
Cited by 3 | Viewed by 1790
Abstract
The simulation of the steady state and the non-linear stability of a load modulated power amplifier (LMPA) driven by a random modulated generator, fully performed in the frequency domain by harmonic balance (HB) techniques, is presented. The non-linear microwave circuit and the driving [...] Read more.
The simulation of the steady state and the non-linear stability of a load modulated power amplifier (LMPA) driven by a random modulated generator, fully performed in the frequency domain by harmonic balance (HB) techniques, is presented. The non-linear microwave circuit and the driving pseudo-random modulated (PRM) generator are integrally defined in the frequency domain. The simulation is implemented and performed using commercially available circuit simulation software. The demodulation of the output signal of the LMPA is implemented with optimally matched filters as software-defined demodulation. The simulated dynamic results of a Quasi-MMIC GaN Doherty power amplifier (DPA) are shown and compared to the measured results with a 16-QAM driving signal at 10 MS/s. The time-domain measurement allows the validation of the new simulation technique through the comparison of both the measured and the simulated error vector magnitude (EVM), the left and right adjacent channel power ratios (ACPRs) versus the average output power. This new simulation is then called pseudo-random modulated harmonic balance (PRM-HB) simulation. The full PRM-HB simulation of an LMPA driven by a random modulated signal, performed in the frequency domain at the design circuit level, results in an advanced simulation tool in the frame of the design of RF circuits and subsystems for telecommunication applications. Full article
(This article belongs to the Section Microwave and Wireless Communications)
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13 pages, 5640 KiB  
Article
A Dual-Mode CMOS Power Amplifier with an External Power Amplifier Driver Using 40 nm CMOS for Narrowband Internet-of-Things Applications
by Hyunjin Ahn, Kyutaek Oh, Se-Eun Choi, Dong-Hee Son, Ilku Nam, Kyoohyun Lim and Ockgoo Lee
Nanomaterials 2024, 14(3), 262; https://doi.org/10.3390/nano14030262 - 25 Jan 2024
Cited by 1 | Viewed by 1440
Abstract
The narrowband Internet-of-Things (NB-IoT) has been developed to provide low-power, wide-area IoT applications. The efficiency of a power amplifier (PA) in a transmitter is crucial for a longer battery lifetime, satisfying the requirements for output power and linearity. In addition, the design of [...] Read more.
The narrowband Internet-of-Things (NB-IoT) has been developed to provide low-power, wide-area IoT applications. The efficiency of a power amplifier (PA) in a transmitter is crucial for a longer battery lifetime, satisfying the requirements for output power and linearity. In addition, the design of an internal complementary metal-oxide semiconductor (CMOS) PA is typically required when considering commercial applications to include the operation of an optional external PA. This paper presents a dual-mode CMOS PA with an external PA driver for NB-IoT applications. The proposed PA supports an external PA mode without degrading the performances of output power, linearity, and stability. In the operation of an external PA mode, the PA provides a sufficient gain to drive an external PA. A parallel-combined transistor method is adopted for a dual-mode operation and a third-order intermodulation distortion (IMD3) cancellation. The proposed CMOS PA with an external PA driver was implemented using 40 nm-CMOS technology. The PA achieves a gain of 20.4 dB, a saturated output power of 28.8 dBm, and a power-added efficiency (PAE) of 57.8% in high-power (HP) mode at 920 MHz. With an NB-IoT signal (200 kHz π/4-differential quadrature phase shift keying (DQPSK)), the proposed PA achieves 24.2 dBm output power (Pout) with a 31.0% PAE, while satisfying −45 dBc adjacent channel leakage ratio (ACLR). More than 80% of the current consumption at 12 dBm Pout could be saved compared to that in HP mode when the proposed PA operates in low-power (LP) mode. The implemented dual-mode CMOS PA provides high linear output power with high efficiency, while supporting an external PA mode. The proposed PA is a good candidate for NB-IoT applications. Full article
(This article belongs to the Special Issue Advances in Nanotechnology for RF and Terahertz)
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17 pages, 5257 KiB  
Article
An Integrated Orthogonal Frequency-Division Multiplexing Chirp Waveform Processing Method for Joint Radar and Communication Based on Low-Density Parity-Check Coding and Channel Estimation
by Chenchen Zhu, Pengfei He, Shie Wu and Guorui Wang
Electronics 2024, 13(2), 334; https://doi.org/10.3390/electronics13020334 - 12 Jan 2024
Viewed by 1732
Abstract
With the advancement of information technology construction, the integration of radar and communication represents a crucial technological evolution. Driven by the research boom of integrated sensing and communications (ISACs), some scholars have proposed utilizing orthogonal frequency-division multiplexing (OFDM) to separately modulate radar and [...] Read more.
With the advancement of information technology construction, the integration of radar and communication represents a crucial technological evolution. Driven by the research boom of integrated sensing and communications (ISACs), some scholars have proposed utilizing orthogonal frequency-division multiplexing (OFDM) to separately modulate radar and communication signals. However, the OFDM symbols in this paper incorporate a cyclic prefix (CP) and a virtual carrier (VC) instead of zero padding (ZP). This approach mitigates out-of-band power caused by ZP, in addition to reducing adjacent channel interference (ACI). In addition, we introduce low-density parity-check (LDPC) and use an improved normalized min-sum algorithm (NMSA) in decoding. The enhanced decoding efficiency and minimized system errors render the proposed waveform more suitable for complex environments. In terms of signal processing methods, this paper continues to use radar signals as a priori information to participate in channel estimation. Further, we consider the symbol timing offset (STO) and carrier frequency offset (CFO) issues. In order to obtain more reliable data, we use the minimum mean-square error (MMSE) estimation based on the discrete Fourier transform (DFT) to evaluate the channel. Simulation experiments verify that the system we propose not only realizes the transmission and detection functions but also improves the performance index of the integrated signal, such as the bit error rate (BER) of 7 × 10−5, the peak side lobe ratio (PSLR) of −13.81 dB, and the integrated side lobe ratio (ISLR) of −8.98 dB at a signal-to-noise ratio (SNR) of 10 dB. Full article
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11 pages, 5158 KiB  
Article
An Outphasing Architecture Based on Parallel Radio Frequency–Pulse Width Modulation Method for All-Digital Transmitter
by Xu Wang, Qiang Zhou, Min Wang and Haoyang Fu
Electronics 2024, 13(2), 263; https://doi.org/10.3390/electronics13020263 - 6 Jan 2024
Cited by 3 | Viewed by 1482
Abstract
For the existing outphasing architectures of an all-digital transmitter (ADTx), the required sampling rate of the signal is too high, which increases the difficulty of digital radio frequency pulse width modulation (RF-PWM) processing. In this paper, we present an outphasing architecture based on [...] Read more.
For the existing outphasing architectures of an all-digital transmitter (ADTx), the required sampling rate of the signal is too high, which increases the difficulty of digital radio frequency pulse width modulation (RF-PWM) processing. In this paper, we present an outphasing architecture based on the parallel RF-PWM method for an ADTx. Through polyphase interpolation, two baseband outphasing signals are divided into multiple low-rate signals to process simultaneously. The parallel outphasing signals are modulated and encoded to obtain 1-bit parallel signals, which are, respectively, transmitted to multigigabit transceivers (MGTs) to generate two two-level high-speed pulses with different phases. Finally, a three-level high-speed pulse is synthesized and amplified through the switching power amplifier. Through this parallel scheme, the sampling rate of digital RF-PWM signal processing is effectively reduced. Moreover, to explore a pulse encoding method, the outphasing architecture is combined with a zero-crossing comparison through an angle calculation and quadrant judgment, which simplifies the modulation and encoding process. In addition, the impact of the sub-filter order and the number of parallel paths on system performance is analyzed. The simulation results show that for a 16QAM signal with a baseband bandwidth of 20 MHz and a carrier frequency of 200 MHz, the adjacent channel power ratio (ACPR) is below −45 dBc and the error vector magnitude (EVM) is below 1% in the proposed scheme. Full article
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