Search Results (16)

On-chip electrostatic discharge (ESD) protection is required for all integrated circuits (ICs). Conventional on-chip ESD protection relies on in-Si PN junction-based device structures for ESD. However, such in-Si PN-based ESD protection solutions pose significant challenges related to ESD protection design overhead, including parasitic capacitance, leakage current, and noises, as well as large chip area consumption and difficulty in IC layout floor planning. The design overhead effects of ESD protection devices are becoming unacceptable to modern ICs as IC technologies continuously advance, which is an emerging design-for-reliability challenge for advanced ICs. In this paper, we review the concept development of disruptive graphene-based on-chip ESD protection comprising a novel graphene nanoelectromechanical system (gNEMS) ESD switch and graphene ESD interconnects. This review discusses the simulation, design, and measurements of the gNEMS ESD protection structures and graphene ESD protection interconnects. The review aims to inspire non-traditional thinking for future on-chip ESD protection. Full article

Transient electronics can be gradually dissolved in a variety of liquids over time. The short-lived nature of such electronics has promoted their implementation in prospective applications, such as implantable electronics, dissolvable devices for secure systems, and environmentally biodegradable electronics. The amorphous metal tungsten nitride (WN_x) has the remarkable ability to scale down to the nano-scale, allowing the fabrication of sub-1 volt nano-electromechanical (NEM) switches. When compared to silicon, amorphous WN_x has a greater density and electrical conductivity, making it an even more appealing material for the design of accelerometers and resistive temperature detectors. Kinetic hydrolysis is observed by the dissolution of amorphous WN_x in ground water. To better understand the kinetics of hydrolysis, in this paper, samples are dissolved in different solutions under different conditions over time. NEM switches immersed in ground water, de-ionized (DI) water, and salty water are subjected to temperatures of 0 °C (degrees Celsius), 25 °C (room temperature, RT), and 60 °C. Sonicated samples are tested at both room temperature (RT) and at 60 °C. During the course of dissolving, the resistivity of amorphous WN_x is measured, and an increase in resistance is noted when the thickness of the amorphous WN_x is reduced. The wettability of a solid can be easily determined by measuring its contact angle, which indicates either the hydrophobic or hydrophilic nature of the surface. The contact angle of the amorphous WN_x is measured to be about 30.8°, indicating hydrophilicity. For the temperature sensor characterization, a probe station with a thermal chuck is used to apply heat from the bottom of the sensor. The actual real-time temperature of the amorphous WN_x sensor is measured using a thermocouple tip on the surface of the sensor. Full article

As the demands for improved performance of integrated circuit (IC) chips continue to increase, while technology scaling driven by Moore’s law is becoming extremely challenging, if not impractical or impossible, heterogeneous integration (HI) emerges as an attractive pathway to further enhance performance of Si-based complementary metal-oxide-semiconductor (CMOS) chips. The underlying basis for using HI technologies and structures is that IC performance goes well beyond classic logic functions; rather, functionalities and complexity of smart chips span across the full information chain, including signal sensing, conditioning, processing, storage, computing, communication, control, and actuation, which are required to facilitate comprehensive human–world interactions. Therefore, HI technologies can bring in more function diversifications to make system chips smarter within acceptable design constraints, including costs. Over the past two decades or so, a large number of HI technologies have been explored to increase heterogeneities in materials, technologies, devices, circuits, and system architectures, making it practically impossible to provide one single comprehensive review of everything in the field in one paper. This article chooses to offer a topical overview of selected HI structures that have been validated in CMOS platforms, including a stacked-via vertical magnetic-cored inductor structure in CMOSs, a metal wall structure in the back end of line (BEOL) of CMOSs to suppress global flying noises, an above-IC graphene nano-electromechanical system (NEMS) switch and nano-crossbar array electrostatic discharge (ESD) protection structure, and graphene ESD interconnects. Full article

Content-addressable memory (CAM) performs a parallel search operation by comparing the search data with all content stored in memory during a single cycle, instead of finding the data using an address. Conventional CAM designs use a dynamic CMOS architecture for high matching speed and high density; however, such implementations require the use of system clocks, and thus, suffer from timing violations and design limitations, such as charge sharing. In this paper, we propose a static-based architecture for a low-power, high-speed binary CAM (BCAM) and ternary CAM (TCAM), using a nanoelectromechanical (NEM) memory switch for nonvolatile data storage. We designed the proposed CAM architectures on a 65 nm process node with a 1.2 V operating voltage. The results of the layout simulation show that the proposed design has up to 23% less propagation delay, three times less matching power, and 9.4 times less area than a conventional design. Full article

Estuaries are biogeochemical reactors able to modulate the transfer of energy and matter from the watershed to the coastal zones and to retain or remove large amounts of terrestrially generated nutrients. However, they may switch from nutrient sink to source depending upon interannual variability of the nutrient supply and internal processes driving whole system metabolism (e.g., net autotrophic or heterotrophic). We tested this hypothesis in the Curonian Lagoon, a hypertrophic estuary located in the south east Baltic Sea, following the budget approach developed in the Land-Ocean Interactions in the Coastal Zone (LOICZ) project. Annual budgets for nitrogen (N), phosphorus (P), and silica (Si) were calculated for the 2013–2015 period. The lagoon was divided in a flushed, nutrient loaded area, and in a confined, less loaded area. The lagoon was always a sink for dissolved inorganic Si and P whereas it was a N sink in the confined area, dominated by denitrification, and a N source in the flushed area, due to dinitrogen (N₂) fixation. The net ecosystem metabolism (NEM) indicated that the Curonian Lagoon was mainly autotrophic because of high primary production rates. In this turbid system, low N:P ratio, high summer temperatures, and calm weather conditions support high production of N₂-fixing cyanobacteria, suppressing the estuarine N-sink role. Full article

Electrostatically actuated nanoelectromechanical (NEM) switches hold promise for operation with sharply defined ON/OFF states, high ON/OFF current ratio, low OFF state power consumption, and a compact design. The present challenge for the development of nanoelectromechanical system (NEMS) technology is fabrication of single nanowire based NEM switches. In this work, we demonstrate the first application of CuO nanowires as NEM switch active elements. We develop bottom-up and top-down approaches for NEM switch fabrication, such as CuO nanowire synthesis, lithography, etching, dielectrophoretic alignment of nanowires on electrodes, and nanomanipulations for building devices that are suitable for scalable production. Theoretical modelling finds the device geometry that is necessary for volatile switching. The modelling results are validated by constructing gateless double-clamped and single-clamped devices on-chip that show robust and repeatable switching. The proposed design and fabrication route enable the scalable integration of bottom-up synthesized nanowires in NEMS. Full article

Since the discovery of ferroelectricity in HfO₂-based materials which are comparable to the complementary metal-oxide–semiconductor (CMOS) fabrication process—a negative capacitance effect in the HfO₂-based materials has been actively studied. Owing to nonuniform polarization-switching (which is originated from the polycrystalline structures of HfO₂-based ferroelectric materials), the formation of multi-domains in the HfO₂-based materials is inevitable. In previous studies, perovskite-based ferroelectric materials (which is not compatible to CMOS fabrication process) were utilized to improve the electrical properties of a nanoelectromechanical (NEM) relay. In this study, the effects of a multi-domain HfO₂-based ferroelectric material on the electrical characteristics of an NEM relay were theoretically examined. Specifically, the number of domains, domain inhomogeneity and ferroelectric thickness of the multi-domain ferroelectric material were modulated and subsequently, its corresponding results were discussed. It was observed that the switching voltage variation was decreased with increasing the number of domains and decreasing domain inhomogeneity. In addition, the switching voltage was decreased with increasing ferroelectric thickness, owing to enhanced voltage amplification. Full article

With the fast development of the fifth-generation cellular network technology (5G), the future sensors and microelectromechanical systems (MEMS)/nanoelectromechanical systems (NEMS) are presenting a more and more critical role to provide information in our daily life. This review paper introduces the development trends and perspectives of the future sensors and MEMS/NEMS. Starting from the issues of the MEMS fabrication, we introduced typical MEMS sensors for their applications in the Internet of Things (IoTs), such as MEMS physical sensor, MEMS acoustic sensor, and MEMS gas sensor. Toward the trends in intelligence and less power consumption, MEMS components including MEMS/NEMS switch, piezoelectric micromachined ultrasonic transducer (PMUT), and MEMS energy harvesting were investigated to assist the future sensors, such as event-based or almost zero-power. Furthermore, MEMS rigid substrate toward NEMS flexible-based for flexibility and interface was discussed as another important development trend for next-generation wearable or multi-functional sensors. Around the issues about the big data and human-machine realization for human beings’ manipulation, artificial intelligence (AI) and virtual reality (VR) technologies were finally realized using sensor nodes and its wave identification as future trends for various scenarios. Full article

The development of micro and nano electromechanical systems and achievement of higher performances with increased quality and life time is confronted to searching and mastering of material with superior properties and quality. Those can affect many aspects of the MEMS, NEMS and MOMS design including geometric tolerances and reproducibility of many specific solid-state structures and properties. Among those: Mechanical, adhesion, thermal and chemical stability, electrical and heat conductance, optical, optoelectronic and semiconducting properties, porosity, bulk and surface properties. They can be affected by different kinds of phase transformations and degrading, which greatly depends on the conditions of use and the way the materials have been selected, elaborated, modified and assembled. Distribution of these properties cover several orders of magnitude and depend on the design, actually achieved structure, type and number of defects. It is then essential to be well aware about all these, and to distinguish and characterize all features that are able to affect the results. For this achievement, we point out and discuss the necessity to take into account several recently revisited fundamentals on carbon atomic rearrangement and revised carbon Raman spectroscopy characterizing in addition to several other aspects we will briefly describe. Correctly selected and implemented, these carbon materials can then open new routes for many new and more performing microsystems including improved energy generation, storage and conversion, 2D superconductivity, light switches, light pipes and quantum devices and with new improved sensor and mechanical functions and biomedical applications. Full article

Considering the isotropic release process of nanoelectromechanical systems (NEMSs), defining the active region of NEM memory switches is one of the most challenging process technologies for the implementation of monolithic-three-dimensional (M3D) CMOS–NEM hybrid circuits. In this paper, we propose a novel encapsulation method of NEM memory switches. It uses alumina (Al₂O₃) passivation layers which are fully compatible with the CMOS baseline process. The Al₂O₃ bottom passivation layer can protect intermetal dielectric (IMD) and metal interconnection layers from the vapor hydrogen fluoride (HF) etching process. Thus, the controllable formation of the cavity for the mechanical movement of NEM devices can be achieved without causing any damage to CMOS baseline circuits as well as metal interconnection lines. As a result, NEM memory switches can be located in any place and metal layer of an M3D CMOS–NEM hybrid chip, which makes circuit design easier and more volume efficient. The feasibility of our proposed method is verified based on experimental results. Full article

The miniaturization trend leads to the development of a graphene based nanoelectromechanical (NEM) switch to fulfill the high demand in low power device applications. In this article, we highlight the finite element (FEM) simulation of the graphene-based NEM switches of fixed-fixed ends design with beam structures which are perforated and intact. Pull-in and pull-out characteristics are analyzed by using the FEM approach provided by IntelliSuite software, version 8.8.5.1. The FEM results are consistent with the published experimental data. This analysis shows the possibility of achieving a low pull-in voltage that is below 2 V for a ratio below 15:0.03:0.7 value for the graphene beam length, thickness, and air gap thickness, respectively. The introduction of perforation in the graphene beam-based NEM switch further achieved the pull-in voltage as low as 1.5 V for a 250 nm hole length, 100 nm distance between each hole, and 12-number of hole column. Then, a von Mises stress analysis is conducted to investigate the mechanical stability of the intact and perforated graphene-based NEM switch. This analysis shows that a longer and thinner graphene beam reduced the von Mises stress. The introduction of perforation concept further reduced the von Mises stress at the graphene beam end and the beam center by approximately ~20–35% and ~10–20%, respectively. These theoretical results, performed by FEM simulation, are expected to expedite improvements in the working parameter and dimension for low voltage and better mechanical stability operation of graphene-based NEM switch device fabrication. Full article

In this paper, we report the finite element method (FEM) simulation of double-clamped graphene nanoelectromechanical (NEM) switches. Pull-in and pull-out characteristics are analyzed for graphene NEM switches with different dimensions and these are consistent with the experimental results. This numerical model is used to study the scaling nature of the graphene NEM switches. We show the possibility of achieving a pull-in voltage as low as 2 V for a 1.5-μm-long and 3-nm-thick nanocrystalline graphene beam NEM switch. In order to study the mechanical reliability of the graphene NEM switches, von Mises stress analysis is carried out. This analysis shows that a thinner graphene beam results in a lower von Mises stress. Moreover, a strong electrostatic force at the beam edges leads to a mechanical deflection at the edges larger than that around the center of the beam, which is consistent with the von Mises stress analysis. Full article

This work demonstrates the feasibility to obtain copper nanoelectromechanical (NEMS) relays using a commercial complementary metal oxide semiconductor (CMOS) technology (ST 65 nm) following an intra CMOS-MEMS approach. We report experimental demonstration of contact-mode nano-electromechanical switches obtaining low operating voltage (5.5 V), good I_ON/I_OFF (10³) ratio, abrupt subthreshold swing (4.3 mV/decade) and minimum dimensions (3.50 μm × 100 nm × 180 nm, and gap of 100 nm). With these dimensions, the operable Cell area of the switch will be 3.5 μm (length) × 0.2 μm (100 nm width + 100 nm gap) = 0.7 μm² which is the smallest reported one using a top-down fabrication approach. Full article

The need for more energy-efficient solid-state switches beyond complementary metal-oxide-semiconductor (CMOS) transistors has become a major concern as the power consumption of electronic integrated circuits (ICs) steadily increases with technology scaling. Nano-Electro-Mechanical (NEM) relays control current flow by nanometer-scale motion to make or break physical contact between electrodes, and offer advantages over transistors for low-power digital logic applications: virtually zero leakage current for negligible static power consumption; the ability to operate with very small voltage signals for low dynamic power consumption; and robustness against harsh environments such as extreme temperatures. Therefore, NEM logic switches (relays) have been investigated by several research groups during the past decade. Circuit simulations calibrated to experimental data indicate that scaled relay technology can overcome the energy-efficiency limit of CMOS technology. This paper reviews recent progress toward this goal, providing an overview of the different relay designs and experimental results achieved by various research groups, as well as of relay-based IC design principles. Remaining challenges for realizing the promise of nano-mechanical computing, and ongoing efforts to address these, are discussed. Full article

This paper qualitatively explores the performance limits, i.e., energy vs. frequency, of adiabatic logic circuits based on nanoelectromechanical (NEM) switches. It is shown that the contact resistance and the electro-mechanical switching behavior of the NEM switches dictate the performance of such circuits. Simplified analytical expressions are derived based on a 1-dimensional reduced order model (ROM) of the switch; the results given by this simplified model are compared to classical CMOS-based, and sub-threshold CMOS-based adiabatic logic circuits. NEMS-based circuits and CMOS-based circuits show different optimum operating conditions, depending on the device parameters and circuit operating frequency. Full article