Special Issue "Abridging the CMOS Technology"
Deadline for manuscript submissions: 31 August 2022 | Viewed by 3316
Interests: CMOS integrated circuits; high-k dielectric thin films; nanoelectronics; semiconductor device models; MOSFET; approximation theory; ballistic transport; circuit optimisation; electrostatics; elemental semiconductors; field effect transistors; nanowires; numerical analysis; sensitivity; silicon; surface potential; surface roughness; silicon compounds; dielectric thin films; tunnelling; interface states; X-ray photoelectron spectra; electron traps; hafnium compounds, SPICE
From either a physics device, fabrication technology, or process economics point of view, the downsizing of silicon-based CMOS devices will shortly be over. Although new revolutionized materials and new technologies for further integrated electronics advancement are on the horizon already, considering the development of nanoscale-sized devices, as well as giga-scale in integration density, complexity in fabrication technology, and the widespread application of the present CMOS technology, which is a cumulative outcome resulted from the relentless advancement and innovation of over seven decades, the emerging new materials and new devices are unlikely to replace CMOS technology in the short term. A possible scenario is that the existing CMOS technology will still be, at baseline, the mainstream integration technology for decades to come; alongside this, new material discovery and new technology innovation, on the one hand, could serve as technological options for overcoming some of the constraints in CMOS devices and fabrication technology, and, on the other hand, could enrich and enhance the CMOS technology in certain aspects.
This Special Issue, titled “Abridging the CMOS Technology”, serves as a forum for multi-disciplinary experts to address various aspects of recent advancements in nanomaterials and nanotechnology that could be abridged to further CMOS technology advancement at the end of More Moore. The format of articles includes full papers, communications, and reviews. Topics include but are not limited to:
- CMOS device characteristic enhancement with nanomaterials;
- Nanotechnology for CMOS fabrication;
- Silicon and 2D material integration;
- Silicon/2D material interaction and characterization;
- Enriching CMOS technology with 2D material-based devices, sensors and transducers;
- Nanophotonics–CMOS integration;
- Interconnects with nanomaterials;
- Nanoscale modeling and computation;
- CMOS thermal management with nanomaterials.
Prof. Dr. Hei Wong
Manuscript Submission Information
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