Next Article in Journal
Multiple and Periodic Measurement of RBC Aggregation and ESR in Parallel Microfluidic Channels under On-Off Blood Flow Control
Next Article in Special Issue
AFM-Based Characterization Method of Capacitive MEMS Pressure Sensors for Cardiological Applications
Previous Article in Journal
Erbium Luminescence Centres in Single- and Nano-Crystalline Diamond—Effects of Ion Implantation Fluence and Thermal Annealing
Previous Article in Special Issue
A Novel High-Precision Digital Tunneling Magnetic Resistance-Type Sensor for the Nanosatellites’ Space Application
Open AccessArticle

Encapsulation of NEM Memory Switches for Monolithic-Three-Dimensional (M3D) CMOS–NEM Hybrid Circuits

Department of Electronics Engineering, Sogang University, Seoul 04107, Korea
*
Author to whom correspondence should be addressed.
Micromachines 2018, 9(7), 317; https://doi.org/10.3390/mi9070317
Received: 30 May 2018 / Revised: 16 June 2018 / Accepted: 20 June 2018 / Published: 23 June 2018
(This article belongs to the Special Issue Development of CMOS-MEMS/NEMS Devices)
Considering the isotropic release process of nanoelectromechanical systems (NEMSs), defining the active region of NEM memory switches is one of the most challenging process technologies for the implementation of monolithic-three-dimensional (M3D) CMOS–NEM hybrid circuits. In this paper, we propose a novel encapsulation method of NEM memory switches. It uses alumina (Al2O3) passivation layers which are fully compatible with the CMOS baseline process. The Al2O3 bottom passivation layer can protect intermetal dielectric (IMD) and metal interconnection layers from the vapor hydrogen fluoride (HF) etching process. Thus, the controllable formation of the cavity for the mechanical movement of NEM devices can be achieved without causing any damage to CMOS baseline circuits as well as metal interconnection lines. As a result, NEM memory switches can be located in any place and metal layer of an M3D CMOS–NEM hybrid chip, which makes circuit design easier and more volume efficient. The feasibility of our proposed method is verified based on experimental results. View Full-Text
Keywords: CMOS–NEMS; NEMS; NEM memory switch; encapsulation; M3D CMOS–NEMS; NEMS; NEM memory switch; encapsulation; M3D
Show Figures

Figure 1

MDPI and ACS Style

Jo, H.C.; Choi, W.Y. Encapsulation of NEM Memory Switches for Monolithic-Three-Dimensional (M3D) CMOS–NEM Hybrid Circuits. Micromachines 2018, 9, 317.

Show more citation formats Show less citations formats
Note that from the first issue of 2016, MDPI journals use article numbers instead of page numbers. See further details here.

Article Access Map by Country/Region

1
Back to TopTop