Search Results (83)

Laser slicing has emerged as a promising low-kerf and low-damage technique for SiC wafer fabrication; however, its effects on the crystal integrity, near-surface modification, and charge-transport properties require further clarification. Here, a heavily N-doped 4° off-axis 4H-SiC wafer was sliced using an ultraviolet (UV) picosecond laser, and both laser-irradiated and laser-sliced surfaces were comprehensively characterized. X-ray diffraction and pole figure measurements confirmed that the 4H stacking sequence and macroscopic crystal orientation were preserved after slicing. Raman spectroscopy, including analysis of the folded transverse-optical and longitudinal-optical phonon–plasmon coupled modes, enabled dielectric function fitting and determination of the plasmon frequency, yielding a free-carrier concentration of ~3.1 × 10¹⁸ cm⁻³. Hall measurements provided consistent carrier density, mobility, and resistivity, demonstrating that the laser slicing process did not degrade bulk electrical properties. Multi-scale Atomic Force Microscopy (AFM), Angle-Resolved X-Ray Photoelectron Spectroscopy (ARXPS), Secondary Ion Mass Spectrometry (SIMS), and Transmission Electron Microscopy (TEM)/Selected Area Electron Diffraction (SAED) analyses revealed the formation of a near-surface thin amorphous/polycrystalline modified layer and an oxygen-rich region, with significantly increased roughness and thicker modified layers on the hilly regions of the sliced surface. These results indicate that UV laser slicing maintains the intrinsic crystalline and electrical properties of 4H-SiC while introducing localized nanoscale surface damage that must be minimized by optimizing the slicing parameters and the subsequent surface-finishing processes. Full article

Grinding semiconductor wafers with high hardness, such as SiC, remains a significant challenge due to the need to maximize material removal rates while minimizing subsurface damage. In the back-grinding process, two key parameters—the elastic modulus (Eb) of the grinding wheel bond and the fracture toughness (K_IC) of the wafer—play a critical role in governing the behavior of diamond and the extent of wafer damage. This study systematically investigated the effect of Eb and K_IC on diamond protrusion height (h_p), surface roughness (Ra), grinding forces, and the morphology of generated debris. The study encompassed four wafer types—Si, GaP, sapphire, and ground SiC—using five Back-Grinding Wheels (BGWs), with Eb ranging from 95.24 to 131.38 GPa. A log–linear empirical relationship linking ℎₚ to Eb and K_IC was derived and experimentally verified, demonstrating high predictive accuracy across all wafer–wheel combinations. Surface roughness (Ra) was measured in the range of 0.486 − 1.118𝜇m, debris size ranged from 1.41 to 14.74𝜇m, and the material removal rate, expressed as a thickness rate, varied from 555 to 1546𝜇m/h (equivalent to 75−209 mm³/min using an effective processed area of 81.07 cm²). For SiC, increasing the bond modulus from 95.24 to 131.38 GPa raised the average h_p from 9.0 to 1.2 um; the removal rate peaked at 122.07 GPa, where subsurface damage (SSD) was minimized, defining a practical grindability window. These findings offer practical guidance for selecting grinding wheel bond compositions and configuring process parameters. In particular, applying a higher Eb is recommended for harder wafers to ensure sufficient diamond protrusion, while an appropriate dressing must be employed to prevent adverse effects from excessive stiffness. By balancing removal rate, surface quality, and subsurface damage constraints, the results support industrial process development. Furthermore, the protrusion model proposed in this study serves as a valuable framework for optimizing bond design and grinding conditions for both current and next-generation semiconductor wafers. Full article

Due to their visible photoluminescence (PL) at room temperature, porous silicon particles (PSps) have gained interest for their potential biomedical applications, making them promising biological markers for in vivo or in vitro use. This study explores the PL evolution and stabilization of PSps following a two-step oxidation process involving air annealing and chemical oxidation in deionized water. PS layers were fabricated by electrochemical etching of p⁺-Si wafers and then annealed in air at 300 °C and 600 °C for five minutes. The layers were then stored in deionized water and sonicated to produce PSps. Scanning electron microscopy (SEM) and energy-dispersive X-ray spectroscopy (EDX) were used to analyze the morphology and composition of the particles, and spectrofluorimetry was used to monitor the PL over several weeks. Samples annealed at 300 °C exhibited a transition from nearly complete PL quenching to strong yellow–red emission. In contrast, the 600 °C sample showed no PL emission. The cytotoxicity of the PSps was evaluated using an MTT assay on human endothelial cells (EA.Hy926) with PSps and polyethylene glycol (PEG)-coated PSps at concentrations of (3.5–125 µg/mL) in both serum-free and fetal bovine serum (FBS)-containing media over 24, 48, and 72 h. Cell viability was significantly affected by both exposure time and particle concentration; however, this effect was prevented under conditions mimicking the physiological plasma environment. Full article

4H-SiC wafers usually require polishing treatment after slicing to improve the surface quality. However, traditional polishing processes have problems such as low removal efficiency and easy surface damage, which affect the reliability of electronic devices. In this paper, picosecond laser polishing technology is used to study the 4H-SiC wafers after slicing. Numerical models of single-pulse ablation and moving heat source polishing were established to reveal the interaction mechanism between laser and material, including the dynamic evolution of free electron density and the remarkable spatiotemporal non-equilibrium heat transfer characteristics of the electron–lattice system. The sliced 4H-SiC surface with a roughness of 2265 nm was polished by a 1064 nm picosecond laser, and the influence of laser power and scanning speed on the surface quality was systematically studied. By collaboratively optimizing the polishing power and speed, the surface roughness of the sample can be significantly reduced to 207.33 nm (a decrease of 90.85%). The research results indicate that an ultrafast laser is suitable for the pretreatment process of sliced silicon carbide wafers, laying a foundation for further research in the future. This research has a certain research significance for promoting the development of ultrafast laser polishing technology for single crystal silicon carbide wafers and improving the performance and reliability of semiconductor devices. Full article

The integration of thick homoepitaxial layers on silicon carbide (SiC) substrates is critical for enabling high-voltage power devices, yet it remains challenged by substrate surface quality and wafer geometry evolution. This study investigates the relationship between substrate preparation—particularly chemical mechanical planarization (CMP)—and the impact on wafer bow, total thickness variation (TTV), local thickness variation (LTV), and defect propagation during epitaxial growth. Seven 150 mm, 4° off-axis, prime-grade 4H-SiC substrates from a single ingot were processed under high-volume manufacturing (HVM) conditions and grown with epitaxial layers ranging from 12 μm to 100 μm. Metrology revealed a strong correlation between increasing epitaxial thickness and geometric deformation, especially beyond 31 μm. Despite initial surface scratches from CMP, hydrogen etching and buffer layer deposition significantly mitigated scratch propagation, as confirmed through defect mapping and SEM/FIB analysis. These findings provide a deeper understanding of the substrate-to-epitaxy integration process and offer pathways to improve manufacturability and yield in thick-epilayer SiC device fabrication. Full article

4H-SiC (silicon carbide), known as the third-generation semiconductor, has been widely used in high-power electronic devices. However, surface defects on wafers can seriously affect the key parameters and stability of silicon carbide devices. In this work, we pioneered a dual-laser comparative framework to systematically investigate the effects of continuous wave (CW) and femtosecond (FS) pulse laser micromachining on 4H-SiC epitaxial layers. CW laser restructuring optimized lattice integrity at sub-melting thresholds, while ultrafast FS pulse laser achieved submicron roughness control (from 8 μm to <0.5 μm) without obvious thermal collateral damage. To reveal the dynamic mechanism during the laser modification, multi-physics finite element models were adopted that decouple thermal and non-thermal mechanisms. This work expands the feasibility of laser micromachining for next-generation SiC device manufacturing. Full article

This study optimized the proportions of synergistic catalysts to efficiently activate potassium peroxymonosulfate (Oxone), generate more reactive oxygen species, and accelerate the chemical oxidation of silicon carbide (4H-SiC) wafers during chemical–mechanical polishing (CMP) for an improved material removal rate (MRR) and surface quality. The Oxone was activated using ultraviolet (UV) catalysis with a photocatalyst (TiO₂) and transition metal (Fe₃O₄) to enhance the oxidation capacity of the polishing slurry through the production of strong oxidizing sulfate radicals (${\mathrm{S}\mathrm{O}}_4^{·-}$). First, the effects of the TiO₂, Fe₃O₄, and Oxone concentrations on the MRR were studied by conducting multiple single-factor experiments. Next, 4H-SiC wafers were polished using different catalyst combinations to verify the synergistic activation of Oxone by multiple catalysts. Finally, the roughnesses, physical features, and elemental compositions of the wafer surfaces were observed before and after polishing. The results showed that CMP with a TiO₂ concentration of 0.15 wt%, Fe₃O₄ concentration of 0.75 wt%, and Oxone concentration of 48 mM decreased the wafer surface roughness from Sa 134 to 8.251 nm and achieved a maximum MRR of 2360 nm/h, which is significantly higher than that associated with traditional CMP methods. The surface of a 4H-SiC wafer polished using CMP with the optimal catalytic system was extremely smooth with no scratches and exhibited many oxides that reduced its hardness. In summary, the proposed UV-TiO₂-Fe₃O₄-Oxone composite catalytic system for 4H-SiC CMP exhibited significant synergistic enhancements and demonstrated excellent surface quality, indicating considerable potential for the polishing of hard materials. Full article

The slip mechanism between the chunk and wafer during high-speed dynamic scanning of the extreme ultraviolet lithography (EUV) motion stage remains unclear. Considering real-machined roughness, molecular dynamics (MD) simulations were performed to investigate the nanotribological behavior of 6H-SiC sliders on single-crystal silicon substrates. The effects of sinusoidal asperity parameters and normal loads on wear and slip were systematically analyzed. Results indicate that, for friction between sinusoidal asperities and ideal flat surfaces, the amplitude of surface parameters exhibits negligible influence on friction. In contrast, reduced normal loads and lower periods significantly increase both friction force and coefficient of friction (COF). Full article

Polycrystalline nitrogen-doped cubic silicon carbide (3C-SiC) thin films are grown on 2″ Si wafers by a low-pressure chemical vapor deposition (LPCVD) technique with the aim for them to be used as support and active materials in microelectronic devices for neural interfaces. The effect of deposition temperature on the structural, mechanical, and electrical properties is investigated. The growth rate is varying, from 1 μm/h to 14 μm/h, along with the deposition temperature. We show that the structural and electrical properties of polycrystalline SiC are modified when changing the deposition temperature. Films with resistivity as low as (10.0 ± 0.5) mΩ·cm, a low residual stress of (−397 ± 158) MPa, and a low root mean square surface roughness of (53 ± 19) nm are achieved. Accelerated aging tests in heated phosphate buffer solution (PBS) show an etching rate of less than 1 nm/day and a steady low electrical resistivity for 77 days, indicating that the nitrogen-doped polycrystalline SiC is a chemically stable material, capable of chronic stability in a saline electrolyte. Full article

Silicon carbide is a wide-bandgap semiconductor useful in a new class of power devices in the emerging area of high-temperature and high-voltage electronics. The diffusion of SiC devices is strictly related to the growth of high-quality substrates and epitaxial layers involving high-temperature treatment processing. In this work, we studied the thermal stability of substrates of 4H-SiC in an inert atmosphere in the range 1600–2000 °C. Micro-Raman spectroscopy characterization revealed that the thermal treatments induced inhomogeneity in the wafer surface related to a graphitization process starting from 1650 °C. It was also found that the graphitization influences the epitaxial layer successively grown on the wafer substrate, and in particular, by time-resolved photoluminescence spectroscopy it was found that graphitization-induced defectiveness is responsible for the reduction of the carrier recombination lifetime. Full article

This study aims to study the formation quality of the film of dental silanes. Two dental silanes, 3-methacryloxyproyltrimethoxysilane (MPS) and 3-acryloyloxypropyltrimethoxysilane (ACPS), were deposited on the silica glass-equivalent model surface (i.e., n-type silicon(100) wafer) by varying the deposition time (5 h and 22 h). The film quality was then evaluated by ellipsometry, surface contact angle (CA) and surface free energy (SFE), atomic force microscopy (AFM) and X-ray photoelectron spectroscopy (XPS) in survey and high-resolution modes on Si2p, O1s and C1s. Ellipsometry confirmed that both silanes at the two different deposition times would produce 0.85–1.22 nm thick self-assembled monolayer on the silicon wafer surface. While the water CA of silanized surfaces (60.7–71.5°) was larger than the surface without silane (29.6°), the SFE values of all silanes (40.0–44.5 mN/m) were slightly less than that of the wafer surface (46.3 mN/m). AFM revealed that the MPS with 22 h silanization yielded a significantly higher roughness (0.597 μm) than other groups (0.254–0.297 μm). High-resolution XPS on C1s identified a prominent peak at 288.5 eV, which corresponds to methacrylate O-C*=O, i.e., the silane monolayer is extended fully in the vertical direction, while others are in defect states. This study proves that different dental silanes under various dipping times yield different chemical qualities of the film even if they look thin physically. Full article

In this study, we systematically explore the impact of C/Si ratio, pre-carbonization time, H₂ etching time, and growth pressure on the buffer layer and subsequent epitaxial layer of 6-inch 4H-SiC wafers. Our findings indicate that the buffer layer’s C/Si ratio and growth pressure significantly influence the overall quality of the epitaxial wafer. Specifically, an optimal C/Si ratio of 0.5 and a growth pressure of 70 Torr yield higher-quality epitaxial layers. Additionally, the pre-carbonization time and H₂ etching time primarily affect the uniformity and surface quality of the epitaxial wafer, with a pre-carbonization time of 3 s and an H₂ etching time of 3 min found to enhance the surface quality of the epitaxial layer. Full article

To address surface morphological defects that have a destructive effect on the epitaxial wafer from the aspect of 4H-SiC epitaxial growth, this study thoroughly examined many key factors that affect the density of defects in 4H-SiC epitaxial wafer, including the ratio of carbon to silicon, growth time, application of a buffer layer, hydrogen etching and other process parameters. Through systematic experimental verification and data analysis, it was verified that when the carbon–silicon ratio was accurately controlled at 0.72, the density of defects in the epitaxial wafer was the lowest, and its surface flatness showed the best state. In addition, it was found that the growth of the buffer layer under specific conditions could effectively reduce defects, especially surface morphology defects. This provides a new idea and method for improving the surface quality of epitaxial wafers. At the same time, we also studied the influence of hydrogen etching on the quality of epitaxial wafers. The experimental results show that proper hydrogen etching can optimize surface quality, but excessive etching may lead to the exposure of substrate defects. Therefore, it is necessary to carefully control the conditions of hydrogen etching in practical applications to avoid adverse effects. These findings have important guiding significance for optimizing the quality of epitaxial wafers. Full article

The basal plane dislocation (BPD) density is one of the most important defects affecting the application of SiC wafers. In this study, numerical simulations and corresponding experiments were conducted to investigate the influence of cooling processes, seed-bonding methods, and graphite crucible materials on the BPD density in an 8-inch N-type 4H-SiC single crystal grown by the physical vapor transport (PVT) method. The results showed that the BPD density could be effectively reduced by increasing the cooling rate, optimizing the seed-bonding method, and adopting a graphite crucible with a similar coefficient of thermal expansion as the SiC single crystal. The BPD density in the experiments showed that a high cooling rate reduced the BPD density from 4689 cm⁻² to 2925 cm⁻²; optimization of the seed-bonding method decreased the BPD density to 1560 cm⁻². The BPD density was further reduced to 704 cm⁻² through the adoption of a graphite crucible with a smaller thermal expansion coefficient. Full article

In this study, a 4H-SiC homoepitaxial layer was grown on a 150 mm 4° off-axis substrate using a horizontal hot wall chemical vapor deposition reactor. Comparing C₃H₈ and C₂H₄ as C sources, the sample grown with C₂H₄ exhibited a slower growth rate and lower doping concentration, but superior uniformity and surface roughness compared to the C₃H₈-grown sample. Hence, C₂H₄ is deemed more suitable for commercial epitaxial wafer growth. Increasing growth pressure led to decreased growth rate, worsened thickness uniformity, reduced doping concentration, deteriorated uniformity, and initially improved and then worsened surface roughness. Optimal growth quality was observed at a lower growth pressure of 40 Torr. Furthermore, the impact of buffer layer growth on epitaxial quality varied significantly based on different C/Si ratios, emphasizing the importance of selecting the appropriate conditions for subsequent device manufacturing. Full article