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CMOS Image Sensor: From Design to Application

A special issue of Sensors (ISSN 1424-8220). This special issue belongs to the section "Sensing and Imaging".

Deadline for manuscript submissions: 8 June 2025 | Viewed by 1631

Special Issue Editor


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Guest Editor
School of Integrated Circuits, Dalian University of Technology, Dalian 116024, China
Interests: circuit; image sensor

Special Issue Information

Dear Colleagues,

It is my pleasure to invite you to share your latest studies with this Special Issue.

CMOS image sensors have reshaped the way we perceive and interact with the world, serving as a powerful engine for many fields such as machine vision, biomedical imaging, security surveillance, and mobile terminals. Moreover, the maturation of advanced driving assistance systems (ADASs) continues to increase the demand gap for automotive-grade image sensors. So far, mid- and high-end vehicles are equipped with an average of more than 10 onboard cameras. The latest reports show that the market shares of automotive cameras and CMOS image sensors are growing at an annual rate of 9.7% and 8.7%, respectively. In the meantime, complex application scenarios and stringent characterization requirements have also posed new challenges to CMOS image sensor technology.

The explosion of semiconductor technology has significantly accelerated the development of fabrication processes and circuit design. Process improvements will inevitably lead to advanced circuit designs and architectures. Currently, CMOS image sensors run on the highway of three “higher” properties, i.e., higher speed, higher resolution, and higher dynamic range. In this context, CMOS image sensors have more possibilities and broader prospects.

This Special Issue aims to highlight CMOS image sensors from design to application. All are welcome to share your latest findings and contributions about novel image sensor architecture, image sensor circuits, and image sensor fabrication processes. Topics include, but are not limited to, the following:

  • Low noise imagers;
  • High dynamic range imagers;
  • Global shutter;
  • High-speed imagers;
  • Single photon avalanche diode;
  • CCD-in-CMOS;
  • Emerging pixel architecture;
  • Pixel characterization and modelling;
  • Processing-in-pixel;
  • Analog and digital circuits for imagers;
  • Time-of-flight;
  • Event-based vision sensor;
  • Light detection and ranging;
  • Integration of sensing, computing, storage, and communications;
  • Novel stacking technique for imagers.

Prof. Dr. Yuchun Chang
Guest Editor

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Keywords

  • low noise imagers
  • high dynamic range imagers
  • global shutter
  • high-speed imagers
  • single photon avalanche diode
  • CCD-in-CMOS
  • emerging pixel architecture
  • pixel characterization and modelling
  • processing-in-pixel
  • analog and digital circuits for imagers
  • time-of-flight
  • event-based vision sensor
  • light detection and ranging
  • integration of sensing, computing, storage, and communications
  • novel stacking technique for imagers

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Published Papers (2 papers)

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Research

15 pages, 6477 KiB  
Article
Study on 3D Effects on Small Time Delay Integration Image Sensor Pixels
by Siyu Guo, Quan Zhou, Pierre Boulenc, Alexander V. Klekachev, Xinyang Wang and Assaf Lahav
Sensors 2025, 25(7), 1953; https://doi.org/10.3390/s25071953 - 21 Mar 2025
Viewed by 526
Abstract
This paper demonstrates the impact of 3D effects on performance parameters in small-sized Time Delay Integration (TDI) image sensor pixels. In this paper, 2D and 3D simulation models of 3.5 μm × 3.5 μm small-sized TDI pixels were constructed, utilizing a three-phase pixel [...] Read more.
This paper demonstrates the impact of 3D effects on performance parameters in small-sized Time Delay Integration (TDI) image sensor pixels. In this paper, 2D and 3D simulation models of 3.5 μm × 3.5 μm small-sized TDI pixels were constructed, utilizing a three-phase pixel structure integrated with a lateral anti-blooming structure. The simulation experiments reveal the limitations of traditional 2D pixel simulation models by comparing the 2D and 3D structure simulation results. This research validates the influence of the 3D effects on the barrier height of the anti-blooming structure and the full well potential and proposes methods to optimize the full well potential and the operating voltage of the anti-blooming structure. To verify the simulation results, test chips with pixel sizes of 3.5 μm × 3.5 μm and 7.0 μm × 7.0 μm were designed and manufactured based on a 90 nm CCD-in-CMOS process. The measurement results of the test chips matched the simulation data closely and demonstrated excellent performance: the 3.5 μm × 3.5 μm pixel achieved a full well capacity of 9 ke- while maintaining a charge transfer efficiency of over 0.99998. Full article
(This article belongs to the Special Issue CMOS Image Sensor: From Design to Application)
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10 pages, 6481 KiB  
Communication
A PFM-Based Calibration Method for Low-Power High-Linearity Digital Pixel
by Yu Cheng, Jionghan Liu, Xiyuan Wang, Hongyu Hou, Qian Jiang and Yuchun Chang
Sensors 2025, 25(1), 252; https://doi.org/10.3390/s25010252 - 4 Jan 2025
Viewed by 587
Abstract
The nonlinearity problem of digital pixels restricts the reduction in power consumption at the pixel-level circuit. The main cause of nonlinearity is discussed in this article and low power consumption is attained by reducing the static current in capacitive transimpedance amplifiers (CTIAs) and [...] Read more.
The nonlinearity problem of digital pixels restricts the reduction in power consumption at the pixel-level circuit. The main cause of nonlinearity is discussed in this article and low power consumption is attained by reducing the static current in capacitive transimpedance amplifiers (CTIAs) and comparators. Linearity was successfully improved through the use of an off-chip calibration method. A 64 × 64 array prototype digital readout integrated circuit (DROIC) was fabricated using a 0.18 μm 1P6M CMOS process. Experimental results indicated that the post-calibration linearity reached 99.6% with an input current of up to 1.5 μA. The static power consumption per digital pixel was 6 μW. Full article
(This article belongs to the Special Issue CMOS Image Sensor: From Design to Application)
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