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Nanomaterials
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Simulation Study of Nanoelectronics
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Simulation Study of Nanoelectronics

A special issue of Nanomaterials (ISSN 2079-4991). This special issue belongs to the section "Theory and Simulation of Nanostructures".

Deadline for manuscript submissions: closed (31 July 2024) | Viewed by 4697

Special Issue Editor

Dr. Yawei Lv

E-Mail Website
Guest Editor
School of Physics & Electronics, Hunan University, Changsha, China
Interests: semiconductor physics and simulation

Special Issue Information

Dear Colleagues,

TCAD simulations have enabled extensive achievements in silicon-based semiconductor development. The rapid evolution of semiconductor technology has already seen carrier behaviors in integrated devices discussed within the quantum field. Moreover, numerous materials have been proposed to supplement the function of silicon in electronic devices. These developments mark progress in overcoming the challenges in TCAD simulations due to complex quantum effects and out-of-order systems.

The present Special Issue of Nanomaterials, entitled “Simulation Study of Nanoelectronics”, aims to present contemporary state-of-the-art methods for solving problems in the quantum transport simulation domain, such as establishing tight-binding models, introducing scattering, simulating out-of-order systems, and performing other relevant tasks. Based on these methods, we are also seeking to publish interesting simulation results on semiconductor materials that are also promising candidates for electronic applications in the future, such as two-dimensional materials, silicon carbide, and metal oxide semiconductors. We hope this Special Issue will advance our understanding of the complex physical behaviors of electrons in nanoscale materials and device structures.

Dr. Yawei Lv
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Nanomaterials is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • simulation
  • semiconductors
  • quantum transport
  • electronic devices
  • TCAD

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Published Papers (2 papers)

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Research

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11 pages, 3249 KiB  
Article
Simulation of Novel Nano Low-Dimensional FETs at the Scaling Limit
by Pengwen Guo, Yuxue Zhou, Haolin Yang, Jiong Pan, Jiaju Yin, Bingchen Zhao, Shangjian Liu, Jiali Peng, Xinyuan Jia, Mengmeng Jia, Yi Yang and Tianling Ren
Nanomaterials 2024, 14(17), 1375; https://doi.org/10.3390/nano14171375 - 23 Aug 2024
Cited by 1 | Viewed by 1604
Abstract
The scaling of bulk Si-based transistors has reached its limits, while novel architectures such as FinFETs and GAAFETs face challenges in sub-10 nm nodes due to complex fabrication processes and severe drain-induced barrier lowering (DIBL) effects. An effective strategy to avoid short-channel effects [...] Read more.
The scaling of bulk Si-based transistors has reached its limits, while novel architectures such as FinFETs and GAAFETs face challenges in sub-10 nm nodes due to complex fabrication processes and severe drain-induced barrier lowering (DIBL) effects. An effective strategy to avoid short-channel effects (SCEs) is the integration of low-dimensional materials into novel device architectures, leveraging the coupling between multiple gates to achieve efficient electrostatic control of the channel. We employed TCAD simulations to model multi-gate FETs based on various dimensional systems and comprehensively investigated electric fields, potentials, current densities, and electron densities within the devices. Through continuous parameter scaling and extracting the sub-threshold swing (SS) and DIBL from the electrical outputs, we offered optimal MoS2 layer numbers and single-walled carbon nanotube (SWCNT) diameters, as well as designed structures for multi-gate FETs based on monolayer MoS2, identifying dual-gate transistors as suitable for high-speed switching applications. Comparing the switching performance of two device types at the same node revealed CNT’s advantages as a channel material in mitigating SCEs at sub-3 nm nodes. We validated the performance enhancement of 2D materials in the novel device architecture and reduced the complexity of the related experimental processes. Consequently, our research provides crucial insights for designing next-generation high-performance transistors based on low-dimensional materials at the scaling limit. Full article
(This article belongs to the Special Issue Simulation Study of Nanoelectronics)
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Review

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46 pages, 17202 KiB  
Review
A Review of Wide Bandgap Semiconductors: Insights into SiC, IGZO, and Their Defect Characteristics
by Qiwei Shangguan, Yawei Lv and Changzhong Jiang
Nanomaterials 2024, 14(20), 1679; https://doi.org/10.3390/nano14201679 - 19 Oct 2024
Cited by 1 | Viewed by 2708
Abstract
Although the irreplaceable position of silicon (Si) semiconductor materials in the field of information has become a consensus, new materials continue to be sought to expand the application range of semiconductor devices. Among them, research on wide bandgap semiconductors has already achieved preliminary [...] Read more.
Although the irreplaceable position of silicon (Si) semiconductor materials in the field of information has become a consensus, new materials continue to be sought to expand the application range of semiconductor devices. Among them, research on wide bandgap semiconductors has already achieved preliminary success, and the relevant achievements have been applied in the fields of energy conversion, display, and storage. However, similar to the history of Si, the immature material grown and device manufacturing processes at the current stage seriously hinder the popularization of wide bandgap semiconductor-based applications, and one of the crucial issues behind this is the defect problem. Here, we take amorphous indium gallium zinc oxide (a-IGZO) and 4H silicon carbide (4H-SiC) as two representatives to discuss physical/mechanical properties, electrical performance, and stability from the perspective of defects. Relevant experimental and theoretical works on defect formation, evolution, and annihilation are summarized, and the impacts on carrier transport behaviors are highlighted. State-of-the-art applications using the two materials are also briefly reviewed. This review aims to assist researchers in elucidating the complex impacts of defects on electrical behaviors of wide bandgap semiconductors, enabling them to make judgments on potential defect issues that may arise in their own processes. It aims to contribute to the effort of using various post-treatment methods to control defect behaviors and achieve the desired material and device performance. Full article
(This article belongs to the Special Issue Simulation Study of Nanoelectronics)
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