FPGA and Reconfigurable Computing
A special issue of Journal of Low Power Electronics and Applications (ISSN 2079-9268).
Deadline for manuscript submissions: closed (31 December 2017) | Viewed by 9624
Special Issue Editor
Interests: reconfigurable computing; hardware accelerators; power-aware embedded computing platforms; application-specific digital systems; hardware DSP for telecommunications
Special Issues, Collections and Topics in MDPI journals
Special Issue Information
Dear Colleagues,
The pervasive use of electronics in many areas of human activity (personal, professional and social) has led to a remarkable expansion of the scope and importance of power- or energy-constrained computing environments. This has happened in traditional areas like telecommunications and health care, but also in new areas like well-being, gaming and leisure. Energy, power and thermal constraints have a large impact on the design of ever more complex adaptive embedded and cyber-physical systems in these domains. The challenges created by this trend are being met in part by flexible heterogeneous and reconfigurable computing platforms in order to achieve new levels of power or energy efficiency while processing growing amounts of data with increasingly sophisticated algorithms. In this context, specialized accelerators and dynamically reconfigurable hardware have also been finding increasing application. This Special Issue of the JLPEA is dedicated to advances in all aspects of low-power reconfigurable computing from new reconfigurable fabrics in emerging technologies up to system-level monitoring and run-time management infrastructures, including new circuits and architectures for FPGAs and CGRAs, reconfigurable hardware accelerators and new applications of dynamic reconfiguration. Original contributions from the following non-exhaustive list of topics are solicited:
- emerging low-power technologies and circuits for reconfigurable computing;
- (non-volatile) memory technologies for configuration storage;
- nanoscale reconfigurable computing platforms;
- low-power FPGA or CGRA circuits and architectures;
- reconfigurable low-power hardware accelerators;
- dynamic reconfiguration for low-power: methodologies, system architectures and algorithms;
- EDA tools and algorithms for low-power FPGA or CGRA systems;
- run-time support systems for power-aware reconfiguration management;
- power- or energy-constrained applications of reconfigurable computing.
Prof. Dr. João Canas Ferreira
Guest Editor
Manuscript Submission Information
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Keywords
- low-power FPGA and CGRA architectures
- dynamic reconfiguration for low-power
- nanoscale reconfigurable fabrics
- power-constrained run-time reconfiguration management
- heterogeneous reconfigurable systems
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