Special Issue "FPGA and Reconfigurable Computing"
A special issue of Journal of Low Power Electronics and Applications (ISSN 2079-9268).
Deadline for manuscript submissions: closed (31 December 2017) | Viewed by 6825
Interests: reconfigurable computing; hardware accelerators; power-aware embedded computing platforms; application-specific digital systems; hardware DSP for telecommunications
Special Issues, Collections and Topics in MDPI journals
The pervasive use of electronics in many areas of human activity (personal, professional and social) has led to a remarkable expansion of the scope and importance of power- or energy-constrained computing environments. This has happened in traditional areas like telecommunications and health care, but also in new areas like well-being, gaming and leisure. Energy, power and thermal constraints have a large impact on the design of ever more complex adaptive embedded and cyber-physical systems in these domains. The challenges created by this trend are being met in part by flexible heterogeneous and reconfigurable computing platforms in order to achieve new levels of power or energy efficiency while processing growing amounts of data with increasingly sophisticated algorithms. In this context, specialized accelerators and dynamically reconfigurable hardware have also been finding increasing application. This Special Issue of the JLPEA is dedicated to advances in all aspects of low-power reconfigurable computing from new reconfigurable fabrics in emerging technologies up to system-level monitoring and run-time management infrastructures, including new circuits and architectures for FPGAs and CGRAs, reconfigurable hardware accelerators and new applications of dynamic reconfiguration. Original contributions from the following non-exhaustive list of topics are solicited:
- emerging low-power technologies and circuits for reconfigurable computing;
- (non-volatile) memory technologies for configuration storage;
- nanoscale reconfigurable computing platforms;
- low-power FPGA or CGRA circuits and architectures;
- reconfigurable low-power hardware accelerators;
- dynamic reconfiguration for low-power: methodologies, system architectures and algorithms;
- EDA tools and algorithms for low-power FPGA or CGRA systems;
- run-time support systems for power-aware reconfiguration management;
- power- or energy-constrained applications of reconfigurable computing.
Prof. Dr. João Canas Ferreira
Manuscript Submission Information
Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.
Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Journal of Low Power Electronics and Applications is an international peer-reviewed open access quarterly journal published by MDPI.
Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 1600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.
- low-power FPGA and CGRA architectures
- dynamic reconfiguration for low-power
- nanoscale reconfigurable fabrics
- power-constrained run-time reconfiguration management
- heterogeneous reconfigurable systems