applsci-logo

Journal Browser

Journal Browser

Advanced Research on Integrated Circuits and Systems

A special issue of Applied Sciences (ISSN 2076-3417). This special issue belongs to the section "Electrical, Electronics and Communications Engineering".

Deadline for manuscript submissions: closed (30 April 2025) | Viewed by 1633

Special Issue Editors


E-Mail Website
Guest Editor
School of Integrated Circuits, Zhejiang University, Hangzhou 311200, China
Interests: neurmorphic computing; CMOS technology; emerging memristors
Special Issues, Collections and Topics in MDPI journals

E-Mail Website
Guest Editor
School of Integrated Circuits, Zhejiang University, Hangzhou 311200, China
Interests: 2D materials; X-ray/IR detection; AI-based integrated circuit manufacturing

Special Issue Information

Dear Colleagues,

This special issue  focuses on recent advances in the diverse field of Integrated Circuits and Systems (ICS). It delves into the most recent research and breakthroughs in a variety of interconnected sub-disciplines within ICS, including novel logic device architectures, emerging memory technologies, efficient power electronics design, innovative design-for-testability and design-for-manufacturing (DTCO) methodologies, and advances in electronic design automation (EDA) tools and algorithms. Contributions that investigate the interplay of these domains, particularly those that address the issues of the challenges of miniaturization, performance enhancement, power reduction, and reliability in next-generation ICS, are highly encouraged. 

Dr. Yishu Zhang
Dr. Wenzhang Fang
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Applied Sciences is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • logic devices
  • memory technologies
  • power elecronics
  • integrated circuits manufacturing
  • design for manufacturability

Benefits of Publishing in a Special Issue

  • Ease of navigation: Grouping papers by topic helps scholars navigate broad scope journals more efficiently.
  • Greater discoverability: Special Issues support the reach and impact of scientific research. Articles in Special Issues are more discoverable and cited more frequently.
  • Expansion of research network: Special Issues facilitate connections among authors, fostering scientific collaborations.
  • External promotion: Articles in Special Issues are often promoted through the journal's social media, increasing their visibility.
  • e-Book format: Special Issues with more than 10 articles can be published as dedicated e-books, ensuring wide and rapid dissemination.

Further information on MDPI's Special Issue policies can be found here.

Published Papers (2 papers)

Order results
Result details
Select all
Export citation of selected articles as:

Research

17 pages, 9268 KiB  
Article
Analog Gaussian-Shaped Filter Design and Current Mode Compensation for Dot-Matrix TSP Readout Systems
by Seunghoon Ko
Appl. Sci. 2025, 15(4), 1845; https://doi.org/10.3390/app15041845 - 11 Feb 2025
Cited by 1 | Viewed by 548
Abstract
In-cell touch and display integrated panels, along with their integrated readout systems, are widely adopted in mobile devices for their cost-effectiveness and compact design. This paper proposes an analog Gaussian-shaped filter and a current mode compensation technique for dot-matrix Touch Screen Panel (TSP) [...] Read more.
In-cell touch and display integrated panels, along with their integrated readout systems, are widely adopted in mobile devices for their cost-effectiveness and compact design. This paper proposes an analog Gaussian-shaped filter and a current mode compensation technique for dot-matrix Touch Screen Panel (TSP) readout systems. Specifically, this article presents a noise management strategy for both intrinsic and external noise, offering simulation guidelines for determining intrinsic circuit noise levels in relation to scan time and enhancing external noise immunity through the Gaussian-shaped filter response. The system achieved an intrinsic SNR of 66 dB with a 200 kHz TSP driving frequency and a 160 μs scan time, while the 4-bit quantized Gaussian coefficients filter provided 33 dB noise suppression for out-of-band noise. The compensation error in the dot-matrix capacitance compensation was measured at 1.24 pF, which corresponds to a 0.078% deviation. The simulated power consumption of the proposed readout system is 24 mW, with a layout area of 1.017 mm2 for the 10-channel readout front-end. Full article
(This article belongs to the Special Issue Advanced Research on Integrated Circuits and Systems)
Show Figures

Figure 1

17 pages, 5815 KiB  
Article
A 250 °C Low-Power, Low-Temperature-Drift Offset Chopper-Stabilized Operational Amplifier with an SC Notch Filter for High-Temperature Applications
by Zhong Yang, Jiaqi Li, Jiangduo Fu, Jiayin Song, Qingsong Cai and Shushan Qiao
Appl. Sci. 2025, 15(2), 849; https://doi.org/10.3390/app15020849 - 16 Jan 2025
Viewed by 792
Abstract
This paper proposes a three-stage op amp based on the SOI (silicon-on-insulator) process, which achieves a low offset voltage and temperature coefficient across a wide temperature range from −40 °C to 250 °C. It can be used in aerospace, oil and gas exploration, [...] Read more.
This paper proposes a three-stage op amp based on the SOI (silicon-on-insulator) process, which achieves a low offset voltage and temperature coefficient across a wide temperature range from −40 °C to 250 °C. It can be used in aerospace, oil and gas exploration, automotive electronics, nuclear industry, and in other fields where the ability of electronic devices to withstand high-temperature environments is strongly required. By utilizing a SC (Switched Capacitor) notch filter, the op amp achieves low input offset in a power-efficient manner. The circuit features a multi-path nested Miller compensation structure, consisting of a low-speed channel and a high-speed channel, which switch according to the input signal frequency. The input-stage operational amplifier is a fully differential, rail-to-rail design, utilizing tail current control to reduce the impact of common-mode voltage on the transconductance of the input stage. The two-stage operational amplifier uses both cascode and Miller compensation, minimizing the influence of the feedforward signal path and improving the amplifier’s response speed. The prototype op amp is fabricated in a 0.15 µm SOI process and draws 0.3 mA from a 5 V supply. The circuit occupies a chip area of 0.76 mm2. The measured open-loop gain exceeds 140 dB, with a 3 dB bandwidth greater than 100 kHz. The amplifier demonstrates stable performance across a wide temperature range from −40 °C to 250 °C, and exhibits an excellent input offset of approximately 20 µV at room temperature and an offset voltage temperature coefficient of 0.7 μV/°C in the full temperature range. Full article
(This article belongs to the Special Issue Advanced Research on Integrated Circuits and Systems)
Show Figures

Figure 1

Back to TopTop