Yang, J.;                     Li, T.;                     Yan, J.;                     Li, J.;                     Li, C.;                     Wang, B.    
        PipeCache: High Hit Rate Rule-Caching Scheme Based on Multi-Stage Cache Tables. Electronics 2020, 9, 999.
    https://doi.org/10.3390/electronics9060999
    AMA Style
    
                                Yang J,                                 Li T,                                 Yan J,                                 Li J,                                 Li C,                                 Wang B.        
                PipeCache: High Hit Rate Rule-Caching Scheme Based on Multi-Stage Cache Tables. Electronics. 2020; 9(6):999.
        https://doi.org/10.3390/electronics9060999
    
    Chicago/Turabian Style
    
                                Yang, Jialun,                                 Tao Li,                                 Jinli Yan,                                 Junnan Li,                                 Chenglong Li,                                 and Baosheng Wang.        
                2020. "PipeCache: High Hit Rate Rule-Caching Scheme Based on Multi-Stage Cache Tables" Electronics 9, no. 6: 999.
        https://doi.org/10.3390/electronics9060999
    
    APA Style
    
                                Yang, J.,                                 Li, T.,                                 Yan, J.,                                 Li, J.,                                 Li, C.,                                 & Wang, B.        
        
        (2020). PipeCache: High Hit Rate Rule-Caching Scheme Based on Multi-Stage Cache Tables. Electronics, 9(6), 999.
        https://doi.org/10.3390/electronics9060999