Memristor-Controlled Reconfigurable N-path Filter Structure Design and Comparison

Abstract

This paper presents the integration of memristors into N-path filter architectures to develop reconfigurable N-path filters with a tuneable bandwidth. Two different memristor-based N-path filter designs are proposed and systematically compared. One of the architectures was experimentally validated by interfacing it with a memristor package in a laboratory environment, demonstrating a tuneable bandwidth ranging from 1.5 kHz to 2 kHz at a centre frequency of 1 MHz, corresponding to a tuneable quality factor (Q factor) of between 500 and 667. Additionally, this design enables centre frequency tuning from 0.9 MHz to 1.2 MHz while maintaining a fixed Q factor of 600. The second architecture was evaluated through simulations in the Cadence Virtuoso environment using a memristor model. The results indicate a tuneable bandwidth from 0.99 MHz to 1.38 MHz at a centre frequency of 1 GHz, corresponding to a tuneable Q factor ranging from 730 to 1010. Furthermore, this design allows the centre frequency to be adjusted within the range of 0.99 GHz to 1.38 GHz while preserving a fixed Q factor of 1000. These findings highlight the potential of memristor-based N-path filters in achieving reconfigurable and high-Q filtering capabilities for RF applications.

1. Introduction

With the development of modern wireless communication technologies, reconfigurable filters are widely used in radio transceivers. These filters enable systems to adapt to different working requirements by dynamically adjusting key parameters such as the bandwidth, gain value, and centre frequency. Several different types of filter structures have been researched in designing reconfigurable filters, such as a digital filter controlled by software [1,2], Micro-Electro-Mechanical System (MEMS) filter [3,4,5], Surface Acoustic Wave (SAW) filter [6,7], Switched Capacitor filter [8,9], and so on. Of all these filter design solutions, the N-path filter structure is one of the designs which has high linearity, a high quality factor suitable for integrating on-chip and CMOS technology and a high potential for transformation [10,11,12]. An N-path filter periodically switches N identical parallel signal paths through a group of capacitors, which works similarly to the sample-and-hold operation in a sampling analog-to-digital converter. If the transfer function of one signal path forms a low-pass filter, then the periodic process transforms the low-pass filter into a bandpass function throughout the whole N-path filter [13]. A large amount of research has been conducted to design reconfigurable bandpass filters based on the original N-pass filter structure, including using a tuneable local oscillator to adjust the centre frequency of the filter and using switched capacitor or other structures to adjust the bandwidth [14,15,16,17,18,19]. These innovations aim to enhance the filter’s adaptability while maintaining performance standards at the same time.

In recent years, memristors have become novel and promising components for designing reconfigurable devices. Memristors are a type of two-terminal non-volatile electronic circuit element which can save the history of the voltage applied to them in their resistance level [20,21]. Because of this characteristic, they can be used as a programmable resistor. As the memristive device can maintain its resistance level without a power supply, its power consumption is much lower than that of other electronic elements which are volatile or active. Some research has been conducted to combine memristor crossbars with reconfigurable filters [22,23], showing the potential of these elements in adaptive circuit designing.

In this research, instead of using memristor crossbars, a novel approach which employs one or a few memristors within the basic N-path filter structure to enable bandwidth adjustment is introduced. Although the centre frequency of an N-path filter can be controlled by adjusting the digital clock, the bandwidth is fixed by the values of the resistor and capacitor; thus, the quality factor Q of an N-path filter varies when the centre frequency changes. To make the bandwidth adjustable, one memristor is used to replace the resistor in the N-path filter to generate a reconfigurable N-path filter whose bandwidth can be adjusted by the memristor resistance. By changing the memristor value, the quality factor of the filter can be maintained at a constant value in a range of the centre frequency. The range of the centre frequency in which the reconfigurable N-path filter can maintain a constant Q factor is decided by the tuneable range of the memristor.

In this paper, different methods of combining analog memristors with the basic N-path filter structure to design reconfigurable N-path filters are considered and compared. The Methodology Section first introduces the principle and function of a memristor and the function of a basic N-path filter structure, then it mainly shows two different schematics of an N-path filter combined with a memristor and discusses the functions of the N-path filter after adding the memristor. In the Results Section, first, the simulation results for the two structures of the N-path filter are compared. Then, we describe how one of the N-path filters was built on a stripboard and measured with a memristor package at a 1 MHz centre frequency in the laboratory. After that, the second N-path filter structure was simulated at a 1 GHz centre frequency. In the Discussion Section, the reconfigurable N-path filters in this work are compared with other reconfigurable N-path filter designs, the limitations of the two N-path filter structures in this research are listed, and the influence of the parasitic capacitance in the memristor on the N-path filter are discussed based on simulations of different parasitic capacitance values.

2. Materials and Methods

The purpose of this study was to combine memristors with N-path filter structures to design a reconfigurable N-path filter. To achieve this, the Methodology Section first introduces the working principles and functions of memristors (Section 2.1) and the basic structure and function of an N-path filter (Section 2.2). Then, the basic method of controlling an N-path filter by replacing its resistive elements with memristors is introduced. Following this, based on mathematical models and software simulations, this section discusses two different memristor-based reconfigurable N-path filter structures. The first (Section 2.3) uses fewer memristor elements, resulting in a simpler design, but is not suitable for higher centre frequencies. The second structure (Section 2.4) can operate at higher centre frequencies but requires more complex memristor elements, making practical operation more challenging.

2.1. Function and Model of Memristor

Figure 1a shows the $Ti{O}_2$/$Ti{O}_{2-x}$ memristor structure produced by HP Laboratory in 2008 [21]. The memristor has a semiconductor film with a thickness of D in between two metal layers, while the letter W shows the thickness of the $Ti{O}_2$ layer. The right part of the semiconductor is stoichiometric $Ti{O}_2$, in which the oxygen to titanium ratio is perfectly 2:1, and it has a large resistance. The left part of the semiconductor is also titanium dioxide but has less oxygen, which means it has a small resistance and is written as $Ti{O}_{2-x}$. When the voltage is applied to the memristor from the $Ti{O}_{2-x}$ side, the positively charged oxygen vacancies are pushed to the $Ti{O}_2$ part and transform $Ti{O}_2$ into $Ti{O}_{2-x}$. As the low-resistance region expands, the resistance of the entire memristor reduces. To make the oxygen vacancies migrate significantly through the material and change the local electrochemical structure, the voltage on the memristor needs to be greater than a threshold voltage to overcome the energy barrier. In contrast, when the voltage is applied to the $Ti{O}_2$ side, the oxygen vacancies are pushed to the $Ti{O}_{2-x}$ region, and the $Ti{O}_2$ region expands and increases the resistance of the memristor. The memristor reaches its maximum resistance when nearly the whole $Ti{O}_{2-x}$ layer is transformed into $Ti{O}_2$ (when W = D) and reaches the minimum resistance value when all the $Ti{O}_2$ molecules are transformed into $Ti{O}_{2-x}$ (when W = 0). Thus, the W/D ratio ranging from 0 to 1 can show the position of the current memristor resistance level within its whole tuneable resistance range. With further research on memristor technology, memristors of various structures and materials have now been developed [24,25,26,27,28]. However, the fundamental working principle and functionality of memristors remain similar. Figure 1b shows a 3D-model of a memristor. A memristor can be integrated at the crosspoint of two electrodes with a thin metal oxide film between them [29]. The multi-layer stack structure of memristors allows them to integrate with CMOS technologies, which also have multi-layer structures. With good compatibility with CMOS technology, a small area [30], and low power consumption [31,32], memristors have become a good choice for the design of reconfigurable devices.

A lumped element model of a memristor can be seen in Figure 1c. Ideally, a memristor should only be a tuneable resistor. However, because memristors have a metal–insulator–metal structure similar to that of MIM capacitors, a memristor also has parasitic capacitance between its two metal layers. The parasitic capacitance value is mainly decided by the area and thickness of the memristor and the dielectric constant of the insulator material, which means it will not change with the operations of the memristor. For this reason, the parasitic capacitance is assumed to be constant, and the model of a memristor becomes that of a tuneable resistor in parallel with a constant parasitic capacitance.

The memristors used in the measurements in this research were $Pt$/$Ti{O}_2$/$A{l}_2{O}_3$/$Pt$ memristors with a 10 × 10 µm² size [29]. The simulation model of a memristor created in the Cadence Virtuoso environment was based on the research in [33], which used a Verilog A model to simulate the function of a tuneable resistor part in the whole memristor model(tuneable resistor + parasitic capacitor). In this model, the memristor can maintain a constant resistance under 0.5 V and will show obvious resistance level variations with a voltage higher than 2 V; thus, in this research, the memristor was operated with voltage smaller than 0.5 V in the normal mode and was used with a 2.5 V voltage to adjust the resistance level in the programming mode. The model was able to accurately reproduce the voltage-dependent resistance behaviour of the memristor within the 10 k$\Omega$ to 17 k$\Omega$ range and could also provide relatively accurate results for resistance variations within the 10 k$\Omega$ to 30 k$\Omega$ range. To ensure the reliability of simulation results, the memristor resistance was constrained to within the 10 k$\Omega$ to 17 k$\Omega$ range throughout this study. The memristor was assumed to have a 10 pF parasitic capacitance in parallel in the worst case [34].

2.2. Functions of Basic N-path Filter

The basic schematic of a single-port, single-ended 4-path filter includes a resistor, R, a switch group, S1 to S4, and four capacitors, C1 to C4, with the same value C, as shown in Figure 2a. The output port is in between the resistor and the switch group [35]. Switches S1 to S4 turn on sequentially, with all the pulse widths, $T_{on}$, being the same and equal to a 1/4 of the period of the switch control signals. As only one switch turns on at any moment, the entire circuit can be considered as a low-pass filter composed of a resistor and capacitor corresponding to the activated switch.

Equation (1) shows the relationship between the resistor value (R), capacitor value (C), path number (N), and −3 dB bandwidth ($f_{-3dB}$) of the N-path filter [36,37,38]. The function of the quality factor Q is shown in Equation (2) and is equal to the ratio between the centre frequency ($f_s$) and the −3 dB bandwidth. A benefit of an N-path filter is that the centre frequency controlled by the digital clock can be very high, which results in a very large quality factor value when combined with a small bandwidth decided by the resistor and capacitor values. By replacing the resistor with a memristor, an N-path filter becomes a basic reconfigurable filter whose bandwidth is tuneable.

Some characteristics of memristors need to be considered when combining memristors with high-frequency circuits. First, memristive devices include parasitic capacitance in their structure. For an analog memristor whose resistance can change continuously, the parasitic capacitance can be up to 10 pF [34]. The lumped element model of a memristor can be considered as a resistor in parallel with a capacitor, and the impedance of this memristor is shown in Equation (3), where R is the resistance and $C_p$ is the parasitic capacitance value. Second, a memristor shows linear I-V characteristics at a low voltage. However, when a high voltage is applied to it, the resistance level of the memristor will be changed. Therefore, the voltage across the memristor needs to be constrained to within 0.5 V during normal operation, while large voltage pulses (>1.2 V in this research) should only be applied during memristor resistance programming.

$$f_{-3dB}={\displaystyle \frac{1}{\pi NRC}}$$

(1)

$$Q={\displaystyle \frac{f_s}{f_{-3dB}}}=\pi NRC{f}_s$$

(2)

Assuming the switch S1 turns on, at this moment, the filter will work as a low-pass filter with a resistor, R, and capacitor, C. The function of a filter includes the ON resistance ($R_o$) of the switch, which is shown as Equation (4). When the frequency is very high, the gain of the filter will tend to become a constant value which equals the ratio of $R_o$/(R+$R_o$). As $R_o$ is very small (≤500 $\Omega$) compared with R (≥10 k$\Omega$ in this research), the ratio is approximately equal to $R_o$/R. Combining Equations (3) and (4), the memristor-controlled filter based on the basic N-path filter structure has the transfer function shown as Equation (5). Equation (6) expresses the condition of Equation (5) when the frequency is very high, which shows that the gain tends to 1 when the frequency approaches infinity. To generate a memristor-based reconfigurable N-path filter, some adjustments need to be made to this basic structure.

$$Z_m={\displaystyle \frac{1}{\frac{1}{R}+s{C}_p}}$$

(3)

$$H{\left(s\right)}_{[+R_o]}={\displaystyle \frac{R_o+\frac{1}{sC}}{R+R_o+\frac{1}{sC}}}={\displaystyle \frac{1}{1+\frac{sRC}{1+s{R}_{o}C}}}$$

(4)

$$\begin{array}{cc}\hfill H{\left(s\right)}_{[+Memristor]}& ={\displaystyle \frac{1}{1+\frac{s{Z}_{m}C}{1+s{R}_{o}C}}}\hfill \\ \hfill & ={\displaystyle \frac{1}{1+\frac{sRC}{(1+s{R}_{o}C)(1+sR{C}_p)}}}\hfill \end{array}$$

(5)

$$H{\left(s\right)}_{[+Memristor][f\to \infty ]}\approx {\displaystyle \frac{1}{1+\frac{1}{s{R}_o{C}_p}}}\approx 1$$

(6)

2.3. One-Memristor-Based N-path Filter

Figure 2b shows the modified memristor-based 4-path filter, which is called [Filter 1] in the following sections. The basic concept of the schematic in Figure 2b is a conventional N-path filter with extra switch groups [35]. In the 4-path filter architecture, 4 switches, S1_2 ∼ S4_2, are added to the circuit. The switches Sx_1 and Sx_2 are controlled with the same signal and will turn on and off simultaneously. The reason for adding extra switches is to change the location of the output ports from the point between the resistor and the switches to the right side of all the capacitors, thus reducing the influence of the switch ON resistances. Considering the schematic shown in Figure 2b, when a pair of switches, Sx_1 and Sx_2, turn on, the transfer function of the filter is shown in Equation (7), where $R_{out}$ is the load resistance of the Vout node, and similarly to in Equation (4), the model of the switches is added in the equation as the switch ON resistance $R_o$. As the Vout is assumed to connect with the gate of the transistors, $R_{out}$ will be very large and can be considered as an open circuit. In this condition, when the parasitic capacitance of the memristor $C_p$ is very small and the frequency is not very large, the circuit transform function approximates to Equation (8), which shows that the circuit is working as a low-pass filter. In this research, the DC voltage of the input signal was set to 0.5 V to ensure that the transient voltage across the memristor would not change the memristor resistance.

$$\begin{array}{cc}\hfill H{\left(s\right)}_{new}& ={\displaystyle \frac{1}{1+s{R}_{o}C+\frac{sRC}{1+sR{C}_p}}}\times {\displaystyle \frac{R_{out}}{R_o+R_{out}}}\hfill \\ \hfill & \approx {\displaystyle \frac{1}{1+s{R}_{o}C+\frac{sRC}{1+sR{C}_p}}}\hfill \end{array}$$

(7)

$$H{\left(s\right)}_{new[C_p\to 0]}\approx {\displaystyle \frac{1}{1+s(R+R_o)C}}$$

(8)

$$H{\left(s\right)}_{new[f\to \infty ]}\approx {\displaystyle \frac{1}{1+s{R}_{o}C+\frac{C}{C_p}}}$$

(9)

An additional voltage node, $V_{ref}$, is added with a switch, S_P, for memristor programming. In normal operation, $V_{in}$ inputs an AC signal with an offset DC voltage of 0.5 V, S_P turns off, and $V_{ref}$ is set to 0 V. In this case, ideally, the $V_{ref}$ and S_P path is considered as an open circuit, and the filter works as a normal N-path filter. In the memristor programming mode, all the switches, S1_1 to S4_2, turn off, S_P turns on, and high-voltage pulses can flow between $V_{in}$ and $V_{ref}$ to change the resistance value of the memristor. The operations of the $V_{in}$, $V_{ref}$ ports, S_P, and S1 to S4 switch groups are listed in

Table 1. $V_{in}$, $V_{ref}$, S_P, and switch group operations of memristor-based 4-path filter [Filter 1].

	Normal Operation	Programming Mode 1	Programming Mode 2
$V_{in}$	0.5V DC + signal	2.5V pulse	0V
$V_{ref}$	0V	0V	2.5V pulse
S_P	OFF	ON	ON
S1 to S4	ON in sequence	OFF	OFF

. Programming mode 1 shows the conditions for programming the memristor from left to right, and programming mode 2 shows the condition for programming the memristor from right to left. There was no speed requirement for the memristor programming in this research; hence, the memristor programming pulse was set to have a duty of 100 $\mu s$.

Equation (9) shows a potential drawback of Filter 1’s structure: when $C_p$ is large, the gain of the filter is no longer influenced by the resistance of the memristor but is determined by the values of $R_o$, C, and $C_p$. In this case, the Filter 1 circuit still cannot be used at a radio frequency.

2.4. Multiple-Memristor-Based N-path Filter

To make a memristor-based N-path filter work at a high frequency, one of the solutions is to add memristors in between each of the switch groups, as shown in Figure 2c, which is called [Filter 2] in the following sections. An N-path filter uses high-speed periodic switching to effectively downconvert the high-frequency input signal into multiple paths, where each capacitor only interacts with a near-baseband equivalent signal. However, in the Filter 1 structure, the memristor is still working with the original high-frequency signal. The impedance of the memristor reduces with increases in the signal frequency; hence, the tuneable $f_{-3dB}$ range will be smaller than expected. In the configuration in Figure 2c, by placing memristors in between the [Sx_1, Sx_2] switch groups, memristors only receive a part of the signal and work in near-baseband signal environments; hence, the influence of $C_p$ is nearly eliminated.

Although the quantity of memristors that Filter 2 uses is larger than that in Filter 1, the components included in each signal path are still the same, which are one memristor, one capacitor, and the ON resistance from the switches. However, when the input signal frequency is equal to the centre frequency, in Filter 1, the memristor parasitic capacitance $C_p$ still has a large influence, while in Filter 2, the memristors are nearly working in baseband environments and the effect of $C_p$ is reduced. In this case, the frequency of the signal received by the memristors in Filter 2 corresponds to the deviation between the input frequency and the centre frequency, rather than the deviation between the input frequency and 0 Hz. The transfer function of Filter 2 is thus as shown in Equation (10), which is similar to Equation (7) but uses the deviation frequency $s_d$ instead of s. Here, $s_d$ is equal to the absolute value of deviation between the input signal frequency ${\omega }_{in}$ and the centre frequency ${\omega }_s$.

When programming the memristors shown in Figure 2c, the $V_{in}$ and $V_{ref}$ settings are the same as the conditions shown in Table 1. However, S_P becomes a single-port double-through (SPDT) switch, allowing us to choose a connection from the main circuit to the output port during normal operation, or to the $V_{ref}$ port in the programming mode. In addition, differently from the programming operations in Filter 1, when programming one memristor in Filter 2, the corresponding switch groups need to be turned on, and all the other switch groups should be turned off. A potential drawback of Filter 2 is that ensuring all the memristor resistances are completely the same is hard in practical operations, which can lead to distortion in the output signal.

$$H{\left(s\right)}_{new}\approx {\displaystyle \frac{1}{1+s_d{R}_{o}C+\frac{s_{d}RC}{1+s_{d}R{C}_p}}},s_d=j\hspace{0.17em}\times \mid {\omega }_{in}-{\omega }_s\mid$$

(10)

3. Results

In the Results Section, first the simulation results for the circuits shown in Figure 2 with resistors and memristors will be shown and compared to demonstrate the difference in the high-frequency performance of these structures. Next, we describe how a four-path filter built on a stripboard with the Filter 1 circuit structure was measured in the laboratory with a 1 MHz input signal and memristor array package. Finally, the simulation results for a memristor-based four-path filter with the Filter 2 circuit structure and a 1 GHz switch signal will be analyzed.

The switches in all the simulations had a 500 $\Omega$ ON state resistance unless otherwise specified. The memristor model used in the simulations in this research had a 10 k$\Omega$ to 17 k$\Omega$ resistance under a 0.5 V DC voltage [39] and was assumed to have a parasitic capacitance of 10 pF [34].

3.1. Simulation Results with 1 MHz Centre Frequency

The gains of the circuits built with a normal resistor and memristor and with different filter structures (normal N-path filter (Figure 2a) and Filter 1 (Figure 2b) structure) are shown in Figure 3. According to the simulation results, the gain responses of Filter 1 and Filter 2 were nearly identical at a centre frequency of 1 MHz. To ensure a great enough visual distinction for the different curves in Figure 2, only the gain curves of the original N-path filter and Filter 1 are presented. The results were simulated with a resistor and memristor at 10 k$\Omega$, capacitors at 6 nF, and a 1 MHz switch frequency. The capacitor value was chosen to make the Q factor of the filter around 1000, which resulted in balanced selectivity and insertion loss. It could be found that in addition to the gain pass band at 1 GHz, there were extra gain peaks at 2 GHz, 3 GHz, and 5 GHz. These were the second, third, and fifth harmonic frequencies of the fundamental frequency. Referring to the normal N-path filter structure (Filter 1 with a resistor), when the input signal frequency was equal to twice the switching frequency ($f_{in}$ = 2$f_s$), S1 and S3 would always record the average value of the positive cycle of the sine wave and S2 and S4 would always record the value of the negative cycle of the sine wave; hence, the gain at $f_{in}$ = 2$f_s$ was also high compared to for the other frequencies. The same thing happened when $f_{in}$ was equal to 3$f_s$ and 5$f_s$. However, when $f_{in}$ = 4$f_s$, every switch recorded the average value of a whole sine wave cycle, which equalled 0 V [21]. Because of this, there is no gain peak at 4 GHz in Figure 3. For the filter structure with a resistor, the original N-path filter structure had a weaker stopband rejection level (at around −28 dB) compared with Filter 1 (at around −65 dB) but also had a simplified circuit structure which reduced the number of switches. However, when replacing the resistor with a memristor, the results show that the stopband attenuation floor of the gain in the original N-path filter structure will continue to increase with the frequency, which means that the original N-path filter with the memristor works as a high-pass filter at a high frequency. In Filter 1, the memristor results showed a weaker stopband rejection level (around −50 dB at the fourth harmonic position) compared with the resistor results (around −65 dB), but the rejection level of the curve with the memristor maintained a constant value smaller than −40 dB. The comparison results show that Filter 1 is more suitable for combination with a memristor to generate a reconfigurable device in comparison with the original N-path filter shown in Figure 2a.

The simulation gain values of the four-path filter at 1 MHz with Filter 1, 6 nF capacitors, and different memristor values are shown in Figure 4. The results show the centre frequency was not accurately 1 MHz but changed to 999.7 KHz. This small centre frequency shift was caused by the parasitic capacitance $C_p$ of the memristor. As the existence of $C_p$ increases the total capacitance in the RC network of the filter, it affects the time constant of the circuit, reduces the cut-off frequency, and thus shifts the centre frequency to a lower value. The larger the $C_p$, the larger the centre frequency shift. The maximum gain of the curves with varying memristor values had around a 0.5 dB difference, which was caused by the change in the ratio between the memristor value and the ON state resistance of the switches. The larger the ratio [$R_{memristor}$/$R_{switch}$], the smaller the maximum gain. The trends of the curves in Figure 4 are the same as expected, and detailed data are recorded in

Table 2. Cut-off frequency ($f_{-3dB}$) and quality factor (Q) with different memristor values and centre frequency ($f_c$) range when quality factor is maintained at 1000.

Memristor ($\mathbf{\Omega }$)	${\mathit{f}}_{-3\mathit{dB}}$ with Resistor (Hz)	Actual ${\mathit{f}}_{-3\mathit{dB}}$ (Hz)	Q Factor	${\mathit{f}}_{\mathit{c}}$ with Q = 1 k (Hz)
10 k	1105	1191	839	1.19 M
11 k	1053	1140	877	1.14 M
12 k	1007	1095	913	1.1 M
13 k	964	1059	944	1.06 M
14 k	935	1027	973	1.03 M
15 k	906	1000	1000	1 M
16 k	880	975	1025	975 k
17 k	857	954	1048	954 k

. As Table 2 shows, for a four-path filter that works at around 1 MHz with an original quality factor, Q, of around 1000, a memristor with a resistance range of [10, 17] k$\Omega$ can generate a tuneable cut-off frequency range of [954, 1191] Hz, resulting in a tuneable quality factor range of [839, 1048]. When maintaining a constant Q factor of 1000, with a change in the memristor value, the centre frequency can change in the range of [0.95, 1.19] MHz. Compared with the original centre frequency of 1 MHz, the achievable rate of change of the centre frequency without Q factor variation is around 24%. The actual cut-off frequency when using a memristor is different from the $f_{-3dB}$ when using a resistor. The differences are caused by the parasitic capacitance $C_p$ of the memristor. Referring to Equations (3) and (9), $C_p$ changes the impedance of the memristor when the frequency is high, increases the $f_{-3dB}$ value, and reduces the tuneable $f_{-3dB}$ range. As shown in Equation (9), when the frequency tends to infinity, the transfer function is no longer decided by the memristor resistance, which means that the $f_{-3dB}$ value is not adjustable. The noise floor of Filter 1 with a memristor at a 1 MHz centre frequency is around −87 dB. Changing the memristor resistance will not cause a large difference in the noise floor value.

As the minimum step in the memristor resistance programming is ideally 1% of the current value, the minimum bandwidth tuning steps at different memristor values are recorded in

Table 3. Minimum $f_{-3dB}$ tuning step at different memristor resistance values for the Filter 2 structure at 1 MHz $f_c$.

Memristor ($\mathbf{\Omega }$)	10 k	11 K	12 k	13 k	14 k	15 k	16 k	17 k
Min step (Hz)	6.7	5	5	4.5	4.5	3.4	4	3

. It can be found that the minimum bandwidth tuning step is smaller than 6.7 Hz, which means that this tuneable filter has a very small bandwidth step(smaller than 2.7% of the whole tuneable bandwidth range).

3.2. Measurement Results with Filter 1 Structure and 1 MHz Centre Frequency

The memristor package used in the laboratory measurement was a $Ti{O}_x$/$A{l}_2{O}_3$ device [29]. The electrode overlap area of one memristor in the package was 10 × 10 µm², and the thickness of the material in between the overlap electrodes was 4nm. The memristor package was programmed using ArC Two, which is a measurement instrument for working with RRAM arrays [40,41]. The memristor package was first integrated with an ArC Two daughter board, was programmed to the desired resistance, and then was placed on a break-out board and connected to the four-path filter. The memristor chosen to be combined with the four-path filter had a [10, 30] k$\Omega$ tuneable resistance range. A CD4024B CMOS ripple-carry binary counter combined with a waveform generator was used to generate the switches’ control signals. A CD4052B analog multiplexer was used as the four switch groups. Four small resistors were used to generate the ON resistance from the input signal part. As the memristor package was programmed using ArC Two, the switch S_P and $V_{ref}$ were not included in the stripboard circuit. The capacitors used in the measurement were 6nF. The centre frequency of the multiplexer was set to 1MHz. A picture of the four-path filter on the stripboard with the memristor package is shown in Figure 5a, while a schematic of the circuit is shown in Figure 5b.

The measured transient waveform of the input sine wave and output of the four-path filter with a 10 k$\Omega$ memristor is shown in Figure 6a. The red dotted lines show the speculated output DC voltage level based on the output curve. Combining the input curve with the speculated output voltage values, it can be observed that one period of the input sine wave was sampled to four DC voltage values by the four-path filter. The output curve was noisy compared with the ideal voltage steps, and additionally, unwanted voltage drops between constant voltage levels could be observed in the measured output curve. The first reason for this was the switching time of the counter and multiplexer. In the simulation, the switches turned on/off without any delay or rise/fall time. However, in reality, it was found from the datasheets that the counter had an output $Q_n$ to $Q_{n+1}$ switching delay of 40 ns, while both the counter and the multiplexer has a rise and fall time of 20ns. Because of that, there was around an 80ns switching time during the turning on of the switches, which was close to the switching gaps observed in Figure 6a. Second, in the ideal condition when the input frequency equals the centre frequency, the voltage on each capacitor is constant. However, in practical measurements, it is not possible to precisely match the input signal frequency to the centre frequency. The higher the frequency, the larger the error of frequency matching. Because of that, in the measurement, the voltages on the capacitors in the four-path filter changed continually. When one group of switches turned on, the voltage on the corresponding capacitor underwent a period of oscillation before stabilizing. These two factors made the voltage unstable during the switching times.

Figure 6b compares the gain–frequency responses when using a 10 k$\Omega$ resistor and memristor. It can be found that the curves of the four-path filter when used with a resistor and memristor were similar. Both of the two curves had an average stopband rejection level of around −30 dB. At the centre frequency, the maximum gain when using a memristor was larger than in the condition using a resistor, which was because the parasitic capacitance reduced the impedance of the memristor; hence, the impedance of the memristor at 1 MHz was not actually 10 k$\Omega$ but a lower value. Also, at the second harmonic frequency, which was 2 MHz, the difference between the gains when using a memristor or a resistor was larger, as the impedance of the memristor was further reduced.

The gain curves of the four-path filter at a 1MHz centre frequency with different memristor values are shown in Figure 7. The gain values fluctuated sharply at similar frequencies, which was caused by the noise in the output signal, as shown in Figure 6a. Comparing Figure 7 with Figure 4, it can be found that the trend of the curve in the measurement results was the same as in the simulation results. Detailed data on the measured $f_{-3dB}$, the Q factor, and the tuneable $f_c$ range when maintaining a constant Q factor value are recorded in

Table 4. Measured $f_{-3dB}$ and Q factor with different memristor values and $f_c$ range when Q factor was maintained at 600.

Memristor ($\mathbf{\Omega }$)	${\mathit{f}}_{-3\mathit{dB}}$ (Hz)	Q Factor	${\mathit{f}}_{\mathit{c}}$ with Q = 600 (Hz)
10 k	2 k	500	1.2 M
15 k	1.8 k	556	1 M
20 k	1.6 k	625	0.96 M
30 k	1.5 k	667	0.9 M

. The $f_{-3dB}$ at memristor values of 20 k$\Omega$ and 30 k$\Omega$ was similar, while the $f_{-3dB}$ at memristor values of between 10 k$\Omega$ and 20 k$\Omega$ had relatively large variation. This was mainly because the parasitic capacitance had a greater impact on reducing the impedance when associated with a larger resistor. In the mathematical simulation, with a 10 pF parasitic capacitance at 1 MHz, a 10 k$\Omega$ memristor had an 8.5 k$\Omega$ impedance and a 20 k$\Omega$ memristor had a 13 k$\Omega$ impedance, but a 30 k$\Omega$ memristor only had a 14 k$\Omega$ impedance. Comparing the data in Table 4 with those in Table 2, it was found that the measured $f_{-3dB}$ values were larger overall than the simulation results. This shows that the parasitic capacitance in the measurement was larger than the value of 10 pF in the simulation. The Q factor in the measurement was small and could not reach 1000; hence, the tuneable $f_c$ range was set at a Q of 600. With a constant Q at 600, the $f_c$ could change in the range of [0.9, 1.2] MHz without varying the cut-off frequency.

The measurement results show there was a larger parasitic capacitance in the actual memristor device compared with the simulation, and the curves in the measurement results were noisy. One of the reasons for this was the interference from the stripboard and laboratory surroundings. The components on the stripboard used solid electrical wires for connection, which was bad for high-frequency signal transmission. It was observed that when moving the probes between the oscilloscope and stripboard during the measurement, the noise conditions of the transient curves also changed, which means that the laboratory environment could affect the measurement results. On the other hand, as the memristor package had to be placed on a specific break board, the connection between the signal source, memristor, and four-path filter was also based on long jumping cables, which had large parasitic components and large high-frequency-signal distortion.

Due to the noisy curves of the gain–frequency response, the bandwidth variation was hard to observe when the change in the memristor resistance was small. Because of this, the minimum bandwidth tuning step was not measured for the memristor package and four-path filter on the stripboard. The power consumption of the four-path filter was 38 mW. The energy was mainly used to sustain the operation of the binary counter and multiplexer. As the binary counter and multiplexer needed a 10 V voltage supply, the power consumption of the circuit was also large.

3.3. Simulation Results with Filter 2 Structure and 1 GHz Centre Frequency

Figure 8 compares the gain curves of the Filter 1 and Filter 2 structures with a memristor or resistor at a 1 GHz centre frequency. It can be observed from Figure 8a that, first, the two curves generated by memristor-based filters nearly overlapped, while the two curves generated by resistor-based filters also overlapped, and second, the resistor curves had stronger stopband rejection levels (at around −65 dB) and a narrower bandwidth compared with the memristor curves (with around a −45 dB rejection level). This means that using memristors in these structures with high-frequency signals can cause a low rejection ratio in the unwanted signal frequency range. Figure 8b shows that the [Filter 1 + memristor] curve had a wider bandwidth compared with the [Filter 1 and 2 + resistor] curve. The [Filter 2 + memristor] curve had a narrow bandwidth, which was similar to the [Filter 1 and 2 + resistor] curve when the input frequency was close to the centre frequency, but the bandwidth became larger and more similar to the [Filter 1 + memristor] curve when the input frequency was far from the centre frequency. This result shows that the memristors in Filter 2 could work as resistors when the input frequency was close to the centre frequency of the filter.

Referring to the concept of Filter 2 described in the Methodology Section, when the input frequency is the same as the centre frequency of the N-path filter, signals travelling through the memristors and capacitors approach constant DC voltages. However, when the input frequency is different from the centre frequency, the voltages on the capacitors will change whenever the switches turn on. The larger the difference between the input signal frequency and the switch centre frequency, the faster the voltages on the capacitors change. Because of that, only when the input signal frequency is very close to the centre frequency can the memristors work in baseband environments, which makes the gain curve have a narrow bandwidth similar to that in a condition using resistors. When the input frequency is far from the centre frequency, memristors work in high-frequency environments; hence, the curves of [Filter 1 + a memristor] and [Filter 2 + a memristor] were similar at these frequencies, as shown in Figure 8.

Figure 9 shows the simulation results for Filter 2 at a 1 GHz centre frequency with capacitor values of C = 8 pF and switches of $R_o$ = 800 $\Omega$. Comparing Figure 9 with Figure 4, it can be found that the downward trend for the curves seen in Figure 9 slowed down at frequency far from the centre frequency $f_c$. Also, at a frequency far away from the $f_c$ (lower than 996 MHz and higher than 1.001 GHz), the gain values of all the curves converged to the same value regardless of the memristor value. This was because the parasitic capacitor still dominated the memristor impedance at frequencies that were too far away from the $f_c$ and made the memristor value variation lose its original function. The frequency at which curves converged together was decided by the $C_p$. The detailed data in Figure 9 are recorded in

Table 5. $f_{-3dB}$ and Q factor with different memristor values and $f_c$ range when Q factor was maintained at 1000 in Filter 2 circuit with 1GHz original $f_c$.

Memristor ($\mathbf{\Omega }$)	${\mathit{f}}_{-3\mathit{dB}}$ with Resistor (Hz)	Actual ${\mathit{f}}_{-3\mathit{dB}}$ (Hz)	Q Factor	${\mathit{f}}_{\mathit{c}}$ with Q = 1 k (Hz)
10 k	590 k	1380 k	725	1.38 G
11 k	543 k	1310 k	763	1.31 G
12 k	510 k	1230 k	813	1.23 G
13 k	480 k	1170 k	855	1.17 G
14 k	456 k	1120 k	893	1.12 G
15 k	436 k	1070 k	935	1.07 G
16 k	413 k	1030 k	971	1.03 G
17 k	395 k	990 k	1010	0.99 G

. The $f_{-3dB}$ values when using memristors were higher than the $f_{-3dB}$ values when using resistors. Contrary to the assumption that memristors work in ideal DC conditions when they are placed in between switch groups, the results show that the memristor impedance was still affected by the parasitic capacitor $C_p$. However, the influence of $C_p$ in Filter 2 was much smaller than in Filter 1. For the gain results for Filter 1 at 1 GHz, no variation could be observed between different curves with varying memristor values. For Filter 2, Table 5 shows that the $f_{-3dB}$ value could vary in a range of [0.99, 1.38] MHz, which resulted in a tuneable Q factor range from 725 to 1010 and a tuneable $f_c$ range of [0.99, 1.38] GHz when maintaining the Q factor at 1000. The achievable rate of change for $f_c$ without changing the Q factor was 39%, which was even better than the result for Filter 1 at 1 MHz. The noise floor of Filter 2 with a memristor at a 1 GHz centre frequency was around −92 dB. Compared with the result for Filter 1 at 1 MHz, the noise floor remained nearly the same, which may have been because the components used in the simulation were all ideal elements.

The minimum bandwidth change steps of the Filter 2 circuit at 1 GHz with different memristor values are recorded in

Table 6. Minimum $f_{-3dB}$ tuning step at different memristor resistance values for Filter 2 structure at 1GHz $f_c$.

Memristor ($\mathbf{\Omega }$)	10 k	11 K	12 k	13 k	14 k	15 k	16 k	17 k
Min step (Hz)	7k	6.5k	8.4k	5.6k	5k	4k	3k	3.7k

. Due to the large centre frequency and small bandwidth change step, the bandwidth step values are not absolutely precise, but the trend of the bandwidth step changes can still be observed. The Filter 2 circuit had a minimum bandwidth change step smaller than 8.4 kHz, which meant it could tune the bandwidth with a step smaller than 2.2% of the whole tuneable bandwidth range. Similarly to the Filter 1 circuit at 1 MHz, the Filter 2 circuit operating at 1 GHz also showed the ability for very fine bandwidth tuning.

4. Discussion

The N-path filter is designed for high-frequency applications. However, the influence of the parasitic capacitance of the memristor in the filter increases with the frequency, which limits the operation of this memristor-based N-path filter at high frequencies. When simulating the Filter 1 circuit with a 10 pF parasitic capacitance, $C_p$, and a 1 GHz centre frequency, $f_c$, the variation in the memristor value nearly did not change the cut-off frequency of the filter, as at frequencies of up to 1 GHz, the impedance of the memristor was dominated by the fixed $C_p$ value instead of the tuneable memristor resistance.

The circuit with a Filter 2 structure solves the problem of designing a high-frequency memristor-based reconfigurable N-path filter. However, it also some some limitations. The main drawback of the Filter 2 circuit is the high quantity of memristors being used. The required amount of memristors equals the number of paths in the N-path filter, which will be a large value for a high-precision N-path filter. Only one memristor can be programmed in one programming process; hence, for a memristor-based four-path filter, the memristor programming process needs to be performed four times to change all the memristors to a specific value, which increases the complexity of operation. Furthermore, it is hard to program all the memristors to the same accurate resistance. The resistance difference between memristors in each path will reduce the accuracy of the output waveform. On the other hand, for an N-path filter that works with a 17 k$\Omega$ resistor, to achieve Q = 1000, the capacitor value needs to be around 5 pF. A reduction in the capacitor value increases the $f_{-3dB}$, but the frequency at which curves converge together is decided by $C_p$, as shown in Figure 9, which is nearly constant. When using a memristor with $C_p$ = 10 pF, capacitors with a capacitance that is too small will make $f_{-3dB}$ close to the convergence frequency, which will reduce the tuneable $f_{-3dB}$ range. When $f_{-3dB}$ is larger than the convergence frequency, the filter will lose the function of $f_{-3dB}$ adjustment. Because of that, the $f_{-3dB}$ value of Filter 2 at 1 GHz was limited to around 2 MHz or below. It can also be found from Figure 9 that the maximum $f_{-3dB}$ variation range was located in the frequency range between around 998 kHz and 999 kHz, and the location of this [maximum $f_{-3dB}$ range] remained almost unchanged with the variation in C. This means that when using larger capacitors, C, the tuneable $f_{-3dB}$ range will be reduced. As a result, when using 16 pF capacitors instead of the 8 pF capacitors shown in Figure 9 and Table 5 to simulate the Filter 2 circuit, the tuneable $f_{-3dB}$ range is reduced to [450, 671] kHz.

In the Results Section, the memristor model was assumed to have a 10 pF parasitic capacitance. This is a relatively high hypothetical value. The memristor packages used in the measurement had an electrode area of 10 × 10 µm² for each memristor, which is also not the smallest area memristor manufacturing techniques can achieve. With more advanced manufacturing processes, memristors can have a smaller size and also a smaller parasitic capacitance [42].

Table 7. Bandwidth ($f_{-3dB}$) of Filter 1 and Filter 2 at 1 GHz with different parasitic capacitance values.

${\mathit{C}}_{\mathit{p}}$ (F)	Memristor ($\mathbf{\Omega }$)	Filter 1 ${\mathit{f}}_{-3\mathit{dB}}$ (Hz)	Filter 2 ${\mathit{f}}_{-3\mathit{dB}}$ (Hz)
500 f	10 k	10.16 M	3.01 M
	17 k	10.13 M	1.98 M
100 f	10 k	3.24 M	2.91 M
	17 k	3.1 M	1.97 M
50 f	10 k	2.1 M	2.33 M
	17 k	1.9 M	1.88 M
10 f	10 k	1.2 M	1.59 M
	17 k	946 k	1.22 M
0	10 k	1.11 M	1.25 M
	17 k	865 k	800 k

shows the results for $f_{-3dB}$ and the Q factor with [Filter 1] and [Filter 2] circuit structures and different memristor $C_p$ values. All the values were simulated with $R_o$ = 800 $\Omega$ and C = 3 pF. It can be observed that for the Filter 1 circuit at a 1 GHz $f_c$, with a high $C_p$ value, the bandwidth could not be maintained at a small value. When the $C_p$ increased, the bandwidth value increased but the tuneable bandwidth range decreased. Referring to Equation (2), high frequency and $C_p$ values reduce the impedance of the memristor (R value in Equation (2)), which limits the range of the bandwidth. Table 7 shows that with a $C_p$ at around 10 fF, the tuneable bandwidth range was similar to the condition that used a tuneable resistor in the N-path filter. Differently from the results for Filter 1, the bandwidth of the Filter 2 structure was not affected too much by the parasitic capacitance value. With an increase in the parasitic capacitance value, the bandwidth values slightly rose, and the tuneable bandwidth ranges even expanded. This phenomenon can also be observed in Table 6. This may be because the memristors at different resistance levels had different time constants, which expanded the difference in the gain in a specific frequency range and hence expanded the tuneable cut-off frequency range. Although this can not be observed from the table, a reduction in the $C_p$ improved the noise floor in the stopband of the Filter 2 structure N-path filter.

A comparison between the memristor-based N-path filters and other reconfigurable bandpass filters is shown in

Table 8. Comparison between the memristor-based N-path filter and other reconfigurable bandpass filters.

Ref.	Tech.	Frequency [Hz]	Bandwidth [Hz]	Gain [dB]	NF [dB]
[43]	22 nm	1.7∼6.4 G	50∼120 0M	18∼32	4.6∼7.4
[44]	28 nm	0.1∼1 G	2.5∼40 M	30	4.1∼5.8
[45]	28 nm	0.1∼1 G	5∼20 M	7.8∼10	10.5∼14.1
[46]	65 nm	50∼100 M	1.5∼45 M	15	/
[47]	55 nm	0.1∼1 G	75∼119 M	/	/
Filter 1 (simulation)	180 nm	1 M	0.95∼1.2 k	−7∼−6	2.1
Filter 2 (simulation)	180 nm	1 G	0.99∼1.4 M	−3∼−2.5	3.6

. The table does not fully show the performance advantages of the two memristor-based N-path filters introduced in this work when compared to other reconfigurable filters. This is primarily because the focus of this study was to demonstrate the feasibility and basic behaviour of integrating memristors into N-path filter structures. In the current stage of this research, no local oscillator or switch array circuits have been specifically designed to tune the centre frequency of the N-path filters. As all simulations were based on ideal switching components and frequency control in the Cadence Virtuoso environment, the range of the centre frequency and the power consumption cannot be listed in this table. Additionally, the use of ideal components led to a lower noise figure (NF) for both filters compared to other designs. With the implementation of practical switching circuitry in future research, the actual NF values of these two filters are expected to increase. Finally, although the tuneable bandwidth range was mainly determined by the selected capacitors, the simulation results for Filter 2 (Figure 9) indicate that its bandwidth tunability was effective only within a limited range near the centre frequency. Therefore, Filter 2 does have a relatively narrow bandwidth range compared with other designs in the table. However, this does not reduce its suitability for being used in extremely narrowband applications, like precision spectrum sensing or aerospace communication.

5. Conclusions

This work reports the application of memristors in reconfigurable N-path filters whose cut-off frequency can be adjusted using the memristor value. The frequency responses of three types of memristor-based N-path filter circuit structures were compared. A memristor-based four-path filter was tested in the laboratory with a memristor package at a 1 MHz centre frequency. The simulation results for different memristor-based four-path filters at 1 GHz were also recorded.

The simulation results show that the reconfigurable four-path filter designed using Filter 1, shown in Figure 2, could work well at 1 MHz with a memristor value of [10 k, 17 k] $\Omega$ and that it had a tuneable $f_{-3dB}$ range of [954, 1191] Hz and a tuneable Q factor range of [839, 1048], with a minimum bandwidth tuning step smaller than 2.7% of the whole tuneable bandwidth range. A Filter 1 structure four-path filter was built on a stripboard and tested with a memristor which had a [10 k, 30 k] $\Omega$ resistance. The four-path filter had a tuneable $f_{-3dB}$ range of [1.5, 2] kHz and a tuneable Q factor range of [500, 667]. A N-path filter that used multiple memristors (Filter 2) and could work at 1 GHz was also designed. The simulation results show the Filter 2 structure N-path filter had a tuneable $f_{-3dB}$ range of [0.99, 1.38] GHz, which meant it had a tuneable $f_c$ range of [0.99, 1.38] GHz when maintaining Q = 1000, with a minimum $f_{-3dB}$ tuning step smaller than 2.2% of its whole tuneable bandwidth range. The research in this article shows the very fine bandwidth-changing ability of these memristor-based N-path filter structures.

In further work, first, the schematics and layout of the memristor-based N-path filter structures need to be designed. After that, the performance of the circuit structures in this research can be compared with other work. Second, in the measurements in this research, the four-path filter on the stripboard showed a large parasitic capacitance, which reduced the performance of the circuit when working with a 1 MHz centre frequency. To measure the performance of a memristor-based N-path filter at a MHz frequency, a circuit built on a PCB board is needed. Also, the connection between the memristor and the N-path filter should be achieved using a specific connector instead of jumping wires. Third, the memristor package used in this research included several memristors with different resistance ranges. However, it was hard to find four similar memristors that had the same resistance ranges and current–voltage characteristics. Because of that, Filter 2, shown in Figure 2c, was not tested in the laboratory with real memristor components. In the future, if there are suitable memristors, Filter 2 should also be tested with an RF PCB at a high frequency.