Garzetti, F.; Bonanno, G.; Lusardi, N.; Ronconi, E.; Costa, A.; Geraci, A.
New High-Rate Timestamp Management with Real-Time Configurable Virtual Delay and Dead Time for FPGA-Based Time-to-Digital Converters. Electronics 2024, 13, 1124.
https://doi.org/10.3390/electronics13061124
AMA Style
Garzetti F, Bonanno G, Lusardi N, Ronconi E, Costa A, Geraci A.
New High-Rate Timestamp Management with Real-Time Configurable Virtual Delay and Dead Time for FPGA-Based Time-to-Digital Converters. Electronics. 2024; 13(6):1124.
https://doi.org/10.3390/electronics13061124
Chicago/Turabian Style
Garzetti, Fabio, Gabriele Bonanno, Nicola Lusardi, Enrico Ronconi, Andrea Costa, and Angelo Geraci.
2024. "New High-Rate Timestamp Management with Real-Time Configurable Virtual Delay and Dead Time for FPGA-Based Time-to-Digital Converters" Electronics 13, no. 6: 1124.
https://doi.org/10.3390/electronics13061124
APA Style
Garzetti, F., Bonanno, G., Lusardi, N., Ronconi, E., Costa, A., & Geraci, A.
(2024). New High-Rate Timestamp Management with Real-Time Configurable Virtual Delay and Dead Time for FPGA-Based Time-to-Digital Converters. Electronics, 13(6), 1124.
https://doi.org/10.3390/electronics13061124
