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J. Low Power Electron. Appl., Volume 9, Issue 4 (December 2019)

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Open AccessArticle
Energy-Performance Scalability Analysis of a Novel Quasi-Stochastic Computing Approach
J. Low Power Electron. Appl. 2019, 9(4), 30; https://doi.org/10.3390/jlpea9040030 - 15 Nov 2019
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Abstract
Stochastic computing (SC) is an emerging low-cost computation paradigm for efficient approximation. It processes data in forms of probabilities and offers excellent progressive accuracy. Since SC’s accuracy heavily depends on the stochastic bitstream length, generating acceptable approximate results while minimizing the bitstream length [...] Read more.
Stochastic computing (SC) is an emerging low-cost computation paradigm for efficient approximation. It processes data in forms of probabilities and offers excellent progressive accuracy. Since SC’s accuracy heavily depends on the stochastic bitstream length, generating acceptable approximate results while minimizing the bitstream length is one of the major challenges in SC, as energy consumption tends to linearly increase with bitstream length. To address this issue, a novel energy-performance scalable approach based on quasi-stochastic number generators is proposed and validated in this work. Compared to conventional approaches, the proposed methodology utilizes a novel algorithm to estimate the computation time based on the accuracy. The proposed methodology is tested and verified on a stochastic edge detection circuit to showcase its viability. Results prove that the proposed approach offers a 12–60% reduction in execution time and a 12–78% decrease in the energy consumption relative to the conventional counterpart. This excellent scalability between energy and performance could be potentially beneficial to certain application domains such as image processing and machine learning, where power and time-efficient approximation is desired. Full article
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Open AccessArticle
TCAD Simulation and Analysis of Selective Buried Oxide MOSFET Dynamic Power
J. Low Power Electron. Appl. 2019, 9(4), 29; https://doi.org/10.3390/jlpea9040029 - 22 Sep 2019
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Abstract
Low power consumption has become one of the major requirements for most microelectronic devices and systems. Increasing power dissipation may lead to decreasing system efficiency and lifetime. The BULK metal oxide semiconductor field-effect transistor (MOSFET) has relatively high power dissipation and low frequency [...] Read more.
Low power consumption has become one of the major requirements for most microelectronic devices and systems. Increasing power dissipation may lead to decreasing system efficiency and lifetime. The BULK metal oxide semiconductor field-effect transistor (MOSFET) has relatively high power dissipation and low frequency response due to its internal capacitances. Although the silicon-on-insulator (SOI) MOSFET was introduced to resolve these limitations, other challenges were introduced including the kink effect in the current-voltage characteristics. The selective buried oxide (SELBOX) MOSFET was then suggested to resolve the problem of the kink effect. The authors have previously investigated and reported the characteristics of the SELBOX structure in terms of kink effect, frequency, thermal and static power characteristics. In this paper, we continue our investigation by presenting the dynamic power characteristics of the SELBOX structure and compare that with the BULK and SOI structures. The simulated fabrication of the three devices was conducted using Silvaco TCAD tools in 90 nm complementary metal oxide semiconductor (CMOS) technology. Simulation results show that the average dynamic power dissipation of the CMOS BULK, SOI and SELBOX are compatible at high frequencies with approximately 54.5 µW. At low frequencies, the SOI and SELBOX showed comparable dynamic power dissipation but with lower values than the BULK structure. The difference in power dissipation between the SELBOX and BULK is in the order of nano watts. This power difference becomes significant at the chip level. For instance, at 1 MHz, SOI and SELBOX exhibit an average dynamic power consumption of 0.0026 µW less than that of the BULK structure. This value cannot be ignored when a chip operates using thousands or millions of SOI or SELBOX MOSFETs. Full article
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