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Miniaturization of CMOS

1,2,3,*,†, 1,†, 1,4,†, 1,†, 5,†, 1,†, 1,†, 1,2,†, 1,2,†, 1,†, 1,2,†, 1,6,†, 1,7,†, 1,2,†, 1,† and 1,2,*,†
Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China
Microelectronics Institute, University of Chinese Academy of Sciences, Beijing 100049, China
Department of Electronics Design, Mid Sweden University, Holmgatan 10, 85170 Sundsvall, Sweden
State Key Laboratory of Advanced Materials for Smart Sensing, General Research Institute for Nonferrous Metals, Beijing 100088, China
Fert Beijing Institute, Big Data Brain Computing (BDBC), Beihang University, Beijing 100191, China
School of Artificial Intelligence, University of Chinese Academy of Sciences, Beijing 100049, China
School of Microelectronics, University of Science and Technology of China, Anhui 230026, China
Authors to whom correspondence should be addressed.
The authors have equally contributed in this article.
Micromachines 2019, 10(5), 293;
Received: 3 March 2019 / Revised: 10 April 2019 / Accepted: 11 April 2019 / Published: 30 April 2019
(This article belongs to the Special Issue Miniaturized Transistors, Volume II)


When the international technology roadmap of semiconductors (ITRS) started almost five decades ago, the metal oxide effect transistor (MOSFET) as units in integrated circuits (IC) continuously miniaturized. The transistor structure has radically changed from its original planar 2D architecture to today’s 3D Fin field-effect transistors (FinFETs) along with new designs for gate and source/drain regions and applying strain engineering. This article presents how the MOSFET structure and process have been changed (or modified) to follow the More Moore strategy. A focus has been on methodologies, challenges, and difficulties when ITRS approaches the end. The discussions extend to new channel materials beyond the Moore era. View Full-Text
Keywords: FinFETs; CMOS; device processing; integrated circuits FinFETs; CMOS; device processing; integrated circuits

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Radamson, H.H.; He, X.; Zhang, Q.; Liu, J.; Cui, H.; Xiang, J.; Kong, Z.; Xiong, W.; Li, J.; Gao, J.; Yang, H.; Gu, S.; Zhao, X.; Du, Y.; Yu, J.; Wang, G. Miniaturization of CMOS. Micromachines 2019, 10, 293.

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