Measurements and Modelling of Thermally Induced Warpages of DIMM Socket Server PCB Assembly after Solder Reflow Processes
Abstract
1. Introduction
2. Methodologies
2.1. CTE and Thermal Deformation Measurement by Stain Gauges
2.2. Shadow Moiré Measurements
2.3. Theoretical Analysis and FEM Simulation
3. Results and Discussion
3.1. Material Property Measurements
- (a)
- Elastic Modulus and CTE of DIMM Socket
- (b)
- CTE of Bare PCB
3.2. FEM Modelling
- (a)
- Model Validation and Comparison with Theory
- (b)
- Local Model vs. Full Model
3.3. Thermal Warpage Measurement
- (a)
- Bare PCB
- (b)
- Socket-PCB Assembly
3.4. Comparisons of Thermal Warpages from Moiré, Gauges, Theory, and FEM
3.5. Warpage of Socket-PCB Assembly after Solder Reflow
4. Conclusions
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Data Availability Statement
Conflicts of Interest
References
- Lau, J.H. Recent advances and trends in advanced packaging. IEEE Trans. Compon. Packag. Manuf. Technol. 2022, 12, 228–252. [Google Scholar] [CrossRef] [Scilit]
- Dally, J.W.; Riley, W.F. Experimental Stress Analysis, 14th ed.; College House Enterprises: Knoxville, TX, USA, 2006. [Google Scholar]
- Mercado, L.L.; Hsieh, G.; Girouard, S. Electronic packaging solder joint reliability assessment with a mechanics-based strain gauge methodology. IEEE Trans. Packag. Technol. 2006, 29, 5–12. [Google Scholar] [CrossRef] [Scilit]
- Liao, M.C.; Huang, P.S.; Huang, T.C.; Tsai, M.Y. Backplate-reinforced structures for enhancing solder joint reliability of server CPU assembly under thermal cycling. J. Mech. 2021, 37, 693–703. [Google Scholar] [CrossRef] [Scilit]
- Liao, M.C.; Huang, P.S.; Lin, Y.H.; Tsai, M.Y.; Huang, C.Y.; Huang, T.C. Measurements of thermally-induced curvatures and warpages of printed circuit board during a solder reflow process using strain gauges. Appl. Sci. 2017, 7, 739. [Google Scholar] [CrossRef] [Scilit]
- Tsai, M.Y.; Wang, Y.W.; Liu, C.M. Thermally-induced deformations and warpages of flip-chip and 2.5D IC packages measured by strain gauges. Materials 2021, 14, 3723. [Google Scholar] [CrossRef] [Scilit] [PubMed]
- Post, D.; Han, B.; Ifju, P. High Sensitivity Moiré Experimental Analysis for Mechanics and Materials; Springer: Berlin/Heidelberg, Germany, 1993. [Google Scholar]
- Han, B.; Guo, Y.; Choi, H.C. Out-of-plane displacement measurement of printed circuit board by shadow moiré with variable sensitivity. In Proceedings of the 1993 ASME International Electronics Packaging Conference, Binghamton, NY, USA, 1 September 1993; pp. 179–185. [Google Scholar]
- Hai, D.; Powell, R.E.; Hanna, C.R.; Ume, I.C. Warpage measurement comparison using shadow moiré and projection moiré methods. IEEE Trans. Compon. Packag. Technol. 2002, 25, 714–721. [Google Scholar]
- Tsai, M.Y.; Chang, H.Y.; Pecht, M. Warpage analysis of flip-chip PBGA packages subject to thermal loading. IEEE Trans. Device Mater. Reliab. 2009, 9, 419–424. [Google Scholar] [CrossRef] [Scilit]
- Tsai, M.Y.; Chen, Y.C.; Lee, S.W.R. Correlation between measurement and simulation of thermal warpage in PBGA with consideration of molding compound residual strain. IEEE Trans. Compon. Packag. Technol. 2008, 31, 683–690. [Google Scholar] [CrossRef] [Scilit]
- Tsai, M.Y.; Ting, C.W.; Huang, C.Y.; Lai, Y.S. Determination of residual strains of the EMC in PBGA during manufacturing and IR solder reflow processes. Microelectron. Reliab. 2011, 51, 642–648. [Google Scholar] [CrossRef] [Scilit]
- Suhir, E. Interfacial stresses in bimetal thermostats. ASME J. Appl. Mech. 1989, 56, 595–600. [Google Scholar] [CrossRef] [Scilit]
- Suhir, E. Approximate evaluation of the elastic interfacial stresses in thin films with application to high -Tc superconducting ceramics. Int. J. Solids Struct. 1991, 27, 1025–1034. [Google Scholar] [CrossRef] [Scilit]
- Tsai, M.Y.; Hsu, C.H.; Han, C.N. A note on Suhir’s solution of thermal stresses for a die-substrate assembly. ASME J. Electron. Packag. Mar. 2004, 126, 115–119. [Google Scholar] [CrossRef] [Scilit]
- Tsai, M.Y.; Wang, Y.W. A theoretical solution for thermal warpage of flip-chip packages. IEEE Trans. Compon. Packag. Manuf. Technol. 2020, 10, 72–78. [Google Scholar] [CrossRef] [Scilit]
- Wong, E.H.; Liu, J. Interface and interconnection stresses in electronic assemblies—A critical review of analytical solutions. Microelectron. Reliab. 2017, 79, 206–220. [Google Scholar] [CrossRef] [Scilit]





























| Material | E (GPa) | α (ppm/°C) | ν |
|---|---|---|---|
| Socket | 8.7 | 14 | 0.3 |
| Pin Solder Joint (Effective) | E2 | 8.1 | 0.3 |
| PCB | 20 | 18 | 0.42 |
| Cu Pin | 120 | 16.9 | 0.3 |
| Solder | 30 | 22 | 0.3 |
Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content. |
© 2023 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).
Share and Cite
Tsai, M.-Y.; Wang, Y.-W.; Lu, Y.-J.; Lu, T.-M.; Chung, S.-T. Measurements and Modelling of Thermally Induced Warpages of DIMM Socket Server PCB Assembly after Solder Reflow Processes. Materials 2023, 16, 3233. https://doi.org/10.3390/ma16083233
Tsai M-Y, Wang Y-W, Lu Y-J, Lu T-M, Chung S-T. Measurements and Modelling of Thermally Induced Warpages of DIMM Socket Server PCB Assembly after Solder Reflow Processes. Materials. 2023; 16(8):3233. https://doi.org/10.3390/ma16083233
Chicago/Turabian StyleTsai, Ming-Yi, Yu-Wen Wang, Yen-Jui Lu, Tzu-Min Lu, and Shu-Tan Chung. 2023. "Measurements and Modelling of Thermally Induced Warpages of DIMM Socket Server PCB Assembly after Solder Reflow Processes" Materials 16, no. 8: 3233. https://doi.org/10.3390/ma16083233
APA StyleTsai, M.-Y., Wang, Y.-W., Lu, Y.-J., Lu, T.-M., & Chung, S.-T. (2023). Measurements and Modelling of Thermally Induced Warpages of DIMM Socket Server PCB Assembly after Solder Reflow Processes. Materials, 16(8), 3233. https://doi.org/10.3390/ma16083233

