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Keywords = shadow moiré

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13 pages, 7797 KB  
Article
Reliability Evaluation of Board-Level Flip-Chip Package under Coupled Mechanical Compression and Thermal Cycling Test Conditions
by Meng-Kai Shih, Yu-Hao Liu, Calvin Lee and C. P. Hung
Materials 2023, 16(12), 4291; https://doi.org/10.3390/ma16124291 - 9 Jun 2023
Cited by 7 | Viewed by 5799
Abstract
Flip Chip Ball Grid Array (FCBGA) packages, together with many other heterogeneous integration packages, are widely used in high I/O (Input/Output) density and high-performance computing applications. The thermal dissipation efficiency of such packages is often improved through the use of an external heat [...] Read more.
Flip Chip Ball Grid Array (FCBGA) packages, together with many other heterogeneous integration packages, are widely used in high I/O (Input/Output) density and high-performance computing applications. The thermal dissipation efficiency of such packages is often improved through the use of an external heat sink. However, the heat sink increases the solder joint inelastic strain energy density, and thus reduces the board-level thermal cycling test reliability. The present study constructs a three-dimensional (3D) numerical model to investigate the solder joint reliability of a lidless on-board FCBGA package with heat sink effects under thermal cycling testing, in accordance with JEDEC standard test condition G (a thermal range of −40 to 125 °C and a dwell/ramp time of 15/15 min). The validity of the numerical model is confirmed by comparing the predicted warpage of the FCBGA package with the experimental measurements obtained using a shadow moiré system. The effects of the heat sink and loading distance on the solder joint reliability performance are then examined. It is shown that the addition of the heat sink and a longer loading distance increase the solder ball creep strain energy density (CSED) and degrade the package reliability performance accordingly. Full article
(This article belongs to the Special Issue Reliability Evaluation, Simulation and Mechanical Analysis of Materials for Advanced Electronic Packaging)
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23 pages, 11083 KB  
Article
Measurements and Modelling of Thermally Induced Warpages of DIMM Socket Server PCB Assembly after Solder Reflow Processes
by Ming-Yi Tsai, Yu-Wen Wang, Yen-Jui Lu, Tzu-Min Lu and Shu-Tan Chung
Materials 2023, 16(8), 3233; https://doi.org/10.3390/ma16083233 - 19 Apr 2023
Cited by 7 | Viewed by 2884
Abstract
The thermal warpage of a server-computer-used DIMM socket-PCB assembly after the solder reflow process is studied experimentally, theoretically, and numerically, especially along the socket lines and over the entire assembly. Strain gauge and shadow moiré are used for determining the coefficients of thermal [...] Read more.
The thermal warpage of a server-computer-used DIMM socket-PCB assembly after the solder reflow process is studied experimentally, theoretically, and numerically, especially along the socket lines and over the entire assembly. Strain gauge and shadow moiré are used for determining the coefficients of thermal expansion of the PCB and DIMM sockets and for measuring the thermal warpages of the socket-PCB assembly, respectively, while a newly proposed theory and a finite element method (FEM) simulation are used to calculate the thermal warpage of the socket-PCB assembly in order to understand its thermo-mechanical behavior and then further identify some important parameters. The results show that the theoretical solution validated by the FEM simulation provides the mechanics with the critical parameters. In addition, the cylindrical-like thermal deformation and warpage, measured by the moiré experiment, are also consistent with the theory and FEM simulation. Moreover, the results of the thermal warpage of the socket-PCB assembly from the strain gauge suggest a warpage dependence on the cooling rate during the solder reflow process, due to the nature of the creep behavior in the solder material. Finally, the thermal warpages of the socket-PCB assemblies after the solder reflow processes are provided through a validated FEM simulation for future designs and verification. Full article
(This article belongs to the Special Issue Reliability Evaluation, Simulation and Mechanical Analysis of Materials for Advanced Electronic Packaging)
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18 pages, 6817 KB  
Article
Thermally-Induced Deformations and Warpages of Flip-Chip and 2.5D IC Packages Measured by Strain Gauges
by Ming-Yi Tsai, Yu-Wen Wang and Chia-Ming Liu
Materials 2021, 14(13), 3723; https://doi.org/10.3390/ma14133723 - 2 Jul 2021
Cited by 18 | Viewed by 6184
Abstract
The thermal warpage problems in integrated circuit (IC) packaging exist in both flip-chip and two-and-a-half dimensional integrated circuits (2.5D IC) packages during manufacturing processes and thermal cycling service. This study proposes a simple and easy-to-use strain gauge measurement associated with a beam model [...] Read more.
The thermal warpage problems in integrated circuit (IC) packaging exist in both flip-chip and two-and-a-half dimensional integrated circuits (2.5D IC) packages during manufacturing processes and thermal cycling service. This study proposes a simple and easy-to-use strain gauge measurement associated with a beam model theory to determine the thermally induced deformations and warpages of both packages. First, validation and limitations of the beam model theory are presented. Then, the thermally induced out-of-plane deformations for both packages are well described by the finite element method (FEM) simulation with a good consistency to full-field shadow moiré experimental results. The strain gauge measurements were implemented experimentally, and the thermal strain results were found to be well consistent with validated FEM ones. As a result, out-of-plane thermal deformations and warpages of the packages, calculated from the beam model theory with extracted curvature data from the strain gauge, were in reasonably good agreement with those from FEM analysis and shadow moiré measurements. Therefore, the strain gauge method of featuring point strain measurement combined with the beam model theory proved feasible in determining the thermal deformations and warpages of both IC packages. Full article
(This article belongs to the Special Issue Simulation and Reliability Assessment of Advanced Packaging)
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11 pages, 7898 KB  
Article
Measurements of Thermally-Induced Curvatures and Warpages of Printed Circuit Board during a Solder Reflow Process Using Strain Gauges
by Meng-Chieh Liao, Pu-Shan Huang, Yi-Hsien Lin, Ming-Yi Tsai, Chen-Yu Huang and Te-Chin Huang
Appl. Sci. 2017, 7(7), 739; https://doi.org/10.3390/app7070739 - 20 Jul 2017
Cited by 22 | Viewed by 12230
Abstract
Measurements of the curvatures and warpages of a printed circuit board (PCB) during a thermal solder reflow process using strain gauges are proposed in this study. In the experiments, a shadow moiré is used for measuring the out-of-plane deformations (or warpage) of a [...] Read more.
Measurements of the curvatures and warpages of a printed circuit board (PCB) during a thermal solder reflow process using strain gauges are proposed in this study. In the experiments, a shadow moiré is used for measuring the out-of-plane deformations (or warpage) of a bi-material plate and a PCB with dual in-line memory module (DIMM) sockets during solder reflow heating, while the finite element method (FEM) is used to analyze the thermally-induced deformation of the PCB specimen for ensuring the validity of the measurement. Conventional strain gauges are employed to measure the strains (albeit as in-plane strain data) in both specimens during the solder reflow process. The results indicate that the strain gauge-measured strain data from the top and bottom surfaces of both specimens during the solder reflow can be converted into curvature data with specific equations, and even into global out-of-plane deformations or warpages with a proposed simple beam model. Such results are also consistent with those from the shadow moiré and FEM. Therefore, it has been proved that the strain gauge measurement associated with the simple beam model can provide a method for the real-time monitoring of PCB deformations or warpages with different temperatures during the solder reflow process. Full article
(This article belongs to the Special Issue Printed Electronics 2017)
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