Stability Control of the DC/DC Converter in DC Microgrids Considering Negative Damping and Parameter Uncertainties

Abstract

To address the issue of negative damping instability easily induced by DC/DC converters under constant power load (CPL) in DC microgrids and to enhance the control robustness of the system under uncertainties such as parameter perturbations, this paper designs a controller based on the linear active disturbance rejection control (LADRC) theory. Firstly, by establishing an equivalent model of the DC microgrid with CPL, the intrinsic relationship between the equivalent incremental admittance of the hybrid load and the system damping is revealed. Subsequently, treating the nonlinear characteristics of the CPL and model parameter variations as external disturbances, the linear extended state observer (LESO) is employed to estimate and compensate for the total system disturbance in real time. This effectively eliminates the risk of negative damping instability caused by the CPL and enhances the system’s robustness against parameter variations. Then, theoretical analysis is conducted from three perspectives, the convergence of disturbance estimation error, the stability of the closed-loop system, and robustness against parameter variations, thereby ensuring the reliability of the proposed control strategy. Finally, the proposed control strategy is validated through simulations and experiments. The results confirm that, even in the presence of negative damping effects and parameter variations, the strategy can effectively maintain fast tracking and stable control of the output voltage.

1. Introduction

The rapid expansion of new power technologies—such as photovoltaic distributed generation, industrial and commercial energy storage, and electric vehicle charging infrastructure—has positioned DC microgrids as a pivotal architecture for advancing power system intelligence. Owing to their structural simplicity, flexible control, and absence of frequency and phase synchronization requirements, DC microgrids are increasingly recognized for enabling efficient integration of distributed energy resources and coordinated multi-source operation [1].

From a system architecture perspective, the DC/DC converter serves as the central power conversion unit within DC microgrids, and is widely deployed at various energy interfaces and load terminals. Its control performance is crucial to the overall stability and operational efficiency of the system. As shown in Figure 1, distributed generation units and energy storage systems connect to the DC bus via a front-end DC/DC converter, which commonly provides voltage step-up functionality. The regulated bus voltage then supplies power to the loads. Conversely, the back-end DC/DC converter commonly operates under closed-loop control to maintain a constant output voltage or current. When the load resistance remains constant, this operational mode yields a constant output power, effectively characterizing the back-end converter as a CPL [2,3]. The CPL exhibits negative impedance characteristics, which can undermine the system’s equivalent damping and compromise the dynamic stability of the DC microgrid [4,5,6].

To mitigate the stability challenge posed by the negative impedance characteristics of CPL, various stabilization approaches have been developed. These methods fall into three main categories, namely passive damping, active damping, and nonlinear control. Passive damping augments system damping through the addition of physical components such as resistors, capacitors [7,8], or LC filters [9], typically connected in series or parallel with filter elements to alleviate resonance peaks. While this method benefits from simple implementation and directly improves stability, it introduces notable drawbacks, including energy losses, increased system volume, and higher hardware costs. The active damping method synthesizes virtual impedances (e.g., virtual resistors or capacitors) through control algorithms, effectively enhancing system damping without adding physical components [10,11]. While this approach eliminates associated power losses, its effectiveness against the negative damping effect of a CPL presents a challenge, as this effect intensifies with increasing CPL power. Consequently, the active damping must be synchronously strengthened to maintain stability margins. Fixed-parameter schemes have difficulty adapting to this demand across wide operating ranges, and excessive damping can unduly slow down the system’s dynamic response [12]. To address large-signal stability challenges, researchers have begun integrating the concept of virtual impedance with nonlinear control theory. For instance, Reference [13] proposes an adaptive virtual impedance strategy, aiming to expand the stability region by dynamically adjusting damping parameters. Although this approach shows promising potential, it often relies on accurate system models and involves complex controller parameter tuning, posing challenges for ensuring global stability in practical applications. Some scholars have also applied Active Disturbance Rejection Control (ADRC) to DC/DC converters in DC microgrids, and the results show that its performance is superior to that of traditional Proportional-Integral (PI) controllers [14,15]. Furthermore, although nonlinear control methods demonstrate considerable promise in managing large disturbances, they often face two critical limitations: inadequate adaptability of control parameters and excessive sensitivity to model inaccuracies.

The LADRC presents a robust alternative by employing the LESO to estimate and compensate for the total system disturbance in real-time. This active estimation significantly reduces dependency on an accurate system model [16]. LADRC has demonstrated superior disturbance rejection capabilities in power electronics control. However, existing studies predominantly focus on systems with resistive loads or under simplified operating conditions [17,18]. Consequently, the application of LADRC in DC microgrids featuring complex hybrid loads, such as CPL, remains insufficiently explored. Key challenges, including the design of LESO parameters to balance fast dynamic response with strong robustness under the negative impedance effect of CPL, require further in-depth investigation.

In summary, the LADRC offers a robust solution to the stability issues posed by CPL and operational uncertainties in power electronic systems. Its core mechanism involves real-time estimation and cancellation of the total disturbance including the negative impedance effect of CPL via the LESO. This capability enables the LADRC to mitigate system oscillations and prevent voltage collapse under sudden load changes or parameter perturbations, substantially improving power supply reliability. Grounded in this framework, the present study formulates, implements, and validates a discrete LADRC-based control strategy for a Boost converter serving mixed loads. The work provides a comprehensive evaluation encompassing discrete-time implementation, formal stability proof, and experimental verification, confirming the controller’s capability for rapid dynamic response in large-signal stability scenarios.

2. System Modelling and Impedance Characteristic Analysis

The typical DC microgrid system (Figure 1) is simplified as follows: distributed power sources are equivalent to ideal voltage sources, the closed-loop controlled back-end DC/DC converter is modeled as a CPL, and the DC bus load consists of parallel CPLs and constant impedance loads (CILs). The front-end DC/DC converter serves as the energy interaction unit between distributed sources and the DC bus, with its simplified equivalent circuit shown in Figure 2.

The key parameters illustrated in Figure 2 include the inductance (L) and capacitance (C) associated with the DC/DC converters. Q1 and Q2 represent the switching transistors. The equivalent resistances of the CIL and CPL, denoted as R_CIL and R_CPL, respectively, are included in the state-space averaging model as follows:

$$\left\{\begin{array}{l}L{\displaystyle \frac{d{i}_{\mathrm{L}}}{dt}}=u_{\mathrm{in}}-(1-d)u_{\mathrm{C}}\\ C{\displaystyle \frac{d{u}_{\mathrm{C}}}{dt}}=\left(1-d\right)i_{\mathrm{L}}-{\displaystyle \frac{u_{\mathrm{C}}}{R_{\mathrm{CIL}}}}-{\displaystyle \frac{P_{\mathrm{CPL}}}{u_{\mathrm{C}}}}\end{array}\right.$$

(1)

where $i_{\mathrm{L}}$ and $u_{\mathrm{C}}$ are the average value of instantaneous inductor current and capacitor voltage, $u_{\mathrm{i}\mathrm{n}}$ stands for the voltage provided by the power source, and $d$ refers to the duty ratio of the switching device.

The small-signal model of the controlled object can be derived as

$$\left\{\begin{array}{l}L{\displaystyle \frac{d{\widehat{i}}_{\mathrm{L}}}{dt}}=-(1-D){\widehat{u}}_{\mathrm{C}}+U_{\mathrm{C}}\widehat{d}\\ C{\displaystyle \frac{d{\widehat{u}}_{\mathrm{C}}}{dt}}=\left(1-D\right){\widehat{i}}_{\mathrm{L}}-I_{\mathrm{L}}\widehat{d}-\left({\displaystyle \frac{1}{R_{\mathrm{CIL}}}}-{\displaystyle \frac{P_{\mathrm{CPL}}}{U_{\mathrm{C}}^2}}\right){\widehat{u}}_{\mathrm{C}}\end{array}\right.$$

(2)

where the steady-state values of the duty ratio, inductor current, and output voltage correspond to D, I_L and Uc, respectively, and the symbols $\widehat{d}$, ${\widehat{i}}_{\mathrm{L}}$ and ${\widehat{u}}_{\mathrm{C}}$ signify the small-signal perturbations of these variables around the steady-state operating point.

The system transfer function, obtained via the Laplace transform of (2), is given by

$${\displaystyle \frac{{\widehat{u}}_{\mathrm{C}}\left(s\right)}{\widehat{d}\left(s\right)}}={\displaystyle \frac{U_{\mathrm{C}}\left(1-D\right)-I_{\mathrm{L}}Ls}{LC{s}^2+sL\left(\frac{1}{R_{\mathrm{CIL}}}-\frac{P_{\mathrm{CPL}}}{U_C^2}\right)+{\left(1-D\right)}^2}}$$

(3)

The electrical behaviors of the CIL and CPL, represented by their current-voltage (I-U) curves, are illustrated in Figure 3. When the CIL and CPL are connected in parallel to form a hybrid load, the incremental admittance of the load can be expressed as

$$Y_{\mathrm{eq}}=Y_{\mathrm{CIL}}+Y_{\mathrm{CPL}}={\displaystyle \frac{\Delta I_{\mathrm{CIL}}}{\Delta U_{\mathrm{CIL}}}}+{\displaystyle \frac{\Delta I_{\mathrm{CPL}}}{\Delta U_{\mathrm{CPL}}}}={\displaystyle \frac{\Delta I_{\mathrm{CIL}}}{\Delta U}}+{\displaystyle \frac{\Delta I_{\mathrm{CPL}}}{\Delta U}}$$

(4)

As can be seen from Figure 3, the CIL exhibits positive incremental admittance, i.e., $Y_{\mathrm{CIL}}>0$; and the CPL shows negative incremental admittance, i.e., $Y_{\mathrm{CPL}}<0$. As the power of CPL increases (from P_CPL1 to P_CPL2), the incremental admittance of the hybrid load $Y_{\mathrm{eq}}$ will become progressively smaller and may even turn from positive to negative.

Based on the U-I relationship of the load as shown in Figure 3, the incremental admittance $Y_{\mathrm{eq}}$ in steady state can be further derived by differentiation as

$$Y_{\mathrm{eq}}=Y_{\mathrm{CIL}}+Y_{\mathrm{CPL}}={\displaystyle \frac{\Delta I_{\mathrm{CIL}}}{\Delta U_{\mathrm{CIL}}}}+{\displaystyle \frac{\Delta I_{\mathrm{CPL}}}{\Delta U_{\mathrm{CPL}}}}={\displaystyle \frac{\Delta I}{\Delta U}}={\displaystyle \frac{1}{R_{\mathrm{CIL}}}}-{\displaystyle \frac{P_{\mathrm{CPL}}}{U_C^2}}$$

(5)

Meanwhile, according to (3), it can be known that the damping ratio $\zeta$ of the controlled plant is closely related to the incremental admittance $Y_{\mathrm{eq}}$, i.e.,

$$\zeta ={\displaystyle \frac{Y_{\mathrm{eq}}}{2}}\sqrt{{\displaystyle \frac{L}{C}}}{\displaystyle \frac{1}{1-D}}$$

(6)

The above analysis indicates that when only the CPL is connected, or when a hybrid load is connected but the power of CPL is relatively large (as shown by the red curve in Figure 3), the negative incremental admittance effect of the CPL becomes dominant. Consequently, the controlled plant exhibits negative damping characteristics ($\zeta <0$) and negative incremental admittance ($Y_{\mathrm{eq}}<0$). In such a case, if a hybrid load disturbance causes an increase in the bus voltage Uc ($\Delta U>0$) then the output current will decrease significantly ($\Delta I<0$). This drop in current further increases Uc, thereby forming a positive feedback loop which ultimately leads to system instability.

3. Control Design of the DC/DC Converter in DC Microgrids Based on the LADRC

3.1. Basic Principles of LADRC

The LADRC method utilizes a LESO to actively estimate and compensate for the total disturbance affecting the system in real time, without relying on an accurate mathematical model. For an nth-order plant, its core framework is as follows:

$${\mathrm{y}}^{\left(n\right)}=f\left( t, y, \dot{y}, \cdots , y^{\left(n-1\right)},u,\omega \right)+b_{0}u$$

(7)

where y denotes the plant output and u represents the control input, b₀ is the control gain, and $f\left( \cdot \right)$ is the total disturbance term.

To estimate the total disturbance, an extended state equation is introduced as

$$\left\{\begin{array}{l}\dot{x}=Ax+Bu+Eh\\ y=Cx\\ x={\left[x_1 x_2\cdots x_n x_{n+1}\right]}^{\mathrm{T}}\end{array}\right.$$

(8)

where $h=\dot{f}\left( \cdot \right)$ denotes the change rate of the total disturbance, and $x$ is the state vector that includes the extended state of $x_{n+1}=f$, A, B, C, and E are coefficient matrices [19].

To achieve real-time tracking of both system states and the total disturbance, a LESO is utilized which is described by

$$\left\{\begin{array}{l}\dot{z}=Az+Bu+L\left(y-\widehat{y}\right)\\ \widehat{y}=Cz\end{array}\right.$$

(9)

where the state observation vector is $z={\left[z_1 z_2\cdots z_n z_{n+1}\right]}^{\mathrm{T}}$, and $L={\left[{\beta }_1 {\beta }_2 \cdots {\beta }_n {\beta }_{n+1}\right]}^{\mathrm{T}}$ denotes the observer gain. The system response is represented by $\widehat{y}$, which is the observed output value. At steady state, $z\approx x$.

To achieve active disturbance compensation for the plant, the observed value z_n+1 is integrated into the control input as follows:

$$u={\displaystyle \frac{-z_{n+1}+u_0}{b_0}}$$

(10)

Substituting (11) into (7), the differential equation form can be transformed into

$${\mathrm{y}}^{\left(n\right)}=f\left(t, y, \dot{y}, \cdots , {\mathrm{y}}^{\left(n-1\right)}, u, \omega \right)+b_0{\displaystyle \frac{-z_{n+1}+u_0}{b_0}}\approx u_0$$

(11)

In this context, u₀ represents the output of the external controller. In the design of the external controller, a linear form is typically adopted, expressed as

$$u_0=k_{\mathrm{p}}\left(r-z_1\right)-k_{\mathrm{d}1}{z}_2-k_{\mathrm{d}2}{z}_3\cdots -k_{{\mathrm{d}}_{\mathrm{n}-1}}{z}_n$$

(12)

where r denotes the reference value of the plant output.

For the second-order system with n = 2, the external controller is designed as a proportional-derivative (PD) type, and the system control diagram is shown in Figure 4. The expressions for u₀ and the closed-loop system transfer function G(s) are as follows

$$\left\{\begin{array}{l}{u}_0=k_{\mathrm{p}}\left(r-z_1\right)-k_{\mathrm{d}}{z}_2\\ G\left(s\right)=k_{\mathrm{p}}/\left(s^2+k_{\mathrm{d}}s+k_{\mathrm{p}}\right)\end{array}\right.$$

(13)

In summary, the LADRC strategy can be summarized as follows: unknown external disturbances and the internal dynamic characteristics of the system are collectively treated as a total disturbance term. A LESO is employed to estimate both the system state variables and this lumped disturbance in real time, while an active compensation mechanism is applied to eliminate its effects. In a DC microgrid, issues such as the negative damping characteristics introduced by constant power loads, as well as parameter disturbances in the main circuit inductors and capacitors, can all be incorporated into the total disturbance category for unified suppression.

3.2. Controller Strategy Design

To achieve robust operation of the Boost converter under hybrid load (CPL + CIL) conditions, a control architecture based on LADRC is proposed, as illustrated in Figure 5. To address the negative damping effect induced by the constant power load and the uncertainties in power circuit parameters, a LESO is utilized for real-time estimation, while an embedded disturbance control loop with an outer controller (G_C) actively compensates for these effects. This disturbance control loop works in synergy with the feedback control loop to jointly generate PWM pulse drive signals, ultimately enabling precise control of the Boost converter.

For the overall system, the control objective is to ensure that the system output volt-age u_C accurately tracks the reference voltage u_ref. Based on (1), it can be expressed as a second-order nonlinear system with the duty cycle d as the input, as follows:

$${\ddot{u}}_{\mathrm{C}}={\displaystyle \frac{1}{C}}\left({\displaystyle \frac{1}{L}}\left(u_{\mathrm{in}}\left(1-d\right)-{(1-d)}^2{u}_{\mathrm{C}}\right)-i_{\mathrm{L}}\dot{d}-{\displaystyle \frac{1}{R}}{\dot{u}}_{\mathrm{C}}+{\displaystyle \frac{P_{\mathrm{CPL}}}{u_C^2}}{\dot{u}}_{\mathrm{C}}\right)$$

(14)

Linearization at the steady-state operating point (u_C0, i_L0, d₀)

$$b_0={\displaystyle \frac{\partial {\ddot{u}}_{\mathrm{C}}}{\partial d}}={\displaystyle \frac{1}{C}}\left({\displaystyle \frac{-u_{\mathrm{in}}}{L}}+{\displaystyle \frac{2\left(1-d_0\right)u_{\mathrm{C}0}}{L}}\right)$$

(15)

According to $\left(1-d_0\right)u_{C0}=u_{in}$, then

$$b_0={\displaystyle \frac{1}{C}}\left({\displaystyle \frac{-u_{\mathrm{in}}}{L}}+{\displaystyle \frac{2u_{\mathrm{in}}}{L}}\right)={\displaystyle \frac{u_{\mathrm{in}}}{LC}}$$

(16)

Construct a second-order dynamic model following the form of (7),

$${\ddot{u}}_{\mathrm{C}}=b_{0}d+f\left(\cdot \right)$$

(17)

The total disturbance f(⋅) is defined as

$$f\left(\cdot \right)=\Delta f_{\mathrm{model}}+f_{\mathrm{CPL}}+f_{\mathrm{external}}$$

(18)

where f_CPL represents the nonlinear term introduced by $\frac{P_{\mathrm{CPL}}}{C{u}_C^2}{\dot{u}}_{\mathrm{C}}$, $\Delta f_{\mathrm{model}}$ represents the uncertainty of model parameters, and f_external signifies external disturbances.

The f(⋅) is extended as a new system state, that is, by defining the extended state $x_3=f$. Let $x_1=u_{\mathrm{C}}$ and $x_2={\dot{u}}_{\mathrm{C}}$. The original system is then transformed into a linear system as

$$\left\{\begin{array}{l}{\dot{x}}_1=x_2\\ {\dot{x}}_2=x_3+b_{0}d\\ {\dot{x}}_3=h\end{array}\right.$$

(19)

where $h=\dot{f}$ is bounded.

For this extended system, and in combination with (9), the LESO is designed as

$$\left\{\begin{array}{l}\dot{z}=Az+Bd+L\left(u_{\mathrm{C}}-\widehat{y}\right)\\ \widehat{y}=Cz\end{array}\right.$$

(20)

where the state observation vector is $z={\left[z_1 z_2 z_3\right]}^{\mathrm{T}}$, and $L={\left[\begin{array}{ccc}{\beta }_1 & {\beta }_2 & {\beta }_3 \end{array}\right]}^{\mathrm{T}}$ denotes the observer gain. At steady state, $z\approx x$.

According to the ω₀-Optimization tuning principle [20,21], combined with the pole configuration concept, the eigenvalues of the LESO can be tuned to −ω₀, as follows

$$\begin{array}{ccc}{\beta }_1=3{\omega }_0 ,& {\beta }_2=3{\omega }_0^2,& {\beta }_3={\omega }_0^3\end{array}$$

(21)

The bandwidth of the LESO is characterized by the parameter ω₀. When designing L, the key principle is to keep the observer poles away from the pole distribution region of the closed-loop system, which is the core prerequisite for ensuring that the observer convergence speed is better than the system response. Normally, if the bandwidth of the closed-loop system is ω_c, a commonly adopted tuning rule is to set ω₀ = (3~10)ω_c [22].

Based on the estimation results from the LESO, the control law is designed as follows:

$$u_1={\displaystyle \frac{u_0-z_3}{b_0}}$$

(22)

where u₁ essentially represents the duty cycle d.

3.3. Discretization Process

For the extended system, the discretized LESO can be expressed as [19]

$$z\left(k\right)=A_{\mathrm{ESO}}\cdot z\left(k-1\right)+B_{\mathrm{ESO}}\cdot u_1\left(k-1\right)+L_{\mathrm{ESO}}\cdot y\left(k\right)$$

(23)

where A_ESO, B_ESO, and C_ESO are defined as

$$\left\{\begin{array}{l}{A}_{\mathrm{ESO}}=A_{\mathrm{d}}-L_{\mathrm{c}}\cdot C_{\mathrm{d}}\cdot A_{\mathrm{d}}\\ B_{\mathrm{ESO}}=B_{\mathrm{d}}-L_{\mathrm{c}}\cdot C_{\mathrm{d}}\cdot B_{\mathrm{d}}\\ L_{\mathrm{ESO}}=L_{\mathrm{c}}\end{array}\right.$$

(24)

For the extended system (n = 2), the values of A_d, B_d, and L_C are

$$A_{\mathrm{d}}=\left[\begin{array}{l}1 T_{\mathrm{s}} {\displaystyle \frac{T_{\mathrm{s}}^2}{2}}\\ 0 1 T_{\mathrm{s}}\\ 0 0 1\end{array}\right], B_{\mathrm{d}}=\left[\begin{array}{l}{b}_0\cdot {\displaystyle \frac{T_{\mathrm{s}}^2}{2}}\\ b_0\cdot T_{\mathrm{s}}\\ 0\end{array}\right], L_{\mathrm{c}}=\left[\begin{array}{c}1-{\beta }^3\\ {\displaystyle \frac{3{\left(1-\beta \right)}^2\left(1+\beta \right)}{2T_{\mathrm{s}}}}\\ {\left(1-\beta \right)}^3/T_{\mathrm{s}}^2\end{array}\right]$$

(25)

The output of the external controller G_C can be discretized and expressed as

$$u_0(k)=k_{\mathrm{p}}\left(u_{\mathrm{ref}}(k)-z_1\right)-k_{\mathrm{d}}{z}_2$$

(26)

where u_ref represents the reference voltage.

Then the discretized control law can be derived as

$$u_1\left(k\right)={\displaystyle \frac{k_{\mathrm{p}}{u}_{\mathrm{ref}}\left(k\right)-\left[k_{\mathrm{p}} k_{\mathrm{d}} 1\right]\cdot z\left(k\right)}{b_0}}$$

(27)

According to (13), the control bandwidth ${\omega }_{\mathrm{c}}$, damping ratio $\xi$, and response time $t_{\mathrm{d}}$ of the LADRC are, respectively, given by

$${\omega }_c=\sqrt{ k_{\mathrm{p}}}, \xi =k_{\mathrm{d}}/\left(2{\omega }_c\right), t_{\mathrm{d}}=4/\left(\xi {\omega }_c\right)$$

(28)

The damping ratio is set to 0.7. Furthermore, in order to avoid oscillation while enhancing the bandwidth of the closed-loop system, the $t_{\mathrm{d}}$ is set to 20 ms. Finally, The values of ${\omega }_{\mathrm{c}}$ and ${\omega }_0$ are set to

$${\omega }_{\mathrm{c}}=300 \mathrm{rad}/\mathrm{s}, {\omega }_0=3{\omega }_{\mathrm{c}}$$

(29)

4. Stability Analysis

4.1. Convergence of Disturbance Estimation Error

Based on the properties of the LESO, the system state observation vector $z={\left[z_1 z_2 z_3\right]}^{\mathrm{T}}$ can rapidly and accurately track the system state vector $x={\left[x_1 x_2 x_3\right]}^{\mathrm{T}}$, and the disturbance rate $h=\dot{f}$ is bounded. Therefore, the following holds

$$\max \left\{\sup \left|h(t)\right|\right\}\le K,K\in R_{+}$$

(30)

Define the estimation error matrix as

$$e={\left[e_1 e_2 e_3\right]}^{\mathrm{T}}={\left[x_1-z_1 x_2-z_2 x_3-z_3\right]}^{\mathrm{T}}$$

(31)

The error dynamic equation is

$$\dot{e}=A_{\mathrm{e}}e+Eh$$

(32)

where

$$A_{\mathrm{e}}=\left[\begin{array}{ccc}-{\beta }_1& 1& 0\\ -{\beta }_2& 0& 1\\ -{\beta }_3& 0& 0\end{array}\right], E={\left[0 0 1\right]}^{\mathrm{T}}$$

(33)

According to the observer gain designed in (21), the characteristic polynomial of matrix A_e satisfies

$$\det \left(s \mathrm{I}-A_{\mathrm{e}}\right) =(s+{\omega }_0{)}^3$$

(34)

Since all poles are located at $-{\omega }_0$, the matrix A_e is Hurwitz and the corresponding linear system is asymptotically stable [23].

In summary, by setting the observer bandwidth ${\omega }_0$ sufficiently large, the bounded error term caused by the disturbance variation rate can be reduced, ultimately enabling the LESO to rapidly and accurately track the system state variables while achieving precise estimation of the total disturbance $f$, that is $z_3\approx f$.

4.2. Closed-Loop System Stability

Substituting the control law (22) into (17), then

$${\ddot{u}}_{\mathrm{C}}=b_0{\displaystyle \frac{u_0-z_3}{b_0}}+f=u_0-z_3+f$$

(35)

With accurate LESO estimation, $z_3\approx f$, then

$${\ddot{u}}_{\mathrm{C}}\approx u_0$$

(36)

From (36), through the real-time estimation and active compensation of disturbances by LADRC, the original second-order system, which contains nonlinearities and uncertainties, is effectively converted into a standard double-integrator form. Furthermore, assuming the LESO provides accurate state estimation (${\mathrm{z}}_1\approx u_{\mathrm{C}}, {\mathrm{z}}_2\approx {\dot{u}}_{\mathrm{C}}$). Then the closed-loop system equation is

$${\ddot{u}}_{\mathrm{C}}+k_{\mathrm{d}}{\dot{u}}_{\mathrm{C}}+k_{\mathrm{p}}{u}_{\mathrm{C}}=k_{\mathrm{p}}{u}_{\mathrm{ref}}$$

(37)

Correspondingly, the characteristic equation can be derived as

$$s^2+k_{\mathrm{d}}s+k_{\mathrm{p}}=0$$

(38)

By setting $k_{\mathrm{p}}={\omega }_c^2, k_{\mathrm{d}}=2{\omega }_c\xi$, all system poles can be placed in the left-half plane, thereby ensuring that the closed-loop system is asymptotically stable.

In summary, the fundamental mechanism by which LADRC overcomes negative-damping instability resides in the capability of its LESO. The LESO actively estimates and compensates in real-time for the total disturbance, which encompasses the negative impedance characteristics of CPL, model uncertainties, and external disturbances. This action effectively linearizes the system. Consequently, it prevents the rightward shift of system poles induced by negative damping, thereby enhancing the system’s stability margin and its robustness under varying operating conditions.

4.3. Analysis of Robustness to Parameter Perturbations

The nominal gain of the model is expressed by (16). When the actual inductance and capacitance values are subject to disturbances, the disturbance ratio is defined as

$$\begin{array}{cc}{\eta }_{\mathrm{L}}={\displaystyle \frac{L_1}{L}},& {\eta }_{\mathrm{C}}={\displaystyle \frac{C_1}{C}}\end{array}$$

(39)

where the inductance and capacitance values of the power circuit, following parameter disturbances, are denoted as L₁ and C₁, respectively.

The actual control gain b₁ is

$$b_1={\displaystyle \frac{u_{\mathrm{in}}}{L_1{C}_1}}={\displaystyle \frac{u_{\mathrm{in}}}{{\eta }_{\mathrm{L}}{\eta }_{\mathrm{C}}LC}}$$

(40)

Based on (17), the corrected model with the perturbations is

$${\ddot{u}}_{\mathrm{C}}=b_{1}d+f\left(\cdot \right)$$

(41)

Then the influence of parameter deviation is explicitly separated

$${\ddot{u}}_{\mathrm{C}}=b_{0}d+\left[f\left(\cdot \right)+\left({\displaystyle \frac{1}{{\eta }_{\mathrm{L}}{\eta }_{\mathrm{C}}}}-1\right)b_{0}d\right]$$

(42)

The additional disturbance caused by parameter perturbations can be expressed as

$$f_{\mathrm{param}}=\left({\displaystyle \frac{1}{{\eta }_{\mathrm{L}}{\eta }_{\mathrm{C}}}}-1\right)b_{0}d$$

(43)

The extended state vector, which includes the total disturbance, is given by

$$f_{\mathrm{total}}=f\left(\cdot \right)+f_{\mathrm{param}}=\Delta f_{\mathrm{model}}+f_{\mathrm{CPL}}+f_{\mathrm{external}}+f_{\mathrm{param}}$$

(44)

In summary, any variations in inductance and capacitance can be attributed to dynamic errors caused by deviations in control gain and thus be incorporated into the total disturbance. For any bounded function f(·), the LESO is capable of observing and compensating for it in real time.

5. Simulation and Experimental Results

5.1. Simulation Results

The performance and robustness of the proposed control strategy were assessed through simulations conducted on the MATLAB2020/Simulink platform based on the equivalent circuit shown in Figure 2, with the relevant parameters detailed in

Table 1. Key parameters of the test platform.

Variable	Symbol	Value
Input voltage	uin	50 V
Converter inductor	L	1.1 mH
Converter capacitor	C	840 uF
Constant impedance load	R	40 Ω
Switching frequency	fs	20 kHz
DC bus voltage	uC	80 V
Constant power load	PCPL	250 W

.

Operating Condition 1: CIL disturbance with negative-damping hybrid loads.

A stepwise disturbance test was performed to evaluate the system response under a CIL variation, with the results presented in Figure 6. The test began with a 40 Ω CIL and a 250 W CPL connected to the DC bus. The CIL was shed at t₁ and subsequently reconnected at t₃. The system demonstrated consistent stability across the various applied load changes. Notably, each CIL shed/load event induced a minor voltage deviation of approximately 3.6 V and was recovered within 19 ms, demonstrating the controller’s effectiveness in managing load disturbances.

Operating Condition 2: CPL disturbance with negative-damping hybrid loads.

Initially, 40 Ω CIL and 250 W CPL were connected to the DC bus. The CPL was disconnected at t₁ and reconnected CPL at t₃. As illustrated in Figure 7, during the disconnection process, the DC bus voltage exhibits a deviation of ~4 V with a recovery time of 18 ms. Conversely, during the reconnection process, the voltage deviation is ~4.3 V with a recovery time of about 20 ms. Throughout the entire transient process, the DC bus voltage remains stable, with no sustained oscillations or overshoots exceeding the allowable range.

Operating Condition 3: CPL disturbance.

The system was initially configured with only a 100 W CPL connected to the DC bus, thereby also operating in a negative-damping state. At t₁, the CPL was increased to 400 W (heavy-load state). At t₃, the CPL was reduced back to 100 W (light-load state). Figure 8 presents the corresponding dynamic responses of the u_C, u_in, and i_L during these load transitions, the DC bus voltage exhibits a peak deviation of approximately 4.6 V with a recovery time of 20 ms. Throughout the entire large-signal disturbance process, the system maintains stable operation without divergent oscillations or voltage collapse.

Operating Condition 4: power circuit parameter perturbation.

Under the initial conditions, a 40 Ω CIL and a 250 W CPL were connected to the DC bus. At t₁, the CPL was stepped up to 500 W, and at t₃, it was stepped down to 100 W. Figure 9 shows the dynamic response waveforms of the output voltage u_C and inductor current i_L for inductance values of 0.55 mH, 1.1 mH, and 2.2 mH. It can be seen that under the step disturbance of the CPL, the DC bus voltage remains stable regardless of the variation in inductance. These results demonstrate that the proposed control strategy exhibits excellent robustness against perturbations in the power circuit parameters of the system.

5.2. Experimental Results

The proposed strategy was validated on a dedicated low-voltage (80 V) DC microgrid test platform. As illustrated in Figure 10, the platform configuration comprises a DC power supply, a Boost converter, a mixed load, and a control board. The control board is built around a DSP (TMS320C6748) and an FPGA (EG4S20BG256): the DSP implements the control algorithm, whereas the FPGA handles data acquisition and pulse-width modulation (PWM) signal generation. For load emulation, a resistive load simulates the CIL, and an electronic load operating in constant power mode represents the CPL. Key parameters of the experimental setup are summarized in Table 1.

Experimental verification was conducted for Operating Condition 1. When the system was operating stably, a 40 Ω CIL and a 250 W CPL were connected to the DC bus. The CIL was disconnected at t₁ and reconnected at t₃. Figure 11 illustrates the dynamic response of the DC microgrid during the CIL switching transients. As clearly observed, throughout the disconnection and reconnection processes, the output voltage is maintained around the rated 80 V, with a peak deviation of approximately 3 V and a settling time of about 19 ms. No sustained oscillations or excessive deviations are observed, confirming the stable operation of the system under this test condition.

Experimental verification was carried out for Operating Condition 2, with a focus on the CPL disconnection and reconnection processes under a hybrid load. Initially, the system was operating stably with a 40 Ω CIL and a 250 W CPL connected to the DC bus. The CPL was disconnected at t₁ and reconnected at t₃. Figure 12 illustrates the corresponding dynamic response of the DC microgrid during these switching transients. As shown, both CPL disconnection and reconnection produce a transient peak voltage deviation of approximately 3.2 V. The output recovers to the rated 80 V within a settling time of about 20 ms in each case. Throughout the process, voltage stability is preserved without sustained oscillations or excessive overshoot.

The experimental results for Operating Condition 3 are given in Figure 13. Starting with only a 150 W CPL, the load was stepped up to 350 W at t₁, driving the system into a heavy-load state. Figure 13 shows that following this step change, both u_C and i_L settle to a new steady-state within about 19 ms, with the voltage exhibiting a transient dip of roughly 3.3 V. Throughout the large-signal disturbance, the DC bus voltage remains regulated around the rated 80 V, confirming the strategy’s fast recovery and excellent large-signal robustness.

The steady-state waveforms obtained from the parameter perturbation experiments are presented in Figure 14. The tests were conducted under the following conditions: an input voltage of u_in = 50 V, with the hybrid load comprising a 40 Ω CIL and a 250 W CPL, with the inductor parameter set to 0.55 mH, 1.1 mH, and 2.2 mH, respectively. The experimental results are as follows: in Figure 14a, with the inductor at 0.55 mH, the u_C remains stable at 80 V and the inductor current ripple $\Delta i_{\mathrm{L}}$ is 1.6 A. In Figure 14b, with the inductor at the nominal value of 1.1 mH, the u_C remains stable at 80 V and the $\Delta i_{\mathrm{L}}$ is approximately 0.8 A. In Figure 14c, when the inductor is increased to 2.2 mH, the u_C remains stable at 80 V and the $\Delta i_{\mathrm{L}}$ decreases to 0.4 A. The system maintains stability under all operating conditions, verifying the effectiveness of the proposed control algorithm in handling parameter variations.

6. Conclusions

To achieve voltage tracking and robust control for a Boost converter supplying hybrid loads over a wide operating range, this study carries out the following work. Firstly, an equivalent circuit model of a DC microgrid incorporating a constant power load is established. This model theoretically clarifies how the equivalent incremental admittance of the hybrid load affects the system damping. Subsequently, a control strategy is designed based on the LADRC framework. Its core mechanism lies in using a LESO to observe and actively compensate for the lumped total disturbance, which includes complex disturbances such as the nonlinear characteristics of the constant power load and parameter variations. This method linearizes the controlled plant, effectively mitigating the instability issues caused by negative damping and parameter perturbations. Finally, both simulation and experimental results demonstrate that the proposed strategy exhibits excellent control performance and robustness in handling load transients and parameter uncertainties.