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Integrated On-Chip Transformers: Recent Progress in the Design, Layout, Modeling and Fabrication

1
Faculty of Engineering and Natural Sciences, Sabanci University, Istanbul 34956, Turkey
2
Department of Electrical Engineering, University of Washington, Seattle, WA 98195, USA
3
Sabanci University SUNUM Nanotechnology Research Center, Istanbul 34956, Turkey
*
Author to whom correspondence should be addressed.
Sensors 2019, 19(16), 3535; https://doi.org/10.3390/s19163535
Received: 30 May 2019 / Revised: 29 July 2019 / Accepted: 1 August 2019 / Published: 13 August 2019
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Abstract

On-chip transformers are considered to be the primary components in many RF wireless applications. This paper provides an in-depth review of on-chip transformers, starting with a presentation on the various equivalent circuit models to represent transformer behavior and characterize their performance. Next, a comparative study on the different design and layout strategies is provided, and the fabrication techniques for on-chip implementation of transformers are discussed. The critical performance parameters to characterize on-chip transformers, such as the Q-factor, coupling factor (k), resonance frequency (fSR), and others, are discussed with reference to trade-offs in silicon chip real-estate. The performance parameters and area requirements for different types of on-chip transformers are summarized in tabular form and compared. Several techniques for performance enhancement of on-chip transformers, including the different types of micromachining and integration approaches stemming from MEMS (microelectromechanical systems) technologies are also analyzed. Lastly, the different uses and applications of on-chip transformers are discussed to highlight the evolution of on-chip transformer technology over the recent years and provide directions for future work in this field. View Full-Text
Keywords: on-chip transformer; CMOS integration; RF-MEMS transformer; monolithic; balun; coupling coefficient; modeling; power gain; Q-factor; self-resonance frequency; interleaved layout; stacked layout; transformer characteristic resistance; RFIC; LNA; 5G on-chip transformer; CMOS integration; RF-MEMS transformer; monolithic; balun; coupling coefficient; modeling; power gain; Q-factor; self-resonance frequency; interleaved layout; stacked layout; transformer characteristic resistance; RFIC; LNA; 5G
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).
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Bajwa, R.; Yapici, M.K. Integrated On-Chip Transformers: Recent Progress in the Design, Layout, Modeling and Fabrication. Sensors 2019, 19, 3535.

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