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Keywords = wafer curvature

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8 pages, 1555 KiB  
Article
Effect of Annealing Time of GaN Buffer Layer on Curvature and Wavelength Uniformity of Epitaxial Wafer
by Huanyou Wang, Guangqi Xie and Yingying Zhan
Condens. Matter 2025, 10(2), 28; https://doi.org/10.3390/condmat10020028 - 1 May 2025
Viewed by 647
Abstract
In this study, the curvature changes of an unintentionally doped GaN end and third quantum well were observed in situ when the annealing times of a GaN buffer layer were 40 s, 50 s and 55 s, respectively. When the annealing time was [...] Read more.
In this study, the curvature changes of an unintentionally doped GaN end and third quantum well were observed in situ when the annealing times of a GaN buffer layer were 40 s, 50 s and 55 s, respectively. When the annealing time was increased from 40 s to 50 s, the concave curvature of the unintentionally doped GaN end and the third quantum well became smaller. When the annealing time was increased to 55 s, there was no significant change in curvature. These curvature changes are related to the relaxation of the stress in the epitaxial wafer with different annealing times. With the increase in buffer annealing time, the compressive stress and warpage decreased gradually, and the photoluminescence wavelength of the sample became longer. Meanwhile, the standard deviation yield of the dominant wavelength was increased by 5.46%, and the wavelength yield was increased by 19.45% when the annealing time was changed from 40 s to 50 s. Full article
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10 pages, 3798 KiB  
Article
750 V Breakdown in GaN Buffer on 200 mm SOI Substrates Using Reverse-Stepped Superlattice Layers
by Shuzhen You, Yilong Lei, Liang Wang, Xing Chen, Ting Zhou, Yi Wang, Junbo Wang, Tong Liu, Xiangdong Li, Shenglei Zhao, Jincheng Zhang and Yue Hao
Micromachines 2024, 15(12), 1460; https://doi.org/10.3390/mi15121460 - 30 Nov 2024
Viewed by 1486
Abstract
In this work, we demonstrated the epitaxial growth of a gallium nitride (GaN) buffer structure on 200 mm SOI (silicon-on-insulator) substrates. This epitaxial layer is grown using a reversed stepped superlattice buffer (RSSL), which is composed of two superlattice (SL) layers with different [...] Read more.
In this work, we demonstrated the epitaxial growth of a gallium nitride (GaN) buffer structure on 200 mm SOI (silicon-on-insulator) substrates. This epitaxial layer is grown using a reversed stepped superlattice buffer (RSSL), which is composed of two superlattice (SL) layers with different Al component ratios stacked in reverse order. The upper layer, with a higher Al component ratio, introduces tensile stress instead of accumulative compressive stress and reduces the in situ curvature of the wafer, thereby achieving a well-controlled wafer bow ≤ ±50 µm for a 3.3 µm thick buffer. Thanks to the compliant SOI substrate, good crystal quality of the grown GaN layers was obtained, and a breakdown voltage of 750 V for a 3.3 µm thick GaN buffer was achieved. The breakdown field strength of the epitaxial GaN buffer layer on the SOI substrate is estimated to be ~2.27 MV/cm, which is higher than the breakdown field strength of the GaN-on-Si epitaxial buffer layer. This RSSL buffer also demonstrated a low buffer dispersion of less than 10%, which is good enough for the further processing of device and circuit fabrication. A D-mode GaN HEMT was fabricated on this RSSL buffer, which showed a good on/off ratio of ~109 and a breakdown voltage of 450 V. Full article
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13 pages, 5797 KiB  
Article
Curvature-Compensated Bandgap Voltage Reference with Low Temperature Coefficient
by Xiaohui Li, Jitao Li, Ming Qiao and Bo Zhang
Electronics 2024, 13(22), 4490; https://doi.org/10.3390/electronics13224490 - 15 Nov 2024
Cited by 1 | Viewed by 1517
Abstract
Resistance errors in bandgap reference (BGR) circuits often cause deviations in design indicators, and it is true that utilizing various compensation techniques mitigates the impact of resistance errors. In this paper, an original BGR circuit with 180 nm BCD processing is presented, which [...] Read more.
Resistance errors in bandgap reference (BGR) circuits often cause deviations in design indicators, and it is true that utilizing various compensation techniques mitigates the impact of resistance errors. In this paper, an original BGR circuit with 180 nm BCD processing is presented, which uses an improved high-order compensation and curvature compensation. The proposed BGR contains four main blocks, including a start-up stage, a first-order temperature compensation stage, a high-order temperature compensation stage, and a curvature compensation stage. Meanwhile, a trimming resistor array structure is designed to revise the temperature coefficient (TC) deviation of the test output voltage from the theoretical design value. Through wafer-level laser trimming technology, the measurement results are achieved with very little difference from the theoretical design value. The proposed BGR provides a stable reference voltage at 1.25 V with a low TC and strong power supply rejection (PSR). Within temperatures ranging from −45 °C to 125 °C, the measured TC shows an optimal value at 4.2 ppm/°C and the measured PSR shows −100 dB. Full article
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17 pages, 13477 KiB  
Article
Hybrid Bright-Dark-Field Microscopic Fringe Projection System for Cu Pillar Height Measurement in Wafer-Level Package
by Dezhao Wang, Weihu Zhou, Zili Zhang and Fanchang Meng
Sensors 2024, 24(16), 5157; https://doi.org/10.3390/s24165157 - 9 Aug 2024
Viewed by 1622
Abstract
Cu pillars serve as interconnecting structures for 3D chip stacking in heterogeneous integration, whose height uniformity directly impacts chip yield. Compared to typical methods such as white-light interferometry and confocal microscopy for measuring Cu pillars, microscopic fringe projection profilometry (MFPP) offers obvious advantages [...] Read more.
Cu pillars serve as interconnecting structures for 3D chip stacking in heterogeneous integration, whose height uniformity directly impacts chip yield. Compared to typical methods such as white-light interferometry and confocal microscopy for measuring Cu pillars, microscopic fringe projection profilometry (MFPP) offers obvious advantages in throughput, which has great application value in on-line bump height measurement in wafer-level packages. However, Cu pillars with large curvature and smooth surfaces pose challenges for signal detection. To enable the MFPP system to measure both the top region of the Cu pillar and the substrate, which are necessary for bump height measurement, we utilized rigorous surface scattering theory to solve the bidirectional reflective distribution function of the Cu pillar surface. Subsequently, leveraging the scattering distribution properties, we propose a hybrid bright-dark-field MFPP system concept capable of detecting weakly scattered signals from the top of the Cu pillar and reflected signals from the substrate. Experimental results demonstrate that the proposed MFPP system can measure the height of Cu pillars with an effective field of view of 15.2 mm × 8.9 mm and a maximum measurement error of less than 0.65 μm. Full article
(This article belongs to the Collection 3D Imaging and Sensing System)
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16 pages, 5619 KiB  
Article
Determination of the Equivalent Thickness of a Taiko Wafer Using ANSYS Finite Element Analysis
by Vincenzo Vinciguerra, Giuseppe Luigi Malgioglio, Antonio Landi and Marco Renna
Appl. Sci. 2023, 13(14), 8528; https://doi.org/10.3390/app13148528 - 24 Jul 2023
Cited by 5 | Viewed by 2222
Abstract
The successful handling of large semiconductor wafers is crucial for scaling up their production. Early-stage warpage control allows the prevention of undesirable asymmetric warpage, known as wafer bifurcation or buckling. Indeed, even in a gravity-free environment, thinning an 8″ or 12″ semiconductor wafer [...] Read more.
The successful handling of large semiconductor wafers is crucial for scaling up their production. Early-stage warpage control allows the prevention of undesirable asymmetric warpage, known as wafer bifurcation or buckling. Indeed, even in a gravity-free environment, thinning an 8″ or 12″ semiconductor wafer can result in warpage and bifurcation. To mitigate this issue, the taiko method, which involves creating a thicker ring region around the rim of the wafer, has been widely used. Previous research has focused on the theoretical factors affecting the warpage of a backside metalized taiko wafer. This work extends the case to a front-side metalized taiko wafer and introduces the concept of the equivalent thickness of a taiko wafer. The equivalent thickness of a taiko wafer, influenced by the ring region, lies in between the thickness of the central region and that of the annular region. Because of the limited number of taiko wafers that can be produced on a production line, modelling can be beneficial. In this work we compared the results of a developed analytical model with those obtained from a finite element analysis (FEA) approach with ANSYSY® Mechanical Enterprise 2022/R2 software to model the equivalent thickness of a taiko wafer. We investigated the curvature as a function of the stress of the metal layer, considering key design factors such as the substrate region thickness, the thickness of the thin metal film, the step height, and the width of the ring region. By systematically varying the thickness of the central region of the taiko wafer, we explored the curvature as a function of stress induced by thermal load in the linear regime and determined the slopes in the linear region of the curvature vs. stress curves. The aim of this study is to identify regularities and similarities with the Stoney equation and investigate the validity of the analytical approach for the case of a taiko substrate. The results show that there is a good agreement between the analytical model of a taiko wafer and the numerical analysis gained by the FEA methods. Full article
(This article belongs to the Section Mechanical Engineering)
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17 pages, 6906 KiB  
Article
Fixed-Diamond Abrasive Wire-Saw Cutting Force Modeling Based on Changes in Contact Arc Lengths
by Lie Liang, Shujuan Li, Kehao Lan, Jiabin Wang and Ruijiang Yu
Micromachines 2023, 14(6), 1275; https://doi.org/10.3390/mi14061275 - 20 Jun 2023
Cited by 9 | Viewed by 4445
Abstract
Monocrystalline silicon is widely used in the semiconductor market, but its hard and brittle physical properties make processing difficult. Fixed-diamond abrasive wire-saw (FAW) cutting is currently the most commonly used cutting method for hard and brittle materials due to advantages such as narrow [...] Read more.
Monocrystalline silicon is widely used in the semiconductor market, but its hard and brittle physical properties make processing difficult. Fixed-diamond abrasive wire-saw (FAW) cutting is currently the most commonly used cutting method for hard and brittle materials due to advantages such as narrow cutting seams, low pollution, low cutting force and simple cutting process. During the process of cutting a wafer, the contact between the part and the wire is curved, and the arc length changes during the cutting process. This paper establishes a model of contact arc length by analyzing the cutting system. At the same time, a model of the random distribution of abrasive particles is established to solve the cutting force during the cutting process, using iterative algorithms to calculate cutting forces and chip surface saw marks. The error between the experiment and simulation of the average cutting force in the stable stage is less than 6%, and the errors with respect to the central angle and curvature of the saw arc on the wafer surface are less than 5% between the experiment and simulation. The relationship between the bow angle, contact arc length and cutting parameters is studied using simulations. The results show that the variation trend of the bow angle and contact arc length is consistent, increasing with an increase in the part feed rate and decreasing with an increase in the wire velocity. Full article
(This article belongs to the Section D:Materials and Processing)
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19 pages, 7822 KiB  
Article
A Versatile Suspended Lipid Membrane System for Probing Membrane Remodeling and Disruption
by Achinta Sannigrahi, Vishwesh Haricharan Rai, Muhsin Vannan Chalil, Debayani Chakraborty, Subrat Kumar Meher and Rahul Roy
Membranes 2022, 12(12), 1190; https://doi.org/10.3390/membranes12121190 - 25 Nov 2022
Cited by 1 | Viewed by 3169
Abstract
Artificial membrane systems can serve as models to investigate molecular mechanisms of different cellular processes, including transport, pore formation, and viral fusion. However, the current, such as SUVs, GUVs, and the supported lipid bilayers suffer from issues, namely high curvature, heterogeneity, and surface [...] Read more.
Artificial membrane systems can serve as models to investigate molecular mechanisms of different cellular processes, including transport, pore formation, and viral fusion. However, the current, such as SUVs, GUVs, and the supported lipid bilayers suffer from issues, namely high curvature, heterogeneity, and surface artefacts, respectively. Freestanding membranes provide a facile solution to these issues, but current systems developed by various groups use silicon or aluminum oxide wafers for fabrication that involves access to a dedicated nanolithography facility and high cost while conferring poor membrane stability. Here, we report the development, characterization and applications of an easy-to-fabricate suspended lipid bilayer (SULB) membrane platform leveraging commercial track-etched porous filters (PCTE) with defined microwell size. Our SULB system offers a platform to study the lipid composition-dependent structural and functional properties of membranes with exceptional stability. With dye entrapped in PCTE microwells by SULB, we show that sphingomyelin significantly augments the activity of pore-forming toxin, Cytolysin A (ClyA) and the pore formation induces lipid exchange between the bilayer leaflets. Further, we demonstrate high efficiency and rapid kinetics of membrane fusion by dengue virus in our SULB platform. Our suspended bilayer membrane mimetic offers a novel platform to investigate a large class of biomembrane interactions and processes. Full article
(This article belongs to the Special Issue Artificial Models of Biological Membranes)
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9 pages, 3721 KiB  
Article
Progress in Near-Equilibrium Ammonothermal (NEAT) Growth of GaN Substrates for GaN-on-GaN Semiconductor Devices
by Tadao Hashimoto, Edward R. Letts and Daryl Key
Crystals 2022, 12(8), 1085; https://doi.org/10.3390/cryst12081085 - 3 Aug 2022
Cited by 16 | Viewed by 2865
Abstract
This paper reviews the near-equilibrium ammonothermal (NEAT) growth of bulk gallium nitride (GaN) crystals and reports the evaluation of 2″ GaN substrates and 100 mmbulk GaN crystal grown in our pilot production reactor. Recent progress in oxygen reduction enabled growing NEAT GaN substrates [...] Read more.
This paper reviews the near-equilibrium ammonothermal (NEAT) growth of bulk gallium nitride (GaN) crystals and reports the evaluation of 2″ GaN substrates and 100 mmbulk GaN crystal grown in our pilot production reactor. Recent progress in oxygen reduction enabled growing NEAT GaN substrates with lower residual oxygen, coloration, and optical absorption. The oxygen concentration was approximately 2 × 1018 cm−2, and the optical absorption coefficient was 1.3 cm−1 at 450 nm. Maps of full-width half maximum (FWHM) of X-ray diffraction rocking curveswere generated for grown crystals and finished wafers. The X-ray rocking curve maps confirmed high-quality and uniform microstructure across the entire surface of the bulk crystals and substrates. The average FWHM of the 50 best bulk crystals from the recent batch was 28 ± 4 arcsec for the 002 diffraction and 34 ± 5 arcsec for the 201 diffraction, with an average radius of curvature of 20 m. X-ray topography measured on both sides of the bulk crystals implied that the density of dislocations wasreduced by one order of magnitude during the NEAT growth. A typical NEAT GaN substrate shows dislocation density of about 2 × 105 cm−2. Full article
(This article belongs to the Special Issue Research in GaN-based Materials and Devices)
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11 pages, 47404 KiB  
Article
Batch Fabrication of Wear-Resistant and Conductive Probe with PtSi Tip
by Meijie Liu, Yinfang Zhu, Junyuan Zhao, Lihao Wang, Jinling Yang and Fuhua Yang
Micromachines 2021, 12(11), 1326; https://doi.org/10.3390/mi12111326 - 28 Oct 2021
Viewed by 2174
Abstract
This paper presents a simple and reliable routine for batch fabrication of wear-resistant and conductive probe with a PtSi tip. The fabrication process is based on inductively coupled plasma (ICP) etching, metal evaporation, and annealing. Si tips with curvature radii less than 10 [...] Read more.
This paper presents a simple and reliable routine for batch fabrication of wear-resistant and conductive probe with a PtSi tip. The fabrication process is based on inductively coupled plasma (ICP) etching, metal evaporation, and annealing. Si tips with curvature radii less than 10 nm were produced with good wafer-level uniformity using isotropic etching and thermal oxygen sharpening. The surface roughness of the etched tip post was reduced by optimized isotropic etching. The dependence of the platinum silicide morphology on annealing conditions were also systematically investigated, and conductive and wear-resistant probes with PtSi tips of curvature radii less than 30 nm were batch fabricated and applied for scanning piezoelectric samples. Full article
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9 pages, 14958 KiB  
Article
Angstrom-Scale Active Width Control of Nano Slits for Variable Plasmonic Cavity
by Dukhyung Lee, Dohee Lee, Hyeong Seok Yun and Dai-Sik Kim
Nanomaterials 2021, 11(9), 2463; https://doi.org/10.3390/nano11092463 - 21 Sep 2021
Cited by 4 | Viewed by 3074
Abstract
Nanogap slits can operate as a plasmonic Fabry–Perot cavity in the visible and infrared ranges due to the gap plasmon with an increased wavenumber. Although the properties of gap plasmon are highly dependent on the gap width, active width tuning of the plasmonic [...] Read more.
Nanogap slits can operate as a plasmonic Fabry–Perot cavity in the visible and infrared ranges due to the gap plasmon with an increased wavenumber. Although the properties of gap plasmon are highly dependent on the gap width, active width tuning of the plasmonic cavity over the wafer length scale was barely realized. Recently, the fabrication of nanogap slits on a flexible substrate was demonstrated to show that the width can be adjusted by bending the flexible substrate. In this work, by conducting finite element method (FEM) simulation, we investigated the structural deformation of nanogap slit arrays on an outer bent polydimethylsiloxane (PDMS) substrate and the change of the optical properties. We found that the tensile deformation is concentrated in the vicinity of the gap bottom to widen the gap width proportionally to the substrate curvature. The width widening leads to resonance blueshift and field enhancement decrease. Displacement ratio ((width change)/(supporting stage translation)), which was identified to be proportional to the substrate thickness and slit period, is on the order of 10−5 enabling angstrom-scale width control. This low displacement ratio comparable to a mechanically controllable break junction highlights the great potential of nanogap slit structures on a flexible substrate, particularly in quantum plasmonics. Full article
(This article belongs to the Special Issue Nano-Optics: Novel Research on Theory and Applications)
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13 pages, 2656 KiB  
Article
Warpage Behavior on Silicon Semiconductor Device: The Impact of Thick Copper Metallization
by Michele Calabretta, Alessandro Sitta, Salvatore Massimo Oliveri and Gaetano Sequenzia
Appl. Sci. 2021, 11(11), 5140; https://doi.org/10.3390/app11115140 - 1 Jun 2021
Cited by 8 | Viewed by 6427
Abstract
Electrochemical deposited (ECD) thick film copper on silicon substrate is one of the most challenging technological brick for semiconductor industry representing a relevant improvement from the state of art because of its excellent electrical and thermal conductivity compared with traditional materials, such as [...] Read more.
Electrochemical deposited (ECD) thick film copper on silicon substrate is one of the most challenging technological brick for semiconductor industry representing a relevant improvement from the state of art because of its excellent electrical and thermal conductivity compared with traditional materials, such as aluminum. The main technological factor that makes challenging the industrial implementation of thick copper layer is the severe wafer warpage induced by Cu annealing process, which negatively impacts the wafer manufacturability. The aim of presented work is the understanding of warpage variation during annealing process of ECD thick (20 μm) copper layer. Warpage is experimentally characterized at different temperature by means of Phase-Shift Moiré principle, according to different annealing profiles. Physical analysis is employed to correlated the macroscopic warpage behavior with microstructure modification. A linear Finite Element Model (FEM) is developed to predict the geometrically stress-curvature relation, comparing results with analytical models. Full article
(This article belongs to the Special Issue New Trends in Design Engineering)
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14 pages, 6641 KiB  
Article
A New Approach for the Control and Reduction of Warpage and Residual Stresses in Bonded Wafer
by Seyed Amir Fouad Farshchi Yazdi, Matteo Garavaglia, Aldo Ghisi and Alberto Corigliano
Micromachines 2021, 12(4), 361; https://doi.org/10.3390/mi12040361 - 26 Mar 2021
Cited by 11 | Viewed by 4703
Abstract
A geometrical modification on silicon wafers before the bonding process, aimed to decrease (1) the residual stress caused by glass frit bonding, is proposed. Finite element modeling showed that (2) by introducing this modification, the wafer out-of-plane deflection was decreased by 34%. Moreover, [...] Read more.
A geometrical modification on silicon wafers before the bonding process, aimed to decrease (1) the residual stress caused by glass frit bonding, is proposed. Finite element modeling showed that (2) by introducing this modification, the wafer out-of-plane deflection was decreased by 34%. Moreover, (3) fabricated wafers with the proposed geometrical feature demonstrated an improvement for the (4) warpage with respect to the plain wafers. A benefit for curvature variation and overall shape of the (5) bonded wafers was also observed. Full article
(This article belongs to the Special Issue Advanced MEMS/NEMS Technology, Volume III)
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13 pages, 66914 KiB  
Article
Evaluation of Warpage and Residual Stress of Precision Glass Micro-Optics Heated by Carbide-Bonded Graphene Coating in Hot Embossing Process
by Lihua Li and Jian Zhou
Nanomaterials 2021, 11(2), 363; https://doi.org/10.3390/nano11020363 - 1 Feb 2021
Cited by 8 | Viewed by 3488
Abstract
A newly developed hot embossing technique which uses the localized rapid heating of a thin carbide-bonded graphene (CBG) coating, greatly reduces the energy consumption and promotes the fabrication efficiency. However, because of the non-isothermal heat transfer process, significant geometric deviation and residual stress [...] Read more.
A newly developed hot embossing technique which uses the localized rapid heating of a thin carbide-bonded graphene (CBG) coating, greatly reduces the energy consumption and promotes the fabrication efficiency. However, because of the non-isothermal heat transfer process, significant geometric deviation and residual stress could be introduced. In this paper, we successfully facilitate the CBG-heating-based hot embossing into the fabrication of microlens array on inorganic glass N-BK7 substrate, where the forming temperature is as high as 800 °C. The embossed microlens array has high replication fidelity, but an obvious geometric warpage along the glass substrate also arises. Thermo-mechanical coupled finite element modelling of the embossing process is conducted and verified by the experimental results. Based on trial and error simulations, an appropriate compensation curvature is determined and adopted to modify the geometrical design of the silicon wafer mold. The warpage of the re-embossed microlens array is significantly decreased using the compensated mold, which demonstrates the feasibility of the simulation-oriented compensation scheme. Our work would contribute to improving the quality of optics embossed by this innovative CBG-heating-based hot embossing technique. Full article
(This article belongs to the Special Issue Synthesis, Functionalization and Applications of Nanocarbons)
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30 pages, 6578 KiB  
Review
In Situ and Real-Time Nanoscale Monitoring of Ultra-Thin Metal Film Growth Using Optical and Electrical Diagnostic Tools
by Jonathan Colin, Andreas Jamnig, Clarisse Furgeaud, Anny Michel, Nikolaos Pliatsikas, Kostas Sarakinos and Gregory Abadias
Nanomaterials 2020, 10(11), 2225; https://doi.org/10.3390/nano10112225 - 9 Nov 2020
Cited by 27 | Viewed by 5319
Abstract
Continued downscaling of functional layers for key enabling devices has prompted the development of characterization tools to probe and dynamically control thin film formation stages and ensure the desired film morphology and functionalities in terms of, e.g., layer surface smoothness or electrical properties. [...] Read more.
Continued downscaling of functional layers for key enabling devices has prompted the development of characterization tools to probe and dynamically control thin film formation stages and ensure the desired film morphology and functionalities in terms of, e.g., layer surface smoothness or electrical properties. In this work, we review the combined use of in situ and real-time optical (wafer curvature, spectroscopic ellipsometry) and electrical probes for gaining insights into the early growth stages of magnetron-sputter-deposited films. Data are reported for a large variety of metals characterized by different atomic mobilities and interface reactivities. For fcc noble-metal films (Ag, Cu, Pd) exhibiting a pronounced three-dimensional growth on weakly-interacting substrates (SiO2, amorphous carbon (a-C)), wafer curvature, spectroscopic ellipsometry, and resistivity techniques are shown to be complementary in studying the morphological evolution of discontinuous layers, and determining the percolation threshold and the onset of continuous film formation. The influence of growth kinetics (in terms of intrinsic atomic mobility, substrate temperature, deposition rate, deposition flux temporal profile) and the effect of deposited energy (through changes in working pressure or bias voltage) on the various morphological transition thicknesses is critically examined. For bcc transition metals, like Fe and Mo deposited on a-Si, in situ and real-time growth monitoring data exhibit transient features at a critical layer thickness of ~2 nm, which is a fingerprint of an interface-mediated crystalline-to-amorphous phase transition, while such behavior is not observed for Ta films that crystallize into their metastable tetragonal β-Ta allotropic phase. The potential of optical and electrical diagnostic tools is also explored to reveal complex interfacial reactions and their effect on growth of Pd films on a-Si or a-Ge interlayers. For all case studies presented in the article, in situ data are complemented with and benchmarked against ex situ structural and morphological analyses. Full article
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9 pages, 9927 KiB  
Article
Stress and Refractive Index Control of SiO2 Thin Films for Suspended Waveguides
by Neal Wostbrock and Tito Busani
Nanomaterials 2020, 10(11), 2105; https://doi.org/10.3390/nano10112105 - 23 Oct 2020
Cited by 7 | Viewed by 3420
Abstract
Film stress and refractive index play an important role in the fabrication of suspended waveguides. SiO2 waveguides were successfully fabricated on multiple substrates including Si, Ge, and Al2O3 wafers; the waveguides were deposited using inductively coupled plasma chemical vapor [...] Read more.
Film stress and refractive index play an important role in the fabrication of suspended waveguides. SiO2 waveguides were successfully fabricated on multiple substrates including Si, Ge, and Al2O3 wafers; the waveguides were deposited using inductively coupled plasma chemical vapor deposition at 100 °C. The precursor gases were SiH4 and N2O at 1:3 and 1:9 ratios with variable flow rates. The occurrence of intrinsic stress was validated through the fabrication of suspended SiO2 bridges, where the curvature of the bridge corresponded to measured intrinsic stress, which measured less than 1 µm thick and up to 50 µm in length. The flow rates allow film stress tunability between 50 and −65 MPa, where a negative number indicates a compressive state of the SiO2. We also found that the gas ratios have a slight influence on the refractive index in the UV and visible range but do not affect the stress in the SiO2 bridges. To test if this method can be used to produce multi-layer devices, three layers of SiO2 bridges with air cladding between each bridge were fabricated on a silicon substrate. We concluded that a combination of low temperature deposition (100 °C) and photoresist as the sacrificial layer allows for versatile SiO2 bridge fabrication that is substrate and refractive index independent, providing a framework for future tunable waveguide fabrication. Full article
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