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Keywords = wafer bin map

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14 pages, 1512 KB  
Article
YOLO-LA: Prototype-Based Vision–Language Alignment for Silicon Wafer Defect Pattern Detection
by Ziyue Wang, Yichen Yang, Jianning Chu, Yikai Zang, Zhongdi She, Weikang Fang and Ruoxin Wang
Micromachines 2026, 17(1), 67; https://doi.org/10.3390/mi17010067 - 31 Dec 2025
Viewed by 607
Abstract
With the rapid development of semiconductor manufacturing technology, methods to effectively control the production process, reduce variation in the manufacturing process, and improve the yield rate represent important competitive factors for wafer factories. Wafer bin maps, a method for characterizing wafer defect patterns, [...] Read more.
With the rapid development of semiconductor manufacturing technology, methods to effectively control the production process, reduce variation in the manufacturing process, and improve the yield rate represent important competitive factors for wafer factories. Wafer bin maps, a method for characterizing wafer defect patterns, provide valuable information for engineers to quickly identify potential root causes through accurate pattern recognition. Vision-based deep learning approaches rely on visual patterns to achieve robust performance. However, they rarely exploit the rich semantic information embedded in defect descriptions, limiting interpretability and generalization. To address this gap, we propose YOLO-LA, a lightweight prototype-based vision–language alignment framework that integrates a pretrained frozen YOLO backbone with a frozen text encoder to enhance wafer defect recognition. A learnable projection head is introduced to map visual features into a shared embedding space, enabling classification through cosine similarity Experimental results on the WM-811K dataset demonstrate that YOLO-LA consistently improves classification accuracy across different backbones while introducing minimal additional parameters. In particular, YOLOv12 achieves the fastest speed while maintaining competitive accuracy, whereas YOLOv10 benefits most from semantic prototype alignment. The proposed framework is lightweight and suitable for real-time industrial wafer inspection systems. Full article
(This article belongs to the Special Issue Future Trends in Ultra-Precision Machining)
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25 pages, 7827 KB  
Article
Fuzzy Inference System for Interpretable Classification of Wafer Map Defect Patterns
by Seo Young Park and Tae Seon Kim
Electronics 2026, 15(1), 130; https://doi.org/10.3390/electronics15010130 - 26 Dec 2025
Viewed by 310
Abstract
Accurate classification of wafer map defect patterns is crucial for enhancing yield in semiconductor manufacturing. To address the problem of deep learning model over-fitting to label noise present in real industrial data, this study proposes a fuzzy logic-based framework for identifying both single [...] Read more.
Accurate classification of wafer map defect patterns is crucial for enhancing yield in semiconductor manufacturing. To address the problem of deep learning model over-fitting to label noise present in real industrial data, this study proposes a fuzzy logic-based framework for identifying both single and composite-type defect patterns. To demonstrate the robustness of our approach, we utilized the public dataset WM-811K and developed a Fuzzy Inference System (FIS) that leverages quantitative metrics such as the Center Zone Density (CZD). Data quality was also improved through preprocessing steps, including resolving class imbalances and refining labels via expert review. The performance of the proposed FIS was evaluated against a quantitative feature-based neural network, an FIS-neural network hybrid, and a CNN model. Experimental results showed that in single-pattern classification, the proposed FIS model achieved the highest accuracy of 99.20%, followed by the feature-based neural network (91.63%), the FIS-neural network hybrid model (88.55%), and the CNN (81.06%). These results prove that the proposed FIS approach maintains high classification accuracy while offering the advantages of interpretability and rule-based adjustability. This framework presents a practical solution that can effectively integrate domain knowledge to reduce the risk of overfitting in data environments with imperfect labels. Full article
(This article belongs to the Section Semiconductor Devices)
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18 pages, 1514 KB  
Article
Contrastive Learning with Global and Local Representation for Mixed-Type Wafer Defect Recognition
by Shantong Yin, Yangkun Zhang and Rui Wang
Sensors 2025, 25(4), 1272; https://doi.org/10.3390/s25041272 - 19 Feb 2025
Cited by 1 | Viewed by 2310
Abstract
Recognizing defect patterns in semiconductor wafer bin maps (WBMs) poses a critical challenge in the integrated circuit (IC) manufacturing industry. The accurate classification and segmentation of these defect patterns are of utmost significance as they are key to tracing the root causes of [...] Read more.
Recognizing defect patterns in semiconductor wafer bin maps (WBMs) poses a critical challenge in the integrated circuit (IC) manufacturing industry. The accurate classification and segmentation of these defect patterns are of utmost significance as they are key to tracing the root causes of defects, thereby reducing costs and enhancing both product efficiency and quality. As the manufacturing process grows in complexity, the WBM becomes intricate when multiple defect patterns coexist on a single wafer, making the recognition task increasingly complicated. In addition, traditional supervised learning methods require a large number of labeled samples, which is labor-intensive. In this paper, we present a self-supervised contrastive learning framework for the classification and segmentation of mixed-type WBM defect patterns. Our model incorporates a global module for contrastive learning that captures image-level representations, alongside a local module that targets the comprehension of regional details, which is helpful for the segmentation of defective patterns. Experimental results demonstrate that our model performs effectively in scenarios where there is a limited number of labeled examples and a wealth of unlabeled ones. Full article
(This article belongs to the Section Fault Diagnosis & Sensors)
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35 pages, 6168 KB  
Article
Development of a Wafer Defect Pattern Classifier Using Polar Coordinate System Transformed Inputs and Convolutional Neural Networks
by Moo Hyun Kim and Tae Seon Kim
Electronics 2024, 13(7), 1360; https://doi.org/10.3390/electronics13071360 - 4 Apr 2024
Cited by 2 | Viewed by 4356
Abstract
Defect pattern analysis of wafer bin maps (WBMs) is an important means of identifying process problems. Recently, automated analysis methods using machine learning or deep learning have been studied as alternatives to manual classification by engineers. In this paper, we propose a method [...] Read more.
Defect pattern analysis of wafer bin maps (WBMs) is an important means of identifying process problems. Recently, automated analysis methods using machine learning or deep learning have been studied as alternatives to manual classification by engineers. In this paper, we propose a method to improve the feature extraction performance of defect patterns by transforming the polar coordinate system instead of the existing WBM image input. To reduce the variability of the location representation, defect patterns in the Cartesian coordinate system, where the location of the distributed defect die is not constant, were converted to a polar coordinate system. The CNN classifier, which uses polar coordinate transformed input, achieved a classification accuracy of 91.3%, which is 4.8% better than the existing WBM image-based CNN classifier. Additionally, a tree-structured classifier model that sequentially connects binary classifiers achieved a classification accuracy of 94%. The method proposed in this paper is also applicable to the defect pattern classification of WBMs consisting of different die sizes than the training data. Finally, the paper proposes an automated pattern classification method that uses individual classifiers to learn defect types and then applies ensemble techniques for multiple defect pattern classification. This method is expected to reduce labor, time, and cost and enable objective labeling instead of relying on subjective judgments of engineers. Full article
(This article belongs to the Special Issue Feature Papers in Semiconductor Devices)
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14 pages, 1910 KB  
Article
A Momentum Contrastive Learning Framework for Low-Data Wafer Defect Classification in Semiconductor Manufacturing
by Yi Wang, Dong Ni and Zhenyu Huang
Appl. Sci. 2023, 13(10), 5894; https://doi.org/10.3390/app13105894 - 10 May 2023
Cited by 7 | Viewed by 3980
Abstract
Wafer bin maps (WBMs) are essential test data in semiconductor manufacturing. WBM defect classification can provide critical information for the improvement of manufacturing processes and yield. Although deep-learning-based automatic defect classification models have demonstrated promising results in recent years, they require a substantial [...] Read more.
Wafer bin maps (WBMs) are essential test data in semiconductor manufacturing. WBM defect classification can provide critical information for the improvement of manufacturing processes and yield. Although deep-learning-based automatic defect classification models have demonstrated promising results in recent years, they require a substantial amount of labeled data for training, and manual labeling is time-consuming. Such limitations impede the practical application of existing algorithms. This study introduces a low-data defect classification algorithm based on contrastive learning. By employing momentum contrastive learning, the network extracts effective representations from large-scale unlabeled WBMs. Subsequently, a prototypical network is utilized for fine-tuning with only a minimal amount of labeled data to achieve low-data classification. Experimental results reveal that the momentum contrastive learning method improves the defect classification performance by learning feature representation from large-scale unlabeled data. The proposed method attains satisfactory classification accuracy using a limited amount of labeled data and surpasses other comparative methods in performance. This approach allows for the exploitation of information derived from large-scale unlabeled data, significantly reducing the reliance on labeled data. Full article
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22 pages, 2883 KB  
Article
Deep Convolutional Generative Adversarial Networks-Based Data Augmentation Method for Classifying Class-Imbalanced Defect Patterns in Wafer Bin Map
by Sangwoo Park and Cheolwoo You
Appl. Sci. 2023, 13(9), 5507; https://doi.org/10.3390/app13095507 - 28 Apr 2023
Cited by 12 | Viewed by 3871
Abstract
In the semiconductor industry, achieving a high production yield is a very important issue. Wafer bin maps (WBMs) provide critical information for identifying anomalies in the manufacturing process. A WBM forms a certain defect pattern according to the error occurring during the process, [...] Read more.
In the semiconductor industry, achieving a high production yield is a very important issue. Wafer bin maps (WBMs) provide critical information for identifying anomalies in the manufacturing process. A WBM forms a certain defect pattern according to the error occurring during the process, and by accurately classifying the defect pattern existing in the WBM, the root causes of the anomalies that have occurred during the process can be inferred. Therefore, WBM defect pattern recognition and classification tasks are important for improving yield. In this paper, we propose a deep convolutional generative adversarial network (DCGAN)-based data augmentation method to improve the accuracy of a convolutional neural network (CNN)-based defect pattern classifier in the presence of extremely imbalanced data. The proposed method forms various defect patterns compared to the data augmentation method by using a convolutional autoencoder (CAE), and the formed defect patterns are classified into the same pattern as the original pattern through a CNN-based defect pattern classifier. Here, we introduce a new quantitative index called PGI to compare the effectiveness of the augmented models, and propose a masking process to refine the augmented images. The proposed method was tested using the WM-811k dataset. The proposed method helps to improve the classification performance of the pattern classifier by effectively solving the data imbalance issue compared to the CAE-based augmentation method. The experimental results showed that the proposed method improved the accuracy of each defect pattern by about 5.31% on average compared to the CAE-based augmentation method. Full article
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17 pages, 854 KB  
Article
Efficient Convolutional Neural Networks for Semiconductor Wafer Bin Map Classification
by Eunmi Shin and Chang D. Yoo
Sensors 2023, 23(4), 1926; https://doi.org/10.3390/s23041926 - 8 Feb 2023
Cited by 20 | Viewed by 6744
Abstract
The results obtained in the wafer test process are expressed as a wafer map and contain important information indicating whether each chip on the wafer is functioning normally. The defect patterns shown on the wafer map provide information about the process and equipment [...] Read more.
The results obtained in the wafer test process are expressed as a wafer map and contain important information indicating whether each chip on the wafer is functioning normally. The defect patterns shown on the wafer map provide information about the process and equipment in which the defect occurred, but automating pattern classification is difficult to apply to actual manufacturing sites unless processing speed and resource efficiency are supported. The purpose of this study was to classify these defect patterns with a small amount of resources and time. To this end, we explored an efficient convolutional neural network model that can incorporate three properties: (1) state-of-the-art performances, (2) less resource usage, and (3) faster processing time. In this study, we dealt with classifying nine types of frequently found defect patterns: center, donut, edge-location, edge-ring, location, random, scratch, near-full type, and None type using open dataset WM-811K. We compared classification performance, resource usage, and processing time using EfficientNetV2, ShuffleNetV2, MobileNetV2 and MobileNetV3, which are the smallest and latest light-weight convolutional neural network models. As a result, the MobileNetV3-based wafer map pattern classifier uses 7.5 times fewer parameters than ResNet, and the training speed is 7.2 times and the inference speed is 4.9 times faster, while the accuracy is 98% and the F1 score is 89.5%, achieving the same level. Therefore, it can be proved that it can be used as a wafer map classification model without high-performance hardware in an actual manufacturing system. Full article
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10 pages, 2170 KB  
Article
Spatial Monitoring of Wafer Map Defect Data Based on 2D Wavelet Spectrum Analysis
by Munwon Lim and Suk Joo Bae
Appl. Sci. 2019, 9(24), 5518; https://doi.org/10.3390/app9245518 - 15 Dec 2019
Cited by 3 | Viewed by 4721
Abstract
Since machine vision systems (MVS) lead to a wide usage of monitoring systems for industrial applications, the research on the statistical process control (SPC) of image data has been promoted as an automated method for early detection and prevention of unusual conditions in [...] Read more.
Since machine vision systems (MVS) lead to a wide usage of monitoring systems for industrial applications, the research on the statistical process control (SPC) of image data has been promoted as an automated method for early detection and prevention of unusual conditions in manufacturing processes. In this paper, we propose a non-parametric SPC approach based on the 2D wavelet spectrum (WS-SPC) to extract the feature that contains the spatial and directional information of each subspace in an image. Using the 2D discrete wavelet transform and spectrum analysis, the representative statistic, the Hurst index, is calculated, and a single matrix space that consists of estimated statistics is reconstructed into a spatial control area for SPC. When a control limit is determined by the density of statistics, real-time monitoring based on WS-SPC is available for time releasing images. In the application, an analysis of wafer bin maps (WBMs) is conducted at a semiconductor company in Korea in order to evaluate the performance of the suggested approach. The results show that the proposed method is effective in terms of its fast computation speed and spectral monitoring. Full article
(This article belongs to the Special Issue Selected Papers from the ICMR 2019)
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22 pages, 1271 KB  
Article
Bin2Vec: A Better Wafer Bin Map Coloring Scheme for Comprehensible Visualization and Effective Bad Wafer Classification
by Junhong Kim, Hyungseok Kim, Jaesun Park, Kyounghyun Mo and Pilsung Kang
Appl. Sci. 2019, 9(3), 597; https://doi.org/10.3390/app9030597 - 11 Feb 2019
Cited by 19 | Viewed by 9880
Abstract
A wafer bin map (WBM), which is the result of an electrical die-sorting test, provides information on which bins failed what tests, and plays an important role in finding defective wafer patterns in semiconductor manufacturing. Current wafer inspection based on WBM has two [...] Read more.
A wafer bin map (WBM), which is the result of an electrical die-sorting test, provides information on which bins failed what tests, and plays an important role in finding defective wafer patterns in semiconductor manufacturing. Current wafer inspection based on WBM has two problems: good/bad WBM classification is performed by engineers and the bin code coloring scheme does not reflect the relationship between bin codes. To solve these problems, we propose a neural network-based bin coloring method called Bin2Vec to make similar bin codes are represented by similar colors. We also build a convolutional neural network-based WBM classification model to reduce the variations in the decisions made by engineers with different expertise by learning the company-wide historical WBM classification results. Based on a real dataset with a total of 27,701 WBMs, our WBM classification model significantly outperformed benchmarked machine learning models. In addition, the visualization results of the proposed Bin2Vec method makes it easier to discover meaningful WBM patterns compared with the random RGB coloring scheme. We expect the proposed framework to improve both efficiencies by automating the bad wafer classification process and effectiveness by assigning similar bin codes and their corresponding colors on the WBM. Full article
(This article belongs to the Section Electrical, Electronics and Communications Engineering)
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