Low Power Smart Sensors for the Internet of Things

A special issue of Journal of Low Power Electronics and Applications (ISSN 2079-9268).

Deadline for manuscript submissions: closed (15 October 2015) | Viewed by 11538

Special Issue Editors


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Guest Editor
Department of Electrical, Electronic & Computer Engineering, University of Western Australia, Perth, WA 6009, Australia
Interests: deep learning; pattern recognition; image sensors

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Guest Editor
VIRTUS IC Design Center of Excellence, School of EEE, Nanyang Technological University, Singapore, Singapore
Interests: mixed signal integrated circuits design for sensors; feature extracting biomimetic sensors for sensor networks; energy-efficient algorithms for object recognition; smart vision sensors; asynchronous VLSI circuits and systems

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Guest Editor
Nanyang Technological University, School of EEE, VIRTUS IC Design Center of Excellence, Singapore
Interests: design of bipolar; CMOS and BiCMOS analog/mixed signal ICs especially in the areas of low-voltage low-power circuits; Power Management Ics; PLLs and Data Converters
Klipsch School of Electrical and Computer Engineering, New Mexico State University, Mexico
Interests: analog mixed signal; digital, RF integrated circuit design; digital signal processing using delta sigma modulation; wireless communication using ultra wideband impulse radio; wearable/implantable low power electronics for biomedical applications

Special Issue Information

Dear Colleagues,

The Internet of Things (IoT) is the next wave of immense innovation for electronics, which is promising to change the whole world. At the heart of this diverse ecosystem are the various sensor nodes, including chemical, physical, electrical, optical, and acoustic devices. By reducing power consumption, these devices will be able to last much longer on their batteries, and require little to no maintenance. The drive to develop ultra-low power sensors will increasingly push the boundaries of IoT to new application areas.

This Special Issue invites innovative contributions in the quickly growing field of low power sensors for IoT. The sensing platforms to be considered cover a wide range of devices: imaging, optical, or acoustic. Low power techniques for sensor data collection, processing as well as wireless communications will be the focus of this issue.  Contributions may include, but are not limited to, device, circuit and system level techniques, simulation, and modeling techniques.

Dr. Shoushun Chen
Dr. Siek Liter
Dr. Wei Tang
Dr. Farid Boussaid
Guest Editors

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Keywords

  • Low power sensors
  • Power management for sensors
  • Low power design for the Internet of Things (IoT)
  • Sensors for the Internet of Things (IoT)

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Published Papers (1 paper)

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Article
Hardware-Efficient Delta Sigma-Based Digital Signal Processing Circuits for the Internet-of-Things
by Yifei Liu, Paul M. Furth and Wei Tang
J. Low Power Electron. Appl. 2015, 5(4), 234-256; https://doi.org/10.3390/jlpea5040234 - 9 Nov 2015
Cited by 21 | Viewed by 10928
Abstract
This paper presents hardware-efficient Delta Sigma linear processing circuits for the next generation low-power VLSI devices in the Internet-of-things (IoT).We first propose the P-N (positive-negative) pair method to manipulate both the analog value and length of a first-order Delta Sigma bit sequence. We [...] Read more.
This paper presents hardware-efficient Delta Sigma linear processing circuits for the next generation low-power VLSI devices in the Internet-of-things (IoT).We first propose the P-N (positive-negative) pair method to manipulate both the analog value and length of a first-order Delta Sigma bit sequence. We then present a binary counter method. Based on these methods, we develop Delta Sigma domain on-the-fly digital signal-processing circuits: the Delta Sigma sum adder, average adder and coefficient multiplier. The counter-based average adder can work with both first-order and higher-order Delta Sigma modulators and can also be used as a coefficient multiplier. The functionalities of the proposed circuits are verified by MATLAB simulation and FPGA implementation. We also compare the area and power between the proposed Delta Sigma adders and a conventional multi-bit adder by synthesizing both circuits in the IBM 0.18-μm technology. Synthesis results show that the proposed Delta Sigma processing circuits can extensively reduce circuit area and power. With 100 inputs, a Delta Sigma average adder saves 94% of the silicon area and 96% of the power compared to a multi-bit binary adder. The proposed circuits have the potential to be widely used in future IoT circuits. Full article
(This article belongs to the Special Issue Low Power Smart Sensors for the Internet of Things)
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