Energy Efficiency in Edge Computing

A special issue of Journal of Low Power Electronics and Applications (ISSN 2079-9268).

Deadline for manuscript submissions: closed (15 November 2023) | Viewed by 2446

Special Issue Editors

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Guest Editor
Department of Computer Science, University of Surrey, Surrey GU2 7XH, UK
Interests: energy efficiency; cloud computing; connected vehicles; edge computing; performance efficient data centers

Guest Editor
Faculty of Computing and Information Technology, Sohar University, Sohar P.O. Box 44, Oman
Interests: energy efficiency; Internet of Things; edge and cloud infrastructure; scheduling and resource management; algorithms, machine learning; mobile edge computing
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Special Issue Information

Dear Colleagues,

Energy efficiency in cloud and edge computing is becoming increasingly important as the number of connected devices and the volume of data they generate continue to grow. Edge computing is a distributed computing paradigm that enables data processing closer to the data source, such as in Internet of Things (IoT) devices, rather than in a centralized data center. The edge paradigm has several advantages over the traditional cloud service, such as reduced latency, increased bandwidth, and improved reliability. However, an edge infrastructure also requires a lot of energy to operate, which can be a challenge in terms of users’ monetary cost and environmental impact. According to an International Energy Agency (IEA) report, data centers worldwide consumed around 205 terawatt-hours (TWh) of electricity in 2020, which accounted for about 1% of global electricity consumption. The report also projected that the energy consumption of data centers could increase by 50% or more by 2030. Edge computing devices are typically smaller and consume less power than cloud data centers. However, edge devices may have limited resources and battery capacity, and the distributed nature of the system may lead to additional energy consumption in data transfer and synchronization.

Through implementing edge intelligence, the computing tasks can be offloaded from the cloud to the edge devices; therefore, this reduces the amount of data that needs to be transmitted and processed in the cloud. Besides intelligence, other techniques such as workload distribution, resource management, scheduling, and data compression might be helpful in reducing the energy consumption of edge infrastructure. This can save users’ costs, increase profit, and reduce network latency. Furthermore, although energy consumption is an issue, edge computing is considered as essential for enabling the next generation of services and applications that require high computational speeds and low latencies. Therefore, it is essential to look for possible approaches to minimize their energy consumption.

This Special Issue invites original works in all areas of cloud and edge computing, including IoT, with aim to decrease the energy consumption of edge infrastructure. The outcome will be a collection of articles that propose edge and cloud computing models and techniques with impacts on users’ costs, service performance, energy consumption (service providers’ economics), and ecological sustainability (CO2 emissions). Highly cited and reputable researchers from both academia and industry should be contacted for quality submissions and possible publications. The list of possible topics includes, but is not limited to, the following:

  • Optimization of workload distribution;
  • Intelligent power management;
  • Leveraging of renewable energy;
  • Energy-aware algorithms;
  • Efficient network communication;
  • Load balancing;
  • Dynamic resource allocation;
  • Serverless computing;
  • Energy-aware scheduling;
  • Data compression and aggregation;
  • Edge–cloud integration;
  • Resource placement and orchestration;
  • Energy, performance, and cost-efficient IoT, edge, and cloud service offerings;
  • Machine learning (ML) and artificial intelligence (AI) techniques and algorithms for intelligent computation over the edge infrastructure.

Dr. Lee Gillam
Dr. Zakarya Muhammad
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Journal of Low Power Electronics and Applications is an international peer-reviewed open access quarterly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 1800 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.


  • energy efficiency
  • edge computing
  • resource management
  • load balancing
  • energy aware algorithms
  • edge intelligence
  • Internet of Things

Published Papers (1 paper)

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11 pages, 3211 KiB  
A Low-Power Analog Cell for Implementing Spiking Neural Networks in 65 nm CMOS
by John S. Venker, Luke Vincent and Jeff Dix
J. Low Power Electron. Appl. 2023, 13(4), 55; - 17 Oct 2023
Viewed by 1799
A Spiking Neural Network (SNN) is realized within a 65 nm CMOS process to demonstrate the feasibility of its constituent cells. Analog hardware neural networks have shown improved energy efficiency in edge computing for real-time-inference applications, such as speech recognition. The proposed network [...] Read more.
A Spiking Neural Network (SNN) is realized within a 65 nm CMOS process to demonstrate the feasibility of its constituent cells. Analog hardware neural networks have shown improved energy efficiency in edge computing for real-time-inference applications, such as speech recognition. The proposed network uses a leaky integrate and fire neuron scheme for computation, interleaved with a Spike Timing Dependent Plasticity (STDP) circuit for implementing synaptic-like weights. The low-power, asynchronous analog neurons and synapses are tailored for the VLSI environment needed to effectively make use of hardware SSN systems. To demonstrate functionality, a feed-forward Spiking Neural Network composed of two layers, the first with ten neurons and the second with six, is implemented. The neuron design operates with 2.1 pJ of power per spike and 20 pJ per synaptic operation. Full article
(This article belongs to the Special Issue Energy Efficiency in Edge Computing)
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