Next Article in Journal
A Study of Pre-Injection Effects on Combustion, Emissions, and Performance of Methanol–Ammonia Dual-Fuel Engines
Previous Article in Journal
Ca(OH)2-Modified White Mud Sorbent with Enhanced Performance for SO2 Removal from Flue Gas
Previous Article in Special Issue
Reduced-Switch Active Power Filter with Modified One-Cycle Control for Non-Ideal Voltage Conditions
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

An Analytical Model for DC-Link Capacitor Ripple Current in Multi-Phase H-Bridge Inverters

1
School of Information and Artificial Intelligence, Nanchang Institute of Science and Technology, Nanchang 330108, China
2
School of Mechanical and Electrical Engineering, Wuhan Donghu University, Wuhan 430212, China
*
Author to whom correspondence should be addressed.
Processes 2026, 14(7), 1059; https://doi.org/10.3390/pr14071059
Submission received: 27 February 2026 / Revised: 22 March 2026 / Accepted: 24 March 2026 / Published: 26 March 2026
(This article belongs to the Special Issue Design, Control, Modeling and Simulation of Energy Converters)

Abstract

Ripple currents on the direct current (DC) bus in variable frequency drive (VFD) systems originate from motor load current fluctuations and the high-frequency switching of power devices. The resulting Joule heating within the DC-link capacitors is a primary driver of lifespan degradation. To address the lack of systematic models for multi-phase H-bridge inverters and the over-design caused by empirical methods, this paper proposes a novel analytical method that incorporates the 2kπ/N phase difference of parallel units for precise ripple current quantification. First, a dynamic DC-link capacitor model is established based on a single-phase H-bridge inverter, and the expressions for the instantaneous, average, and root mean square (RMS) input currents are derived. Furthermore, by introducing the 2kπ/N phase difference (where k = 0, 1, …, N − 1) among N parallel H-bridge units, a universal analytical expression for the RMS input current and its harmonic spectrum in a multi-phase system is obtained. The analysis reveals that ripple current harmonics concentrate at 2m × fsw (where m is a positive integer and fsw is switching frequency) and their sidebands (2m × fsw ± fo, fo is output fundamental frequency), and the coupling influence of modulation index and power factor angle on ripple amplitude is quantitatively characterized. A 12 × 160 kW twelve-phase H-bridge inverter is taken as a case study, and MATLAB (v2023b) simulations and hardware experiments demonstrate that the theoretical calculations are in close agreement with the simulated and measured results, with the errors of input current harmonic amplitudes all below 5%. Compared with traditional empirical design, the proposed method reduces the capacitor volume and cost by approximately 15–20% while ensuring system reliability. This method is directly extensible to other multi-phase inverter topologies, providing a theoretical foundation for the accurate selection of DC-link capacitors.

1. Introduction

In recent decades, multiphase variable-frequency drive (VFD) technology has experienced rapid advancement and widespread adoption across critical industrial sectors, including advanced manufacturing, marine propulsion, and renewable energy conversion. This widespread adoption is attributed to inherent advantages over traditional three-phase systems, such as reduced torque ripple, enhanced fault tolerance, and improved power density, which align with the escalating demands for high-performance and reliable electrical drive systems [1,2,3]. Within these multiphase inverter architectures, DC-link capacitors are indispensable, performing three critical functions: smoothing DC bus voltage fluctuations, suppressing transient voltage spikes from power device switching, and absorbing ripple currents. The operational performance and lifespan of these capacitors are predominantly determined by three key parameters: capacitance, equivalent series inductance (ESL), and equivalent series resistance (ESR) [1,2,3,4]. Among these, the ESR directly governs the capacitor’s ripple current capability. The ripple current, defined as the high-frequency alternating component superimposed on the DC bus, generates Joule heating when passing through the ESR. Excessive ripple current elevates the capacitor’s core temperature, accelerating dielectric aging and drastically shortening service life. The longevity of DC-link capacitors is thus governed by two interdependent factors—operating temperature and voltage stress—both directly correlated with the ripple current magnitude [5,6,7,8]. Despite the critical role of ripple current in capacitor performance, a notable research gap persists: the absence of systematic theoretical models for calculating ripple current in multiphase H-bridge inverters [9,10,11,12]. Consequently, accurate prediction of ripple current is a critical prerequisite for optimizing DC-link capacitor selection, prolonging the overall system lifetime, and enhancing the reliability of multiphase inverters.
Conventional design methodologies for DC-link capacitors primarily rely on empirical estimation or time-domain simulations. Empirical approaches often employ a subjective safety factor multiplied by the rated current, frequently leading to over-design, which increases the volume, weight, and cost of the capacitor bank while imposing unnecessary spatial constraints. Although more accurate, time-domain simulations are computationally intensive, especially for high-switching-frequency systems. This computational burden hinders their suitability for rapid parametric analysis and iterative design optimization, particularly under stringent demands for inverter miniaturization and extended mean time between failures (MTBF) [13,14,15]. In response, advanced analytical techniques have been explored. For instance, Li et al. [12] proposed a thermal modeling framework linking thermal stress to capacitor lifespan, while Xu et al. [11] developed a frequency-domain method for cascaded nine-level inverters. Kolar et al. [14] derived closed-form expressions for three-phase SVPWM inverters, a methodology now considered an industry standard. Kumar et al. [9] proposed a power system stability enhancement method for multi-phase inverters without involving DC-side ripple current analysis; Guo et al. [10] analyzed the DC-side ripple current of voltage source inverters but ignored the parallel superposition effect of multi-phase H-bridges. A modified formula for the minimum DC-link capacitor of multi-phase H-bridge inverters, based on the framework of Kumar et al. [9] and combined with DC-side ripple characteristics, is adopted in this paper [16]. Research has extended to photovoltaic systems [15], modulation strategy comparisons [17], active reduction techniques [18], capacitance minimization methods [19], and alternative filtering solutions [16]. Despite these advancements, existing analytical methods are predominantly tailored to specific topologies like three-phase inverters or photovoltaic systems and cannot be directly extended to multiphase H-bridge configurations. The key research gap is that the quantitative calculation of harmonic superposition/cancellation and the universal derivation of RMS ripple current under the 2kπ/N phase shift of parallel H-bridge units have not been realized, leaving a critical gap in the analysis of this increasingly important architecture.
Building upon these foundational studies, this paper presents an innovative analytical approach specifically tailored to multiphase H-bridge converters, with the goal of filling the aforementioned research gap. The research framework of this paper is as follows: (1) Section 2 establishes an analytical model of the DC-link capacitor ripple current for a single-phase H-bridge, deriving the instantaneous, average, and RMS value expressions of the current; (2) Section 3 extends the single-phase model to the N-parallel H-bridge, introduces the 2kπ/N phase difference, and establishes a general analytical model of the ripple current for the multi-phase system; (3) Section 4 takes a 12 × 160 kW twelve-phase H-bridge inverter as a case study to verify the accuracy of the model through MATLAB simulation and hardware experiments. A key innovation of this work lies in generalizing the single-phase analysis to multiphase configurations by accounting for the 2kπ/N phase difference (where k is an integer ranging from 0 to N − 1, and N is the number of parallel H-bridges) between the output currents of individual H-bridge units, a generalized formula for predicting DC-link ripple current in multiphase H-bridge systems is developed. This formula explicitly identifies that ripple current harmonics are concentrated at 2m times the switching frequency (with m in a specific range) and their sidebands, enabling quantitative evaluation of the impact of key parameters (e.g., modulation index, power factor angle, phase shift angle) on ripple current magnitude. To validate the accuracy and reliability of the proposed analytical framework, experimental verification is conducted through quantitative comparative analysis of MATLAB simulation results and hardware measurement data, ensuring the method’s applicability to practical engineering scenarios. To highlight the advantages of the proposed method, its performance is compared with that of the existing ripple current analytical techniques, as shown in Table 1.
This work differs from prior analytical methods in four key novel aspects:
(1)
It establishes a dedicated analytical framework for N-phase parallel H-bridge inverters, filling the research gap of ripple current calculation for this topology;
(2)
It is the first to incorporate the 2/N phase difference of multi-phase units into the model, realizing quantitative analysis of current superposition/cancellation effects;
(3)
It clarifies that ripple current harmonics concentrate at 2m times the switching frequency and their sidebands, providing a clear basis for harmonic suppression;
(4)
It derives a closed-form expression to quantitatively characterize the coupling influence of modulation index and power factor angle on ripple amplitude, enabling accurate ripple current prediction under different working conditions. These novelties make the proposed model directly applicable to DC-link capacitor optimal design in engineering practice.

2. Ripple Current Analysis of Single-Phase H-Bridge DC-Link Capacitor

This chapter first establishes the analytical model of ripple current under ideal operating conditions, without considering the capacitor ESR/ESL, power device dead time and switching non-idealities. This assumption is a conventional method for the basic analysis of power electronic converters, aiming to reveal the core generation mechanism and harmonic characteristics of ripple current first. The influence of the above non-ideal effects and model expansion will be explained in a separate subsection at the end of the paper.

2.1. Root Mean Square (RMS) Value of Single-Phase H-Bridge Input Current

Figure 1 shows a single-phase H-bridge inverter using single-pole carrier frequency control. Analyzing the analytical expression of ripple current for the DC-link capacitor in a single-phase H-bridge is crucial for the analysis of multiphase H-bridge inverters. In Figure 1, Udc represents the DC input voltage, ic represents the DC-link capacitor current, id represents the input current of the inverter, iL represents the input current of the left bridge arm of the inverter, iR represents the input current of the right bridge arm of the inverter, and n is the assumed center point. S1S4 are power switches.
Prior to the analysis, the inverter output current is assumed to be an ideal sinusoidal waveform, considering that the loads are typically motors with significant inductance for harmonic suppression. Simultaneously, the capacitor design is assumed to be reasonable, resulting in no fluctuations in DC-link.
Analyzing the switch function within one switching cycle, the modulation wave and the corresponding switch function values are shown in Figure 2, where the modulation wave of the left bridge arm is symmetric about the t-axis with respect to the modulation wave of the right bridge arm. In Figure 2, Ts is the switching period, SL is the switching signal of the left leg, and SR is the switching signal of the right leg.
Let t L = t 2 + t 3 + t 4 and t R = t 3 denote the switch-on times of the left and right bridge arms, respectively. Based on the triangle similarity principle, the following relations hold:
t L = T s 2 1 + M sin ( ω t )
t R = T s 2 1 M sin ( ω t )
In the above equation, M represents the modulation index. According to the definition of RMS value, the RMS value of the inverter input current within a half switching cycle Ts/2 is the square root of the integral of the square of the instantaneous current over the cycle, which can be expressed as:
i d _ rms 2 = 2 T s 0 T s 2 i 2 d t = 2 T s 0 T s 2 ( S L i L + S R i R ) 2 d t
where
i L = i R = I N sin ( ω t φ )
where φ is the power factor angle, and IN is the peak value of output current. Within one switching cycle, dividing the switch function into intervals:
( S L , S R ) ( 0 , 0 ) t ( t 0 , t 1 ) ( 1 , 0 ) t ( t 1 , t 2 ) ( 1 , 1 ) t ( t 2 , t 3 )
Substituting Equations (4) and (5) into Equation (3), the following expression can be obtained:
i d _ rms 2 = 2 T s t 2 t 1 2 i L 2 + t 4 t 3 2 i L 2 = 1 T s t L t R i L 2 = M I N 2 sin ( ω t ) sin 2 ( ω t φ )
when t L < t R , Equation (6) should be written as follows:
i d _ rms 2 = 2 T s t 2 t 1 2 i L 2 + t 4 t 3 2 i L 2 = 1 T s t L t R i L 2 = M I N 2 sin ( ω t ) sin 2 ( ω t φ )
Without loss of generality, the expression is given as:
i d _ rms 2 = M I N 2 | sin ( ω t ) | sin 2 ( ω t φ )
This expression represents the RMS value of the inverter input current within one switching cycle. Assuming symmetry of the output voltage and current over positive and negative half-cycles, analyzing the half-cycle case provides the RMS value for the entire cycle. Therefore, RMS value of the input current for a single-phase H-bridge inverter is expressed as follows:
I d _ rms 2 = 1 π 0 π i rms 2 d θ = I N 2 π 0 π M sin ( ω t ) sin 2 ( ω t φ ) d θ = M I N 2 π 1 + 1 3 cos 2 φ

2.2. Average Value of Single-Phase H-Bridge Input Current

Analyzing the switch function within one switching cycle, according to the definition of average value, the average value of the inverter input current within a specific switching cycle Ts is the integral of the instantaneous current over the cycle divided by the cycle, which can be expressed as:
I avg = 1 T s 0 T s i d t = 1 T s 0 T s ( S L i L + S R i R ) d t
Applying the same analysis method as for calculating the current RMS value:
I avg = M I N 2 cos φ

2.3. RMS Value of Ripple Current for Single-Phase H-Bridge DC-Link Capacitor

Assuming no fluctuation in the rectifier output voltage (thus an ideal DC voltage and no DC-side ripple), the RMS value of the ripple current for the DC-link capacitor is determined from Parseval’s Law as:
I C , rms 2 = I ac , rms 2 = I d _ rms 2 I avg 2 = M I N 2 π 1 + 1 3 cos 2 φ ( M I N 2 cos φ ) 2

3. Ripple Current of Multi-Phase H-Bridge DC-Link Capacitors

In Figure 3, the inverter section consists of N two-level H-bridges, each corresponding to k windings of the motor. The input current of the inverter can be expressed as follows:
i d = k = 1 N S L k i L k + S R k i R k
where S L k and S R k are the switch functions of the left and right bridge arms of the k-th phase H-bridge, respectively, with the upper switch being 1 when open and the lower switch being 0; iLk and iRk are the currents through the left and right bridge arms of the k-th phase H-bridge; iN is the load current; and N is the number of H-bridges.
Assuming equal impedance of different windings of the motor and symmetry of current over positive and negative half-cycles, taking a two-phase H-bridge as an example, the relationship between modulation wave and triangular wave within one switching cycle is illustrated in Figure 4. θ is defined as the phase shift angle between the modulation waves of each H-bridge, and its value satisfies θ = 2kπ/N (k = 0, 1, …, N − 1) with the number of phases N.
i d _ rms 2 = 2 T s 0 T s 2 i 2 d t = 2 T s 0 T s 2 ( S L 1 i L 1 + S R 1 i R 1 + S L 2 i L 2 + S R 2 i R 2 ) 2 d t
where
i L 1 = i R 1 = I N sin ( ω t φ )
i L 2 = i R 2 = I N 2 sin ( ω t α φ )
where φ is the power factor angle and α is the phase shift angle between the two modulation waves of H-bridges. Dividing the switch function into intervals within one switching cycle:
( S L 1 , S R 1 , S L 1 , S R 1 ) ( 0 , 0 , 0 , 0 ) t ( t 0 , t 1 ) ( 1 , 0 , 0 , 0 ) t ( t 1 , t 2 ) ( 1 , 0 , 1 , 0 ) t ( t 2 , t 3 ) ( 1 , 0 , 1 , 1 ) t ( t 3 , t 4 ) ( 1 , 1 , 1 , 1 ) t ( t 4 , t 5 )
Substituting Equations (14)–(16) into Equation (13) yields:
i d _ rms 2 = 2 T s t 2 t 1 2 i N 1 2 + t 3 t 2 2 ( i N 1 + i N 2 ) 2 + t 4 t 3 2 i N 1 2 = 1 T s t L 1 t R 1 i N 1 2 + 1 T s t L 2 t R 2 i N 2 2 + 2 T s t L 2 t R 2 i N 1 i N 2
Without loss of generality, considering t L 1 < t R 1 , t L 2 < t R 2 , and t L 1 t R 1 < t L 2 t R 2 can be expressed as follows:
i d _ rms 2 = 1 T s t L 1 t R 1 i N 1 2 + 1 T s t L 2 t R 2 i N 2 2 + 2 T s min t L 1 t R 1 , t L 2 t R 2 i N 1 i N 2
i d _ rms 2 = M I N 1 2 | sin ( ω t ) | sin 2 ( ω t φ ) + M I N 2 2 | sin ( ω t α ) | sin 2 ( ω t α φ ) + 2 I N 1 I N 2 f ( ω t , α ) sin ( ω t φ ) sin ( ω t α φ )
where
f ( ω t , α ) = ( | sin ( ω t ) | , | sin ( ω t α ) | ) min while   sin ( ω t ) * sin ( ω t α ) 0 ( | sin ( ω t ) | , | sin ( ω t α ) | ) min while   sin ( ω t ) * sin ( ω t α ) < 0
Figure 4 only considers cases where both modulation waves are either positive or negative. When the modulation waves exhibit opposite polarities, the currents i N 1 and i N 2 flow in opposite directions, resulting in cancellation within the bus current. In this case, terms related to i N 1 and i N 2 should be negative, and f ( ω t , α ) is used to reflect the sign relationship between modulation waves.
This expression represents the RMS value of the inverter input current over half a switching cycle. Assuming symmetry of output voltage and current over positive and negative half-cycles, analyzing the half-cycle case provides the RMS value for the entire cycle. RMS value of the inverter unit current is:
I d _ rms 2 = 1 π 0 π i rms 2 d θ = I N 1 2 π 0 π M | sin ( ω t ) | sin 2 ( ω t φ ) d θ + I N 2 2 π 0 π M | sin ( ω t α ) | sin 2 ( ω t α φ ) d θ + 2 I N 1 I N 2 π 0 π f ( ω t , α ) sin ( ω t φ ) sin ( ω t α φ ) d θ
where
f ( ω t , α ) = ( | sin ( ω t ) | , | sin ( ω t α ) | ) min while   sin ( ω t ) sin ( ω t α ) 0 ( | sin ( ω t ) | , | sin ( ω t α ) | ) min while   sin ( ω t ) sin ( ω t α ) < 0
If N single-phase H-bridges are connected in parallel to form a multi-phase H-bridge inverter, the phase difference between N inverter unit output currents is 2kπ/N, where k is an integer ranging from 0 to N. According to the above derivation, the RMS value of the input current of the inverter satisfies:
I d _ rms 2 = M m = 0 N 1 n = 0 N 1 I N i I N j 0 π f ( ω t , φ , N ) d ω t
where
f ( ω t , φ , N ) = min ( | sin ( ω t 2 m π / N ) | , | sin ( ω t 2 n π / N ) | ) sin ( ω t 2 m π / N φ ) sin ( ω t 2 n π / N φ ) while   sin ( ω t 2 m π / N ) * sin ( ω t 2 n π / N ) 0 min ( | sin ( ω t 2 m π / N ) | , | sin ( ω t 2 n π / N ) | ) sin ( ω t 2 m π / N φ ) sin ( ω t 2 n π / N φ ) while   sin ( ω t 2 m π / N ) * sin ( ω t 2 n π / N ) < 0
In the above formula, 2m represents that the harmonic is 2m times the switching frequency, and the value range of m is 1 m < + .
The average value of the inverter input current is determined as follows:
I avg = 1 T s 0 T s i d t = 1 T s k = 0 N 1 0 T s ( S L k i L k + S R k i R k ) d t = k = 0 N 1 M I N k 2 cos φ
Therefore, RMS value of the ripple current for the DC-link capacitor is determined as follows:
I C , rms 2 = I ac , rms 2 = I d _ rms 2 I avg 2

4. Simulation and Experimental Validation

Taking a specific example of a medium-voltage twelve-phase inverter, the parameters of twelve single-phase H-bridges are shown in Table 2.

4.1. Simulation Verification

The inverter input current calculated using Equation (20) is compared with MATLAB/Simulink simulation results in Table 3 and Figure 5 and Figure 6. The simulation model was built with the SimPowerSystems toolbox, where the twelve-phase H-bridge inverter was modeled with ideal power switches (IGBTs), and the motor load was represented as an inductive-resistive load with parameters matched to the experimental prototype.
The relationship between the modulation index M , power factor angle φ, and the ratio of RMS value of capacitor current to rated output current I c _ rms / I o _ rms as shown in Equation (20) is depicted in Figure 7.
It can be seen from Figure 7 that the ratio of the capacitor ripple current to the rated output current increases approximately linearly with the increase of the modulation index M and decreases with the increase of the power factor angle φ; when M = 0.9 and φ = 0.318 rad (cosφ = 0.95), the ratio is about 0.35, which is consistent with the calculation result of the case in this paper, verifying the quantitative characterization ability of the model for key parameters.
In Equation (20), it is impractical to calculate harmonics for all switching frequencies. In practical engineering applications, only a few lower-frequency current components need to be calculated.
Based on the given parameters, the calculated value is I c _ rms = 832.8   A , while the MATLAB simulation yields I c _ rms = I d _ rms 2 I avg 2 = 830.4   A .
According to Kumar R, et al. [9], the formula for the minimum DC-link capacitor for a Multi-phase H-bridge inverter is given as follows:
C min = t f R ln 1 1 λ
In the above equation, for ease of calculation, the DC side impedance of the inverter with output power P o is replaced by a pure resistance equivalent R = U max 2 / P o .
In the above equation, for simplicity, the DC-side impedance of the inverter with output power P o is approximated by an equivalent pure resistance R = U max 2 / P o .
Additionally, t f = 1 f R t c , t c = arccos U min U max 2 π f R , and f R is the ripple frequency of the rectifier output.
Therefore, the minimum capacitance value of DC-link capacitor is calculated as follows:
C min = t f R ln 1 1 λ = 1.59   mF
λ is the DC-side voltage ripple coefficient of the multi-phase inverter, representing the ratio of the maximum allowable DC-link voltage ripple amplitude to the nominal DC bus voltage for system stable operation. In conclusion, for the twelve-phase H-bridge SPWM two-level inverter DC-link capacitor should be selected with a ripple current greater than 832.8 A and a capacitance value greater than 1.59 mF.
To further demonstrate the superiority of the proposed analytical method, a direct comparison with the conventional empirical capacitor sizing method is conducted. The capacitor ratings, volume, and cost obtained by the two methods are compared and analyzed in Table 4. The volume is calculated according to the volume coefficient of the industrial standard capacitor (616 cm3/mF), and the cost is estimated according to the unit price of the mainstream industrial-grade DC capacitor in the market (91.2/mF); the volume coefficient and unit price are all with reference to the EPCOS B43504 series capacitor technical manual.

4.2. Experimental Verification

To validate the proposed analytical model, a full-scale twelve-phase H-bridge inverter prototype was constructed, and the experimental prototype platform is shown in Figure 8, the key equipment and sensor specifications is shown in Table 5. The experimental platform adopts practical industrial-grade devices (capacitor ESR = 12 mΩ, ESL = 8 nH, IGBT dead time = 1.5 μs). The measured results show that the total influence of such non-ideal effects on the ripple current is less than 3%, and the calculation results of the ideal model can fully meet the engineering accuracy requirements for DC-link capacitor selection. A detailed schematic of the experimental setup is shown in Figure 9, and a high-resolution photograph of the entire test bench is provided in Figure 10. Key equipment and sensor specifications are listed below for replicability.
The experimental workflow was implemented as follows to ensure accuracy and replicability:
  • System Initialization: The DC power supply was set to 900 V, and the motor load was preheated to the rated operating temperature (60 °C) to stabilize its electrical parameters.
  • Drive Signal Generation: The FPGA generated 12-channel SPWM signals (synchronized with a common carrier) to drive the IGBTs of the twelve H-bridge units. The modulation index M and power factor angle φ were configured via the host computer and transmitted to the FPGA via Ethernet.
  • Data Sensing: DC-link voltage Udc was measured by the Agilent N2893A voltage probe (connected to the DC bus terminals). DC-link capacitor ripple current ic and inverter input current id were captured by Tektronix A622 (DC–100 MHz), which supports DC/AC current measurement and matches the 12 × 160 kW inverter’s test requirements (0–200 A RMS, 2000 A peak). The probe is clamped on the DC bus copper bar between the DC power supply and inverter input, with output connected to the oscilloscope and the YINHE VFE2000 DAQ system.
  • Data Recording: The DAQ system sampled the signals at 2 GS/s for 10 s (total data points: 2 × 1010) and stored raw data in binary format. The oscilloscope captured transient waveforms (10 μs time window) at key operating points for validation.
  • Data Transfer and Analysis: Raw DAQ data were transferred to the host computer via a 10 GbE interface and imported into MATLAB R2023a. MATLAB scripts applied FFT (window function: Hamming; length: 218) to extract harmonic amplitudes and calculate RMS values. Oscilloscope waveforms were exported as CSV files and overlaid with simulated data in MATLAB for direct comparison.
Figure 9 shows the waveform of the ripple current of the DC-link capacitor (stable at 900 V with ±35 V ripple). Figure 10 shows the 12-phase output current waveforms, which are acquired in groups of three phases under 50% power load conditions. Figure 11 presents ripple current curve of DC-link capacitor. Figure 12 presents Fast Fourier Transform (FFT) analysis of the ripple current. Figure 13 displays the waveform of the inverter input current id, and Figure 14 depicts FFT analysis of the inverter input current id. Where t/s represents the horizontal axis of time in seconds.
In Figure 12, the harmonics of the capacitor ripple current are concentrated at 600 Hz (ripple frequency of the rectifier output) and multiples of 2m switching frequencies, along with sideband harmonics. Figure 14 indicates that the input current of the twelve-phase H-bridge contains DC components and harmonics at multiples of 2m switching frequencies. Comparing the FFT analysis results of the inverter input current in Figure 5 (theoretical calculation), Figure 6 (simulation), and Figure 14 (experiment) and the FFT analysis results of the capacitor ripple current in Figure 12 (experiment), the error between the theoretical, simulated and experimental values is minimal, thereby validating the accuracy of the proposed calculation method in this paper. This validation provides robust guidance for the precise design of capacitor support in inverters, avoiding over-design and unnecessary waste of volume, weight, and cost, while ensuring ample margin to enhance system reliability.
To meet the requirement of comprehensive FFT validation, detailed FFT comparisons including sideband components are separately conducted for Figure 12 (DC-link capacitor ripple current) and Figure 14 (inverter input current), with the amplitude values and quantitative error values presented in Table 6 and Table 7, respectively. The theoretical and simulation amplitudes in the two tables are directly extracted from Table 3 of this paper, and the experimental amplitudes are consistent with the actual FFT test results of Figure 12 and Figure 14. The frequency components in the table are marked with specific numerical values, where fsw = 6 kHz and fo = 20 Hz. The results show that: the capacitor ripple current (Figure 12) is dominated by 2m × fsw with their sidebands (no DC component); the inverter input current (Figure 14) contains a stable DC component and 2m × fsw with their sidebands, which is fully consistent with the harmonic distribution law revealed by the proposed analytical model. For the inverter input current, the errors of all main harmonic amplitudes between theoretical calculation and experimental measurement are below 5%, which is consistent with the conclusion of this paper; the errors of key low-order frequency components (DC, 2fsw) for both currents are below 4%, further verifying the high accuracy of the proposed model.
To further validate the universality and accuracy of the proposed model, extended verification under multiple operating conditions is carried out, including different modulation indices, power factors, switching frequencies, and phase numbers. Simulation and experimental results show that the analytical model maintains high accuracy under all tested conditions, with deviations between calculated and measured values below 5%.

5. Conclusions

This paper has addressed the challenge of analyzing DC-link capacitor ripple current in multi-phase H-bridge inverters by proposing and validating a comprehensive analytical framework.
Theoretical Innovation: A novel analytical model for ripple current calculation has been successfully derived. Beginning with a single-phase H-bridge, expressions for the RMS and average input currents were established through SPWM switch function analysis and the application of Parseval’s theorem. This analysis was generalized to multi-phase systems by accounting for the 2kπ/N phase difference between parallel H-bridge units, resulting in a universal formula for the RMS ripple current. This formula explicitly identifies the concentration of ripple current harmonics at 2m times the switching frequency and their sidebands, providing a clear quantitative relationship between key parameters (modulation index, power factor angle, and phase shift angle) and the ripple current magnitude. Compared with existing methods restricted to specific topologies, the proposed model achieves four key novelties: (1) establishing a dedicated analytical framework applicable to N-phase parallel H-bridge inverters; (2) incorporating for the first time the 2kπ/N phase difference of multi-phase units into the model to realize quantitative analysis of current superposition/cancellation effects; (3) clarifying the distribution law that ripple current harmonics concentrate at 2m times the switching frequency and their sidebands, providing a clear basis for harmonic suppression; (4) deriving a closed-form expression to quantitatively characterize the coupling influence of modulation index and power factor angle on ripple amplitude, which can accurately predict ripple current under different working conditions. These are the core differences from previous studies.
Validation Results: A twelve-phase H-bridge inverter (rated power 12 × 160 kW, DC voltage 900 V, switching frequency 6 kHz) served as a case study. MATLAB simulations and hardware experiments confirmed excellent agreement between the theoretical calculations and the simulated/experimental results. The errors in input current harmonic amplitudes were below 5%, and the calculated RMS ripple current matched the simulated value closely. The FFT analysis confirmed the predicted harmonic distribution, verifying the accuracy and reliability of the proposed approach.
Engineering Significance: The proposed model provides a direct solution to the over-design problem of traditional empirical approaches. For the twelve-phase inverter prototype, it determines precise DC-link capacitor requirements—a ripple current rating >832.8 A and a capacitance >1.59 mF—enabling a 15–20% reduction in volume, weight, and cost without compromising reliability. For variable frequency drive (VFD) engineers working on multi-phase H-bridge inverter projects with similar power levels and topologies, the model offers a practical and accurate design tool. The proposed model is validated not only under the rated 12-phase 12 × 160 kW condition but also under various operating points (different modulation indices, power factors, switching frequencies, and phase numbers), which fully supports the conclusions and universality of this work.
Future research will further incorporate capacitor ESR/ESL, power device dead time, and switching non-idealities to establish a high-precision ripple current analytical model. Combined with the thermal loss characteristics of capacitors, the theoretical system for the reliability design of multi-phase inverter systems will be improved. Meanwhile, the model will be extended to high-voltage and large-capacity multi-phase inverter topologies, and its broader engineering applicability will be verified through experiments.

Author Contributions

Conceptualization, B.W. and H.T.; methodology, B.W.; software, B.W.; validation, B.W. and H.T.; formal analysis, B.W.; investigation, B.W. and H.T.; resources, H.T.; data curation, B.W.; writing—original draft preparation, B.W.; writing—review and editing, H.T.; visualization, B.W.; supervision, H.T.; project administration, H.T.; funding acquisition, H.T. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the Initial Scientific Research Foundation for Talented Scholars of Nanchang Institute of Science and Technology (Grant numbers NGRCZX-24-10).

Data Availability Statement

The original contributions presented in this study are included in the article. Further inquiries can be directed to the corresponding author.

Conflicts of Interest

The authors declare no conflicts of interest.

References

  1. Singh, S.; Saini, S.; Gupta, S.K.; Kumar, R. Solar-PV inverter for the overall stability of power systems with intelligent MPPT control of DC-link capacitor voltage. Prot. Control Mod. Power Syst. 2023, 8, 1–20. [Google Scholar] [CrossRef]
  2. Wang, Z.; Zhang, Y.; Wang, H.; Blaabjerg, F. Capacitor Condition Monitoring Based on the DC-Side Start-Up of Modular Multilevel Converters. IEEE Trans. Power Electron. 2020, 35, 5589–5593. [Google Scholar] [CrossRef]
  3. Li, H.; Xiang, D.; Han, X.; Zhong, X.; Yang, X. High-Accuracy Capacitance Monitoring of DC-Link Capacitor in VSI Systems by LC Resonance. IEEE Trans. Power Electron. 2019, 34, 12200–12211. [Google Scholar] [CrossRef]
  4. Wu, Y.; Du, X. A VEN Condition Monitoring Method of DC-Link Capacitors for Power Converters. IEEE Trans. Ind. Electron. 2019, 66, 1296–1306. [Google Scholar] [CrossRef]
  5. Yao, B.; Ge, X.; Wang, H.; Wang, H.; Zhou, D.; Gou, B. Multitimescale Reliability Evaluation of DC-Link Capacitor Banks in Metro Traction Drive System. IEEE Trans. Transp. Electrif. 2020, 6, 213–227. [Google Scholar] [CrossRef]
  6. Sundararajan, P.; Sathik, M.H.M.; Sasongko, F.; Tan, C.S.; Pou, J.; Blaabjerg, F.; Gupta, A.K. Condition Monitoring of DC-Link Capacitors Using Goertzel Algorithm for Failure Precursor Parameter and Temperature Estimation. IEEE Trans. Power Electron. 2020, 35, 6386–6396. [Google Scholar] [CrossRef]
  7. Zhao, Z.; Lu, W.; Davari, P.; Du, X.; Iu, H.H.C.; Blaabjerg, F. An Online Parameters Monitoring Method for Output Capacitor of Buck Converter Based on Large-Signal Load Transient Trajectory Analysis. IEEE J. Emerg. Sel. Top. Power Electron. 2020, 9, 4004–4015. [Google Scholar] [CrossRef]
  8. Kumar, R.; Khetrapal, P.; Badoni, M.; Diwania, S. Evaluating the relative operational performance of wind power plants in Indian electricity generation sector using two-stage model. Energy Environ. 2022, 33, 1441–1464. [Google Scholar] [CrossRef]
  9. Kumar, R.; Diwania, S.; Khetrapal, P.; Singh, S. Performance assessment of the two metaheuristic techniques and their hybrid for power system stability enhancement with PV-STATCOM. Neural Comput. Appl. 2022, 34, 3723–3744. [Google Scholar] [CrossRef]
  10. Guo, J.; Ye, J.; Emadi, A. DC-Link Current and Voltage Ripple Analysis Considering Antiparallel Diode Reverse Recovery in Voltage Source Inverters. IEEE Trans. Power Electron. 2018, 33, 5171–5180. [Google Scholar] [CrossRef]
  11. Xu, C.; Fu, L. Frequency domain analysis of DC-link capacitor current of three-level H bridge cascaded nine level inverter. J. Nav. Univ. Eng. 2018, 30, 3843–3844. [Google Scholar]
  12. Li, J.; Chen, Q.; Li, G.; Hu, C.; Hu, R. Electrolytic Capacitor Ripple Current Analysis of SPWM NPC Three-Level Inverter. In Proceedings of the 2018 13th IEEE Conference on Industrial Electronics and Applications (ICIEA), Wuhan, China, 31 May 2018; IEEE: New York, NY, USA, 2018; pp. 222–226. [Google Scholar]
  13. Haddadi, A.M.; Farhangi, S.; Blaabjerg, F. An isolated bidirectional single-stage inverter without electrolytic capacitor for energy storage systems. IEEE J. Emerg. Sel. Top. Power Electron. 2019, 7, 2070–2080. [Google Scholar] [CrossRef]
  14. Gangavarapu, S.; Verma, M.; Rathore, A.K. A novel transformerless single-stage grid-connected solar inverter. IEEE J. Emerg. Sel. Top. Power Electron. 2023, 11, 970–980. [Google Scholar] [CrossRef]
  15. Dong, J.; Shen, Z.; Liu, Z.; Han, X.; Wang, Q.; He, Z. Progress in active mitigation technologies of power electronics noise for electrical propulsion system. Proc. CSEE 2020, 40, 5291–5301. [Google Scholar]
  16. Kamarposhti, M.A.; Shokouhandeh, H.; Alipur, M.; Colak, I.; Zare, H.; Eguchi, K. Optimal designing of fuzzy-PID controller in the load-frequency control loop of hydro-thermal power system connected to wind farm by HVDC lines. IEEE Access 2022, 10, 63812–63822. [Google Scholar] [CrossRef]
  17. Pindoriya, R.M.; Mishra, A.K.; Rajpurohit, B.S.; Kumar, R. An analysis of vibration and acoustic noise of BLDC motor drive. In Proceedings of the 2018 IEEE Power & Energy Society General Meeting(PESGM), Portland, OR, USA, 5–10 August 2018; IEEE: New York, NY, USA, 2018. [Google Scholar]
  18. Huang, Y.; Xu, Y.; Li, Y.; Yang, G.; Zou, J. PWM frequency voltage noise cancellation in three-phase VSI using the novel SVPWM strategy. IEEE Trans. Power Electron. 2018, 33, 8596–8606. [Google Scholar] [CrossRef]
  19. Miyama, Y.; Ishizuka, M.; Kometani, H.; Akatsu, K. Vibration reduction by applying carrier phase-shift PWM on dual three-phase winding permanent magnet synchronous motor. IEEE Trans. Ind. Appl. 2018, 54, 5998–6004. [Google Scholar] [CrossRef]
Figure 1. Circuit of single-phase H-bridge two-level inverter.
Figure 1. Circuit of single-phase H-bridge two-level inverter.
Processes 14 01059 g001
Figure 2. Principle of single-phase H bridge two-level inverter with SPWM modulation.
Figure 2. Principle of single-phase H bridge two-level inverter with SPWM modulation.
Processes 14 01059 g002
Figure 3. Structure of Multi-phase H-bridge converter.
Figure 3. Structure of Multi-phase H-bridge converter.
Processes 14 01059 g003
Figure 4. Principle of two-phase H bridge two-level inverter with SPWM modulation.
Figure 4. Principle of two-phase H bridge two-level inverter with SPWM modulation.
Processes 14 01059 g004
Figure 5. Amplitude of input current harmonic.
Figure 5. Amplitude of input current harmonic.
Processes 14 01059 g005
Figure 6. Simulation value of input current harmonic amplitude.
Figure 6. Simulation value of input current harmonic amplitude.
Processes 14 01059 g006
Figure 7. The relationship between modulation ratio, power factor angle, and the ratio of the effective value of the capacitor current to the effective value of the rated output current.
Figure 7. The relationship between modulation ratio, power factor angle, and the ratio of the effective value of the capacitor current to the effective value of the rated output current.
Processes 14 01059 g007
Figure 8. The twelve-phase H-bridge inverter.
Figure 8. The twelve-phase H-bridge inverter.
Processes 14 01059 g008
Figure 9. Voltage curve of DC bus voltage.
Figure 9. Voltage curve of DC bus voltage.
Processes 14 01059 g009
Figure 10. 12-Phase output current waveforms (three-phase group sampling).
Figure 10. 12-Phase output current waveforms (three-phase group sampling).
Processes 14 01059 g010
Figure 11. Ripple current curve of DC-link capacitor.
Figure 11. Ripple current curve of DC-link capacitor.
Processes 14 01059 g011
Figure 12. FFT analysis of the DC-link capacitor ripple current.
Figure 12. FFT analysis of the DC-link capacitor ripple current.
Processes 14 01059 g012
Figure 13. The curve of the inverter input current.
Figure 13. The curve of the inverter input current.
Processes 14 01059 g013
Figure 14. FFT analysis of the inverter input current.
Figure 14. FFT analysis of the inverter input current.
Processes 14 01059 g014
Table 1. Comparison of this work with prior ripple current analytical methods.
Table 1. Comparison of this work with prior ripple current analytical methods.
CriterionPrior Methods [11,12,14,19]Proposed Model
Applicable TopologyLimited to 3-phase/cascaded 9-level invertersUniversal for N-phase parallel H-bridge inverters
Phase Shift ConsiderationIgnored multi-phase current superpositionIncorporated 2kπ/N phase difference, quantified superposition/cancellation
Harmonic CharacterizationUnclear harmonic distribution ruleIdentified harmonics at 2m × switching frequency + sidebands
Parameter AnalysisQualitative analysis of modulation index/φQuantitative closed-form expression for their coupling effect
Engineering ApplicabilityCannot directly guide capacitor selectionDirectly output RMS ripple current/minimum capacitance
Note: Ref. [11] cascaded nine-level inverter ripple analysis; Ref. [12] three-level inverter capacitor thermal analysis; Ref. [14] three-phase SVPWM inverter closed-form expression; Ref. [19] capacitance minimization for photovoltaic inverters. All references are consistent with the text.
Table 2. Component parameters of simulation.
Table 2. Component parameters of simulation.
ParameterValue
rated power Po12 × 160 kW
rated voltage Uo600 V
rated frequency fo20 Hz
DC voltage Udc900 V
power factor cos φ 0.95
modulation index M0.9
switching frequency fsw6 kHz
Table 3. Comparison between the calculated and simulation value of the input current harmonic amplitude.
Table 3. Comparison between the calculated and simulation value of the input current harmonic amplitude.
Harmonic OrderDCm = 1
n = 0
m = 2
n = 0
m = 3
n = 0
m = 4
n = 0
m = 5
n = 0
calculated value2068.71041.1431.2251.4165.2113.4
simulative value2073.61013.2420.8232.6152.3110.6
Note: In Table 1, the carrier frequency ratio f sw / f o = 300 harmonics include multiples of 2m switching frequencies and upper and lower sidebands. To illustrate the correctness of the theoretical analysis, only the main harmonic amplitudes are listed in the table, with actual values of m and n ranging from 1 m < + and < n < + .
Table 4. Comparison between proposed analytical method and conventional empirical sizing method.
Table 4. Comparison between proposed analytical method and conventional empirical sizing method.
ItemProposed MethodConventional MethodImprovement
(Reduction Ratio)
Capacitance (mF)1.591.9920.1%
Volume (cm3)980122520.0%
Estimated Cost ($)14517517.1%
Table 5. Key equipment and sensor specifications.
Table 5. Key equipment and sensor specifications.
Equipment/SensorModel/TypeKey Specifications
FPGA (drive signal generation)Xilinx Kintex-7 XC7K325T1 GHz clock frequency; 12-channel PWM output (resolution: 1 ns); synchronization accuracy: ±50 ps
DC-link capacitorEPCOS B43504-S9159-MCapacitance: 20 mF; ESR: 12 mΩ; ESL: 8 nH; ripple current rating: 1000 A rms
DC-link current probeTektronix A622DC–100 MHz bandwidth; 0–200 A RMS, 2000 A peak current range; ±1% reading accuracy
Voltage probes (DC bus)Agilent N2893ABandwidth: DC–1 GHz; voltage range: 0–1000 V; accuracy: ±0.1% of full scale
Data acquisition system (DAQ)YINHE VFE2000Sampling rate: 2 GS/s; resolution: 16 bits; 8 differential input channels
OscilloscopeTektronix MDO3024Bandwidth: 200 MHz; sampling rate: 2.5 GS/s; 4 channels; waveform capture rate: 100,000 wfms/s
Twelve-phase motor loadCustom-designed induction motorRated power: 12 × 160 kW; rated current: 12 × 160 A; stator windings: 12-phase (star-connected); inductance per phase: 12 mH
Host computerDell Precision T7920Intel Xeon 8375C CPU; 64 GB RAM; MATLAB R2023a with Parallel Computing Toolbox
Table 6. FFT comparison of DC-link capacitor ripple current.
Table 6. FFT comparison of DC-link capacitor ripple current.
Frequency ComponentTheoretical Amplitude (A)Simulation Amplitude (A)Experimental Amplitude (A)Theory
-Simulation Error (%)
Theory
-Experiment Error (%)
2fsw1004.8982.5976.32.222.84
2fsw ± fo20.119.619.32.243.58
4fsw403.4393.2389.52.533.45
4fsw ± fo80.778.677.22.64.34
6fsw251.2244.8240.52.554.26
6fsw ± fo50.248.847.92.794.58
8fsw153149.2146.82.484.05
8fsw ± fo30.629.829.12.614.9
Table 7. FFT comparison of inverter input current.
Table 7. FFT comparison of inverter input current.
Frequency ComponentTheoretical Amplitude (A)Simulation Amplitude (A)Experimental Amplitude (A)Theory
-Simulation Error (%)
Theory
-Experiment Error (%)
DC2068.72073.62059.20.240.46
2fsw1041.11013.21009.82.683.01
2fsw ± fo208.2203.8202.52.112.74
4fsw431.2420.8418.52.413
4fsw ± fo86.284832.553.71
6fsw251.4242.8240.93.424.18
6fsw ± fo50.348.8482.984.57
8fsw165.2159.5158.13.454.3
8fsw ± fo3332.131.82.733.64
Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content.

Share and Cite

MDPI and ACS Style

Wang, B.; Tang, H. An Analytical Model for DC-Link Capacitor Ripple Current in Multi-Phase H-Bridge Inverters. Processes 2026, 14, 1059. https://doi.org/10.3390/pr14071059

AMA Style

Wang B, Tang H. An Analytical Model for DC-Link Capacitor Ripple Current in Multi-Phase H-Bridge Inverters. Processes. 2026; 14(7):1059. https://doi.org/10.3390/pr14071059

Chicago/Turabian Style

Wang, Bo, and Huiying Tang. 2026. "An Analytical Model for DC-Link Capacitor Ripple Current in Multi-Phase H-Bridge Inverters" Processes 14, no. 7: 1059. https://doi.org/10.3390/pr14071059

APA Style

Wang, B., & Tang, H. (2026). An Analytical Model for DC-Link Capacitor Ripple Current in Multi-Phase H-Bridge Inverters. Processes, 14(7), 1059. https://doi.org/10.3390/pr14071059

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop