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Article

Design of a 41.14–48.11 GHz Triple Frequency Based VCO

1
Department of Electronic, Faculty of Engineering, University of Zanjan, Zanjan 4537138111, Iran
2
Department of Electronics and Telecommunications, Politecnico di Torino, 10129 Turin, Italy
3
Department of Energy, Politecnico di Torino, 10129 Turin, Italy
*
Author to whom correspondence should be addressed.
Electronics 2019, 8(5), 529; https://doi.org/10.3390/electronics8050529
Submission received: 12 April 2019 / Revised: 5 May 2019 / Accepted: 7 May 2019 / Published: 11 May 2019
(This article belongs to the Section Circuit and Signal Processing)

Abstract

:
Growing deployment of more efficient communication systems serving electric power grids highlights the importance of designing more advanced intelligent electronic devices and communication-enabled measurement units. In this context, phasor measurement units (PMUs) are being widely deployed in power systems. A common block in almost all PMUs is a phase locked oscillator which uses a voltage controlled oscillator (VCO). In this paper, a triple frequency based voltage controlled oscillator is presented with low phase noise and robust start-up. The VCO consists of a detector, a comparator, and triple frequency. A VCO starts-up in class AB, then steadies oscillation in class C with low current oscillation. The frequency of the VCO, which is from 13.17 GHz to 16.03 GHz, shows that the frequency is tripling to 41.14–48.11 GHz. Therefore, its application is not limited to PMUs. This work has been simulated in a standard 0.18 µm CMOS process. The simulated VCO achieves a phase noise of −99.47 dBc/Hz at 1 MHz offset and −121.8 dBc/Hz at 10 MHz offset from the 48.11 GHz carrier.

1. Introduction

Recently, there has been an increased demand in radio frequency design [1,2,3]. One of the most important blocks in transceiver communication systems are the voltage controlled oscillators (VCOs) [4,5,6,7,8,9]. Voltage controlled oscillators are the circuits which are used to generate alternative signals in many parts of the radio frequency systems. In power systems, operators need to communicate with each other in different locations. Therefore, data exchange and communication among people and assets require wireless transceiver communication devices. Radios are widely utilized in power systems to make connections among actors, especially system operators such as a phasor measurement unit (PMU) [10]. A block diagram of the basic PMU is demonstrated in Figure 1. PMUs are used to estimate the magnitude and phase angle of an electrical phasor quantity, like voltage or current, in the electricity grid. As shown in Figure 1, one of the main components of a PMU is the phase locked oscillator which uses voltage controlled oscillators [11,12]. Therefore, in order to design a wireless transceiver system and also make a bridge between actors including operators and assets in the electrical industry, designing voltage controlled oscillators with high performance is needed.
The most popular structure of a VCO which is more used in CMOS technology is as follows: ring oscillators and LC tank based oscillators [13]. The most important characteristics of each VCO are phase noise, consumption power, and wide frequency tuning range [14,15,16]. In VCOs, there is a special trade-off between them. It has been proven that the phase noise of LC VCOs is much better than phase noise of the loop VCO. But LC VCOs are worse than loop VCOs in terms of area and sometimes power consumption [17]. LC VCOs are usually great choices for RF applications because of desirable and rough start-up conditions and appropriate phase noise [18].
Among different LC tank VCOs, Colpitts and cross-coupled structures are utilized more [19]. The cross-coupled VCO has a simple start-up condition and good phase noise, and the type of Colpitts has low consumption power [20,21]. Concurrent utilization of two types of the voltage controlled oscillator, Colpitts and cross-coupled in circuit structure, improves start-up conditions and the phase noise of the circuit with low power consumption.
In recent years, there have been a lot of investigations to achieve low phase noise along with low consumption power in RF applications [22,23,24,25,26]. For example, in [22], in order to obtain low phase noise with low consumption power, two LC oscillators are coupled together.
In this paper, we present a VCO designed using triple frequency, a detector, and a comparator for increasing the frequency and obtaining low consumption power with low phase noise and a robust start-up condition. In this VCO, the trade-off between frequency and phase noise in the low-frequency range is better than in the high-frequency range. Therefore, in this paper, firstly, the trade-off between phase noise and oscillator frequency is performed in low frequency, and then the operation frequency is increased using a triple frequency. This results in achieving low phase noise and low consumption power in the desired frequency.
In the design of a VCO, a combination of cross-coupled oscillators and Colpitts is considered to gain the benefits of both structures. Simultaneous utilization of these two types of voltage controlled oscillators in the structure of the circuit improve the start-up condition and phase noise of the circuit with low consumption power. The proposed VCO is started in class AB, and it will be in class C that the VCO has a better start-up condition with low power consumption.
The structure of this paper is formed as follows: First, the general block diagram of the proposed circuit is introduced in Section 2, then different elements of the circuit are briefly described. In Section 3, simulation results are compared with other existing proposals of this circuit. The paper is concluded in Section 4 with some remarks.

2. Circuit Design

The block diagram of the proposed voltage controlled oscillator with triple frequency is represented in Figure 2. The second harmonic of the oscillator is a result of the common node of a differential pair. The mix of frequency f0 and second harmonic (2f0) creates a frequency equal to 2f0 + f0 at the mixer output, which makes frequency 3f0 if the mixer output frequency is filtered. The VCO is initially oscillating in class AB, and then it keeps the oscillation in class C. The output magnitude of the oscillator is passed to a comparator by a detector circuit, and it generates a gate voltage for the oscillator.

2.1. Voltage Controlled Oscillator

The proposed voltage controlled oscillator is illustrated in Figure 3. This VCO concurrently uses both cross-coupled and Colpitts structures. As shown in Figure 3, Colpitts structure is used in the upper part of the circuit, while the cross-coupled structure is designed for the lower part of the circuit. In order to change frequency, tunable capacitors are used between the two structures of cross-coupled and Colpitts. The voltage is fed into the bulk of M3 and M4 transistors to improve consumption power.
In the proposed VCO, in order to achieve a robust start-up condition with appropriate phase noise, the VCO first oscillates in class AB, and then it continues oscillating in class C. To have strong initial conditions, transistor transconductance should initially be multiple times higher than oscillation transconductance. Therefore, the gate voltage supply of cross-coupled transistors should be different in class C and class AB. This is done by feedback including a detector and comparator.
As shown in Figure 3, the threshold voltage of the transistors M3,4 and M1,2 are not equal. The threshold voltage of the transistors M3,4 is reduced by applying a voltage to the body for improving start-up conditions. It should be noted that although threshold voltages of the transistors are different, drain currents of the transistors M3,4 and M1,2 are equal. According to Equation (1), this is because the value of VGSVth must be the same in the transistors to generate an equal amount of the current [27,28].
I D = 1 2 ( 1 + θ V d s ) μ n C o x W L ( V g s V t h ) 2
where ID, µn, Cox, W, L, Vgs, and Vth are drain current of the transistor, electrons mobility, oxide capacitor, transistor width, transistor length, gate-source voltage, and threshold voltage of the transistor, respectively. Moreover, θ is 1/(Ec × L) that Ec is critical electrical field at which velocity saturation occurs.

2.1.1. Oscillation Frequency

Since the transistors used in Figure 3 are biased in the saturation zone, the amount of gate-source and gate-drain capacitors are obtained based on Equation (2) [28,29]:
C g n = Q g V n
where n is the transistor terminal. Qg is charge associated with the gate terminal. The gate charge is as follow [28]
Q g = Q s u b 0 + W a c t i v e L a c t i v e C o x [ V g t V d s 2 + A b V d s 2 12 ( V g t A b 2 V d s ) ]
where Wactive and Lactive are the effective length and width of the intrinsic device, respectively. Also, Qsub0 is the substrate charge at zero source-drain bias. Vds and Ab are the drain-source voltage and bulk charge effect, respectively.
The cross-coupled structure in the lower part of the circuit is affecting oscillation frequency and oscillator status due to the producing parasitic capacitors. The equivalent capacitor from cross-coupled can be calculated using Equation (4) [29]:
C c r o s s = C G S + 4 C G D
where CGS and CGD capacitors represent gate-source and gate-drain capacitance of the cross-coupled transistors, respectively. To calculate oscillation frequency, the equivalent half-circuit of the proposed VCO is formed as Figure 4.
In Figure 4, Ccross is the equivalent capacitance from the cross-coupled; CeqL2 represents equivalent capacitance of inductor L2, Cvar2 refers to variant capacitance, and CGS2 and CGD2 are gate-source and gate-drain capacitance of the transistors M2, respectively. C2 is a constant capacitance of the Colpitts oscillator. Oscillation frequency can be calculated based on Equation (5) using total observed capacitance:
f 0 = 1 2 π L t o t a l C t o t a l
where Ctotal and Ltotal are the total capacitor and inductor that are obtained in Equations (6) and (7):
C t o t a l = C 1 + C 2 1 ω 0 2 L ( C 2 + C a )
L t o t a l = 1 ω 0 2 L ( C 2 + C a ) C 2 C a L ω 0 4
where Ca and C1 are defined in Equations (8) and (9):
C a = C e q L 2 + C G D 4
C 1 = C G S 4 + C var 2 + C c r o s s

2.1.2. Phase Noise

To determine the phase noise around the carrier frequency, all noise sources must be identified in the VCO circuit. The phase noise of the oscillator in the fundamental frequency at offset frequency is defined as Equation (10) [29,30].
L ( Δ ω ) = 10 log ( i N L , i 2 Δ ω 0 2 C t o t a l 2 A T 2 )
where Ctotal and NL,i are the total capacitor and the noise source. A T is the amplitude oscillation that is defined as:
A T = 4 π 2 R p o u t 2 I ω 0 2
where R p o u t and I ω 0 are the output resistance and the fundamental current, respectively. The noise of the L2 and L3 inductor is achieved in Equations (12) and (13), respectively.
N L , R p = 4 K B T R p L 1
N L , R p = 4 K B T R p L 3
where KB and T are the Boltzmann constant and temperature. R p L 1 and R p L 2 are the parasitic resistance of the L1 and L2, respectively. The thermal noise of the transistor M2 and M4 is as follows:
N L , n M O S = 4 K B T γ n g m 2
N L , n M O S = 4 K B T γ n g m 4
where γ n is the constant and equal amount of the temperature noise of the transistors to its transconductance. gm is the transconductance of the M2,4. With substitute Equations (11)–(15) into Equation (10), the phase noise is defined as follows:
L ( Δ ω ) = 10 log [ π 2 K B T 2 Δ ω 0 2 C 2 R p o u t 2 I ω 0 2 ( 1 R p L 1 + 1 R p L 3 + γ n ( g m 2 + g m 4 ) ) ]
As shown in Equation (8), the phase noise depends on temperature, fundamental current, offset frequency, and tank quality factor. For example, increasing the current would improve the phase noise situation, but consumption power would increase at the same time. Increasing offset frequency results in lower phase noise. According to this equation, there is a trade-off between selecting the appropriate current to obtain low consumption power, low phase noise, and robust start-up conditions. To satisfy these requirements, the voltage controlled oscillator first works with voltage 1 V, and then it continues operating with voltage 0.65 V to consume lower power. Figure 5 depicts variations of the gate voltage.

2.2. Amplitude Detector and Comparator

Figure 6 shows the detector and comparator circuit. Initially, when a VCO is not oscillating, the output voltage of the detector is zero, and the output voltage of the comparator is equal to 1 V. As soon as all conditions of oscillation are met, the oscillator starts oscillating. When transistors M1 and M2 turn on, the output voltage of detector increases, which reduces the output voltage of the comparator to the desired level of 0.64 V. In order to make a VCO work in class C, the maximum gate voltage of each transistor should not exceed more than a threshold voltage, with respect to the minimum drain voltage. In order to keep transistors in the operation zone, we can use Equation (17) to obtain the required voltage to make VCO oscillate in class C [29]:
V g V d d 3 V p 2 + V t h
where Vdd is the supply voltage and its value is equal to 1 V. Also, Vp represents the variation of drain voltage and is equal to 0.59 V. Therefore, gate voltage should be 0.64 V according to Equation (17).
The main elements of the comparator include five transistors (i.e., M7 to M12) along with one transistor as the buffer. Initially, the output of the detectors is zero, and the comparator output is equal to 1 V. Thus, a big voltage is applied to the gate of the transistors M1 and M2 in the proposed VCO circuit. This big voltage produces a high current according to Equation (1). This current creates strong initialization conditions for the oscillator.

2.3. Designing Mixer

In order to triple frequency, a nonlinear differential amplifier is used. Figure 7 shows the mixer used in the triple frequency [28]. This mixer contains an RF switch (transistor M13), differential pair switch intermediate frequency (IF) (M14 and M15), and an inductor (L4) which is in resonance with loss capacitors like a band-pass filter.

3. Results

In this paper, we designed and simulated a VCO with low phase noise, low consumption power, and robust start-up conditions using technology 0.18 µm CMOS. The oscillation frequency versus the voltage Vtune is demonstrated in Figure 8. The oscillation frequency of a VCO is from 13.17 GHz to 16.03 GHz, and the triple frequency covers a range frequency between 41.14 GHz and 48.11 GHz. The phase noise of a VCO at 48.11 GHz is shown in Figure 9; where at offset frequencies of 1 MHz and 10 MHz, the phase noise of −99.47 dBc/Hz and −128.8 dBc/Hz is achieved, respectively. The output power spectrum for the frequency 48.11 GHz is depicted in Figure 10. Correlation of the simulated phase noise versus the oscillation frequency at 1 MHz offset frequency is shown in Figure 11. The phase noise changed from −91.43 dBc/Hz to −98.46 dBc/Hz with respect to the variation frequency. The oscillation frequency and phase noise by Monte Carlo for 50 samples are illustrated in Figure 12a,b.
Table 1 summarizes the phase noise results of the designed VCO in different corners process and normal condition. In the typical-typical (TT) condition, the phase noise of −99.47 dBc/Hz is obtained at 1 MHz offset frequency of 48.11 GHz. In corners slow-slow (SS) and fast-fast (FF), the frequencies 48.12 GHz with phase noise of −97.49 dBc/Hz and 47.66 GHz with phase noise of −94.41 dBc/Hz are obtained in offset frequency of 1 MHz, respectively.
Table 2 compares the performance of VCOs with other works in terms of the fundamental frequency phase noise, consumption power, and figure of merit. The figure of merit (FOM) and total figure of merit (FOMT) for evaluating VCO performance is defined in Equations (18) and (19) [5,15]. Based on this table, our designed VCO has lower phase noise with better consumption power and figure of merit compared with previous works.
F O M = L ( Δ ω ) 20 log ( f 0 Δ f ) + 10 log ( P D C 1 m w )
F O M T = L ( Δ ω ) 20 log ( f 0 Δ f ) + 10 log ( P D C 1 m w ) 20 log ( F T R 10 % )
where L ( Δ ω ) , f0, PDC, and FTR are phase noise, oscillation frequency, consumption power, and frequency tuning range, respectively.

4. Conclusions

In this paper, we presented our designed VCO based on triple frequency whose output frequency oscillates in the range of 41.14 GHz to 48.11 GHz. It uses 0.18 µm technology, and it is simulated in ADS (2016.01, Keysight EEsof EDA, California, USA, 2016) software. Because the varactor works well in the low-frequency range, the proposed VCO is designed in low-frequency, then the operation frequency increased using triple frequency. This achieves low phase noise, low consumption power, and high tuning frequency range in high operation frequency. Therefore, better phase noise can be achieved in the desired frequency. Moreover, the combination of both cross-coupled and Colpitts structures with novel circuit for VCOs is presented in this paper. In order to reach a robust start-up condition for VCO, it first runs in class AB, and then, it steadies in class C to be featured with better phase noise and suitable consumption power.

Author Contributions

Formal analysis, A.N.; methodology, A.N., S.T. and M.E.; resources, S.T. and A.E.; software, A.N., S.T. and M.E.; supervision, S.T. and A.E.; writing—original draft, A.N., M.E. and A.E.; writing—review and editing, S.T. and A.E.

Funding

This research received no external funding.

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. Estebsari, M.; Gholami, M.; Ghahramanpour, M.J. A Wide Range Delay Locked Loop for Low Power and Low Jitter Applications. Int. J. Circuit Theory Appl. 2018, 46, 401–414. [Google Scholar] [CrossRef]
  2. Estebsari, M.; Gholami, M.; Ghahramanpour, M.J. A Novel Charge Pump with Low Current for Low-Power Delay-Locked Loops. Circuits Syst. Signal Process. 2017, 36, 3514–3526. [Google Scholar] [CrossRef]
  3. Xu, X.; Chen, C.; Sugiura, T.; Yoshimasu, T. 18-GHz Band Low-Power LC VCO IC Using LC Bias Circuit in 56-nm SOI CMOS. In Proceedings of the IEEE Asia Pacific Microwave Conference (APMC), Kuala Lumpar, Malaysia, 13–16 November 2017; pp. 938–941. [Google Scholar]
  4. Shirazi, A.H.M.; Nikpaik, A.; Molavi, R.; Lightbody, S.; Djahanshahi, H.; Taghivand, M.; Mirabbasi, S.; Shekhar, S. On the Design of mm-Wave Self-Mixing-VCO Architecture for High Tuning-Range and Low Phase Noise. IEEE J. Solid-State Circuits 2016, 51, 1210–1222. [Google Scholar] [CrossRef]
  5. Sotner, R.; Jerabek, J.; Langhammer, L.; Dvorak, J. Design and Analysis of CCII-Based Oscillator with Amplitude Stabilization Employing Optocouplers for Linear Voltage Control of the Output Frequency. Electronics 2018, 7, 157. [Google Scholar] [CrossRef]
  6. Yargholi, M.; Nasri, A. A Low Phase Noise LC VCO for 6GHz. International Conference on Data Mining. In Proceedings of the Electronics and Information Technology, Pattaya, Thailand, 10–11 August 2015; pp. 10–11. [Google Scholar]
  7. Jain, S.; Jang, S.L.; Tchamov, N.T. Tuned LC-Resonator Dual-Band VCO. IEEE Microw. Wirel. Compon. Lett. 2016, 26, 204–206. [Google Scholar] [CrossRef]
  8. Li, B.; Wu, Y.; Yu, C.; Liu, Y. Independently Tunable Concurrent Dual-Band VCO Using Square Open-Loop Resonator. IEEE Access 2018, 6, 12634–12641. [Google Scholar] [CrossRef]
  9. Ullah, F.; Liu, Y.; Li, Z.; Wang, X.; Sarfraz, M.M.; Zhang, A. A Bandwidth-Enhanced Differential LC-Voltage Controlled Oscillator (LC-VCO) and Superharmonic Coupled Quadrature VCO for K-Band Applications. Electronics 2018, 7, 127. [Google Scholar] [CrossRef]
  10. Ali, I.; Aftab, M.A.; Hussain, S.M.S. Performance Comparison of IEC 61850-90-5 and IEEE C37.118.2 Based Wide Area PMU Communication Networks. J. Mod. Power Syst. Clean Energy 2016, 4, 487–495. [Google Scholar] [CrossRef]
  11. Guo, H.; Chen, Y.; Mak, P.; Martins, R.P. A 0.083-mm2 25.2-to-29.5 GHz Multi-LC-Tank Class-F234 VCO with a 189.6-dBc/Hz FOM. IEEE Solid-State Circuits Lett. 2018, 1, 86–89. [Google Scholar] [CrossRef]
  12. Kim, B.I. Direct Comparison between Phase Locked Oscillator and Direct Resonance Oscillator in the Noncontact Atomic Force Microscopy under Ultrahigh Vacuum. Rev. Sci. Instrum. 2004, 75, 5035–5037. [Google Scholar] [CrossRef]
  13. Hsieh, M.; Sobelman, G.E. Comparison of LC and Ring VCOs for PLLs in a 90 nm Digital CMOS Process. In Proceedings of the International SOC Design Conference, Busan, Korea, 19–22 October 2006; pp. 19–22. [Google Scholar]
  14. Kashani, M.H.; Tarkeshdouz, A.; Molavi, R.; Afshari, E.; Mirabbasi, S. A Wide-Tuning-Range Low-Phase-Noise mm-Wave CMOS VCO with Switchable Transformer-Based Tank. IEEE J. Solid-State Circuits Lett. 2018, 1, 82–85. [Google Scholar] [CrossRef]
  15. Katebi, M.; Nasri, A.; Toofan, S. Low-Power VCO for K-band Applications. In Proceedings of the Iranian Conference on International Electrical Engineering (ICEE), Mashhad, Iran, 8–11 May 2018; pp. 144–149. [Google Scholar]
  16. Xi, T.; Guo, Sh.; Gui, P.; Huang, D.; Fan, Y.; Morgan, M. Low-Phase-Noise 54-GHz Transformer-Coupled Quadrature VCO and 76-/90-GHz VCOs in 65-nm CMOS. IEEE Trans. Microw. Theory Tech. 2016, 64, 2091–2103. [Google Scholar] [CrossRef]
  17. Jovanovic, G.; Stojcev, M.; Stamenkovic, Z. A CMOS Voltage Controlled Ring Oscillator with Improved Frequency Stability. Sci. Publ. State Univ. NoviPazar 2010, 2, 1–9. [Google Scholar]
  18. Jalalifar, M.; Byun, G.S. Design of Ku-Band Transformer-Based Cross-Coupled Complementary LC-VCO. Electron. Lett. 2015, 51, 832–834. [Google Scholar] [CrossRef]
  19. Katebi, M.; Nasri, A.; Toofan, S. A Wide Tuning Range and Low Phase Noise VCO Using New Capacitor Bank Structure. Majlesi J. Electr. Eng. 2018, 12, 95–103. [Google Scholar]
  20. Aparicio, R.; Hajimiri, A. A Noise-Shifting Colpitts Differential VCO. IEEE J. Solid-State Circuits 2002, 37, 1728–1736. [Google Scholar] [CrossRef]
  21. Wang, T.P. A CMOS Colpitts VCO Using Negative-Conductance Boosted Technology. IEEE Trans. Circuits Syst. I 2011, 58, 2623–2635. [Google Scholar] [CrossRef]
  22. Zou, Q.; Ma, K.; Yeo, K.S. A Low Phase Noise and Wide Tuning Range Millimeter-Wave VCO Using Switchable Couple d VCO-Core. IEEE Trans. Circuits Syst.-I 2015, 62, 554–563. [Google Scholar] [CrossRef]
  23. Sun, J.; Boon, C.C.; Zhu, X.; Yi, X.; Devrishi, K.; Meng, F. A Low-Power Low-Phase-Noise VCO with Self-Adjusted Active Resistor. IEEE Microw. Wirel. Compon. Lett. 2016, 26, 201–203. [Google Scholar] [CrossRef]
  24. Jang, S.L.; Jain, S. Dual C- and S-Band CMOS VCO Using the Shunt Varactor Switch. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 2015, 23, 1808–1813. [Google Scholar] [CrossRef]
  25. Zong, Z.; Babaie, M. A 60 GHz Frequency Generator Based on a 20 GHz Oscillator and an Implicit Multiplier. IEEE J. Solid-State Circuits 2016, 51, 1261–1273. [Google Scholar] [CrossRef]
  26. NiuI, X.; Li, L.; Wang, D. A 50GHz VCO in 65nm LP CMOS for mm-Wave Applications. In Proceedings of the IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Hangzhou, China, 25–28 October 2016; pp. 149–151. [Google Scholar]
  27. Allen, P.E.; Douglas, R.H. CMOS Analog Circuit Design; Oxford University Press: Oxford, UK, 1987. [Google Scholar]
  28. Paydavosi, N.; Morshed, T.H.; Lu, D.D.; Yang, W.; Dunga, M.V.; Xi, X.J.; He, J.; Liu, W.; Cao, M.; Jin, X.; et al. BSIM4v4. 8.0 MOSFET Model-User’s Manual; University of California: Berkeley, CA, USA, 2013. [Google Scholar]
  29. Razavi, B.; Goodwin, B.; Fuller, J. RF Microelectronics, 2nd edition; Prentice Hall: Upper Saddle River, NJ, USA, 2011. [Google Scholar]
  30. Lu, L.; Tang, Z.; Andreani, P.; Mazzanti, A.; Hajimiri, A. Comments on “Comments on “A General Theory of Phase Noise in Electrical Oscillators. IEEE J. Solid-State Circuits 2008, 43, 2170. [Google Scholar] [CrossRef]
Figure 1. Block diagram of the basic phasor measurement unit (PMU) [10].
Figure 1. Block diagram of the basic phasor measurement unit (PMU) [10].
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Figure 2. Block diagram of the proposed voltage controlled oscillator (VCO) with triple frequency.
Figure 2. Block diagram of the proposed voltage controlled oscillator (VCO) with triple frequency.
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Figure 3. Proposed voltage controlled oscillator with combination of the Colpitts and cross-coupled structures.
Figure 3. Proposed voltage controlled oscillator with combination of the Colpitts and cross-coupled structures.
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Figure 4. Half-circuit of the proposed voltage controlled oscillator.
Figure 4. Half-circuit of the proposed voltage controlled oscillator.
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Figure 5. Variations of the gate voltage versus time in the proposed voltage controlled oscillator (VCO).
Figure 5. Variations of the gate voltage versus time in the proposed voltage controlled oscillator (VCO).
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Figure 6. Circuit of the detector and comparator in the voltage controlled oscillator.
Figure 6. Circuit of the detector and comparator in the voltage controlled oscillator.
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Figure 7. Circuit of the triple frequency.
Figure 7. Circuit of the triple frequency.
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Figure 8. Simulated VCO tuning range (a) output of the VCO; (b) output of the triple.
Figure 8. Simulated VCO tuning range (a) output of the VCO; (b) output of the triple.
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Figure 9. The simulated phase noise of the VCO at 48.11 GHz.
Figure 9. The simulated phase noise of the VCO at 48.11 GHz.
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Figure 10. The simulated output power of the VCO at 48.11 GHz.
Figure 10. The simulated output power of the VCO at 48.11 GHz.
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Figure 11. The simulated phase noise and frequency versus the oscillation frequency at 1 MHz offset frequency.
Figure 11. The simulated phase noise and frequency versus the oscillation frequency at 1 MHz offset frequency.
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Figure 12. The Monte Carlo of the (a) oscillation frequency; (b) phase noise.
Figure 12. The Monte Carlo of the (a) oscillation frequency; (b) phase noise.
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Table 1. Simulation of the proposed voltage controlled oscillator (VCO) in different corners.
Table 1. Simulation of the proposed voltage controlled oscillator (VCO) in different corners.
CornersPhase Noise (1 MHz)Phase Noise (10 MHz)
Typical-typical (TT)−99.47−121.8
Fast-fast (FF)−94.41−119.57
Slow-slow (SS)−97.49−120.61
Table 2. Comparison of the proposed VCO with other works.
Table 2. Comparison of the proposed VCO with other works.
Ref.[3] 2[9] 1[16] 2[25] 2[26] 2This Work 1
Process56 nm
SOI 5
0.13 µm
CMOS
65 nm
CMOS
40 nm
CMOS
65 nm
CMOS
0.18 µm
CMOS
Frequency (GHz)18.5725.55455.4546.844.62
Tuning range (%)5.38439.125.45.815.6
Phase noise at offset frequency (dBc/Hz) −117.6 −96 −95.5 −100.1 −100 −99.47
at 5 MHzat 1 MHzat 1 MHzat 1 MHzat 1 MHzat 1 MHz
PDC (mW)2.56122422514 44.16 3
Figure of merit (FOM) (dBc/Hz)−185.1−173.33−179−179.8−186.415−187.95 4−193.22 3
Total figure of merit (FOMT) (dBc/Hz)−190.43−186−179.8−187.9−188.5−191.81 4−197.08 3
1 Simulation result; 2 Measurement result; 3 Including the power consumption of the VCO; 4 Including the power consumption of the total structure; 5 Silicon on insulator.

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MDPI and ACS Style

Nasri, A.; Toofan, S.; Estebsari, M.; Estebsari, A. Design of a 41.14–48.11 GHz Triple Frequency Based VCO. Electronics 2019, 8, 529. https://doi.org/10.3390/electronics8050529

AMA Style

Nasri A, Toofan S, Estebsari M, Estebsari A. Design of a 41.14–48.11 GHz Triple Frequency Based VCO. Electronics. 2019; 8(5):529. https://doi.org/10.3390/electronics8050529

Chicago/Turabian Style

Nasri, Abbas, Siroos Toofan, Motahhareh Estebsari, and Abouzar Estebsari. 2019. "Design of a 41.14–48.11 GHz Triple Frequency Based VCO" Electronics 8, no. 5: 529. https://doi.org/10.3390/electronics8050529

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