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Early Output Quasi-Delay-Insensitive Array Multipliers

1
School of Computer Science and Engineering, Nanyang Technological University, Singapore 639798, Singapore
2
School of Electrical and Electronic Engineering, Newcastle University in Singapore, Singapore 567739, Singapore
3
Department of Industrial Engineering, Technical University of Sofia, 1000 Sofia, Bulgaria
*
Author to whom correspondence should be addressed.
Electronics 2019, 8(4), 444; https://doi.org/10.3390/electronics8040444
Received: 15 March 2019 / Revised: 10 April 2019 / Accepted: 16 April 2019 / Published: 18 April 2019
(This article belongs to the Section Microelectronics and Optoelectronics)
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Abstract

Multiplication is a widely used arithmetic operation in microprocessing and digital signal processing applications, and multiplication is realized using a multiplier. This article presents the quasi-delay-insensitive (QDI) early output versions of recently reported indicating asynchronous array multipliers. Delay-insensitive dual-rail encoding is used for data representation and processing, and 4-phase return-to-zero (RTZ) and return-to-one (RTO) handshake protocols are used for data communication. Many QDI array multipliers were realized using a 32/28 nm complementary metal oxide semiconductor (CMOS) technology. Compared to the optimum indicating array multiplier, the proposed optimum early output array multiplier achieves a 6.2% reduction in cycle time and a 7.4% reduction in power-cycle time product (PCTP) with respect to RTZ handshaking, and a 7.6% reduction in cycle time and an 8.8% reduction in PCTP with respect to RTO handshaking without an increase in the area. The simulation results also convey that the RTO handshaking is preferable to the RTZ handshaking for the optimum implementation of QDI array multipliers. View Full-Text
Keywords: arithmetic circuits; multiplier; asynchronous circuits; quasi-delay-insensitive; CMOS arithmetic circuits; multiplier; asynchronous circuits; quasi-delay-insensitive; CMOS
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Balasubramanian, P.; Maskell, D.; Naayagi, R.T.; Mastorakis, N. Early Output Quasi-Delay-Insensitive Array Multipliers. Electronics 2019, 8, 444.

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