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Open AccessFeature PaperArticle

A Silicon-Compatible Synaptic Transistor Capable of Multiple Synaptic Weights toward Energy-Efficient Neuromorphic Systems

1
Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47906, USA
2
Department of Electronics Engineering, Gachon University, Seongnam-si, Gyeonggi-do 13120, Korea
3
Department of Electrical and Computer Engineering, Seoul National University, Seoul 08826, Korea
*
Authors to whom correspondence should be addressed.
Electronics 2019, 8(10), 1102; https://doi.org/10.3390/electronics8101102
Received: 15 July 2019 / Revised: 18 September 2019 / Accepted: 26 September 2019 / Published: 30 September 2019
In order to resolve the issue of tremendous energy consumption in conventional artificial intelligence, hardware-based neuromorphic system is being actively studied. Although various synaptic devices for the system have been proposed, they have shown limits in terms of endurance, reliability, energy efficiency, and Si processing compatibility. In this work, we design a synaptic transistor with short-term and long-term plasticity, high density, high reliability and energy efficiency, and Si processing compatibility. The synaptic characteristics of the device are closely examined and validated through technology computer-aided design (TCAD) device simulation. Consequently, full synaptic functions with high energy efficiency have been realized. View Full-Text
Keywords: energy consumption; hardware-based neuromorphic system; synaptic device; Si processing compatibility; TCAD device simulation energy consumption; hardware-based neuromorphic system; synaptic device; Si processing compatibility; TCAD device simulation
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MDPI and ACS Style

Yu, E.; Cho, S.; Park, B.-G. A Silicon-Compatible Synaptic Transistor Capable of Multiple Synaptic Weights toward Energy-Efficient Neuromorphic Systems. Electronics 2019, 8, 1102.

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