Parametric Model Order Reduction for Large-Scale Circuit Models Using Extended and Asymmetric Extended Krylov Subspace
Abstract
1. Introduction
- We introduce a parametric model order reduction methodology that integrates the AEKS into a projection-based PMOR framework, enabling the efficient construction of reduced-order models that remain accurate across a prescribed parameter space.
- The proposed approach exploits structural sparsity imbalances between circuit system matrices to guide the Krylov subspace expansion toward computationally cheaper linear solves, substantially reducing the cost of basis generation compared to other Krylov methods.
- AEKS is combined with a concatenation-of-basis strategy to generate a single global projection subspace from multiple parameter samples, allowing accurate parametric modeling without explicit multi-parameter moment expansions.
- We demonstrate, experimentally, using industrial IBM power grid benchmarks [16], that the AEKS-PMOR method achieves significant runtime speedup compared to EKS-PMOR, while maintaining negligible approximation error.
2. Background
2.1. Model Order Reduction
2.2. Parametric Model Order Reduction
3. Proposed Methodology
3.1. EKS
| Algorithm 1: Extended Krylov Subspace procedure |
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3.2. AEKS
| Algorithm 2: Adaptive AEKS for a Given |
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| Algorithm 3: Select Test Points |
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| Algorithm 4: Estimate Error Indicator |
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3.3. PMOR Implementation
| Algorithm 5: Parametric Model Order Reduction with Adaptive AEKS and EKS |
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4. Experimental Results
4.1. System Modeling and Parameterization Setup
- Conductance (): Since electrical conductance is proportional to the cross-sectional area (), any variation in conductor width translates to a linear modification of the conductance matrix.
- Capacitance (): Similarly, the parasitic ground capacitance depends on the surface area of the cross-section, following a corresponding linear relationship.
4.2. Simulation Environment and Results Analysis
- ROM Order: Indicates the order of the reduced systems. To ensure a fair comparison, the final reduced order q was kept strictly identical across all methods (EKS, AEKS, MM). Although Krylov methods may generate larger initial subspaces, the truncation step was calibrated to yield reduced models of the exact same dimension for all comparisons.
- Max Error (Columns 7, 9, 11): Records the maximum error (infinity norm) between the transfer function of the original and the reduced model ().
- Runtime (Columns 8, 10, 12): Displays the model construction time (in seconds).
5. Conclusions
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
References
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| Name | Dimension | #Ports | Metal Layers | Resistors | ROM Order | MM-PMOR | EKS-PMOR | AEKS-PMOR | |||
|---|---|---|---|---|---|---|---|---|---|---|---|
| Max Error | Runtime (s) | Max Error | Runtime (s) | Max Error | Runtime (s) | ||||||
| ibmpg1 | 44,946 | 600 | 2 | 30,027 | 1200 | 0.029 | 0.232 | 0.013 | 0.243 | 0.021 | 0.041 |
| ibmpg2 | 127,568 | 500 | 5 | 208,325 | 2000 | 0.218 | 1.214 | 0.129 | 1.285 | 0.073 | 0.254 |
| ibmpg3 | 852,539 | 800 | 5 | 1,401,572 | 1600 | 0.226 | 19.512 | 0.145 | 18.976 | 0.114 | 2.578 |
| ibmpg4 | 954,545 | 600 | 6 | 1,560,645 | 2400 | 0.222 | 16.871 | 0.033 | 18.006 | 0.096 | 4.448 |
| ibmpg5 | 1,618,397 | 600 | 3 | 1,076,848 | 1200 | 0.237 | 15.988 | 0.057 | 17.183 | 0.089 | 3.003 |
| ibmpg6 | 2,506,733 | 1000 | 3 | 1,649,002 | 6000 | 0.148 | 18.762 | 0.124 | 20.981 | 0.136 | 4.721 |
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Chatzigeorgiou, C.; Stoikos, P.; Floros, G.; Evmorfopoulos, N.; Stamoulis, G. Parametric Model Order Reduction for Large-Scale Circuit Models Using Extended and Asymmetric Extended Krylov Subspace. Electronics 2026, 15, 640. https://doi.org/10.3390/electronics15030640
Chatzigeorgiou C, Stoikos P, Floros G, Evmorfopoulos N, Stamoulis G. Parametric Model Order Reduction for Large-Scale Circuit Models Using Extended and Asymmetric Extended Krylov Subspace. Electronics. 2026; 15(3):640. https://doi.org/10.3390/electronics15030640
Chicago/Turabian StyleChatzigeorgiou, Chrysostomos, Pavlos Stoikos, George Floros, Nestor Evmorfopoulos, and George Stamoulis. 2026. "Parametric Model Order Reduction for Large-Scale Circuit Models Using Extended and Asymmetric Extended Krylov Subspace" Electronics 15, no. 3: 640. https://doi.org/10.3390/electronics15030640
APA StyleChatzigeorgiou, C., Stoikos, P., Floros, G., Evmorfopoulos, N., & Stamoulis, G. (2026). Parametric Model Order Reduction for Large-Scale Circuit Models Using Extended and Asymmetric Extended Krylov Subspace. Electronics, 15(3), 640. https://doi.org/10.3390/electronics15030640






